Searched refs:warn (Results 101 - 125 of 169) sorted by relevance
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/gem5/src/sim/ |
H A D | syscall_emul.hh | 468 warn("futex: op %d not implemented; ignoring.", op); 752 warn("Unsupported ioctl call (return ENOTTY): ioctl(%d, 0x%x, ...) @ \n", 797 warn("open%s: cannot decode flags 0x%x", 940 warn("unlinkat: first argument not AT_FDCWD; unlikely to work"); 954 warn("faccessat: first argument not AT_FDCWD; unlikely to work"); 967 warn("openat: first argument not AT_FDCWD; unlikely to work"); 981 warn("renameat: first argument not AT_FDCWD; unlikely to work"); 991 warn("renameat: third argument not AT_FDCWD; unlikely to work"); 1175 warn("mremap failing: arguments not page aligned"); 1195 warn("ca [all...] |
H A D | pseudo_inst.cc | 205 warn("Unimplemented m5 op (0x%x)\n", func); 223 warn("Unhandled m5 op: 0x%x\n", func); 292 warn("PseudoInst::wakeCPU(%i), cpuid greater than number of contexts"
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H A D | syscall_emul.cc | 63 warn("Cannot invoke %s on host operating system.", syscall_name); 79 warn("ignoring syscall %s(...)%s", desc->name(), desc->warnOnce() ? 831 warn("fcntl: unsupported command %d\n", cmd); 851 warn("fcntl64(%d, F_GETLK64) not supported, error returned\n", tgt_fd); 856 warn("fcntl64(%d, F_SETLK(W)64) not supported, error returned\n", 863 warn("fcntl64(%d, %d) passed through to host\n", tgt_fd, cmd); 1070 warn("Ignoring call to setuid(%d)\n", process->getSyscallArg(tc, index));
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/gem5/src/dev/arm/ |
H A D | gic_v2.cc | 531 warn("GIC N:N mode selected and not supported at this time\n"); 607 warn("CPU %d Done handling a PPI interrupt " 613 warn("Done handling interrupt that isn't active: %d\n", 626 warn("GIC APRn write ignored because not implemented: %#x\n", daddr); 629 warn("GIC DIR write ignored because not implemented: %#x\n", daddr);
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H A D | hdlcd.cc | 472 warn("Maximum number of outstanding DMA transfers set to 0."); 565 warn("HDLCD %u bytes still in FIFO after frame: Ensure that DMA "
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/gem5/src/arch/arm/ |
H A D | isa.hh | 549 warn("User mode does not have SPSR\n"); 565 warn("User mode does not have SPSR\n"); 590 warn("Trying to access SPSR in an invalid mode: %d\n",
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H A D | isa.cc | 469 warn("Unimplemented system register %s read.\n", 576 warn("Not doing anything for miscreg ACTLR\n"); 819 warn("Unimplemented system register %s write with %#x.\n", 914 warn("Calling DC ZVA! Not Implemeted! Expect WEIRD results\n"); 1612 warn("Not doing anything for write of miscreg ACTLR\n"); 1732 warn("Translating via %s in functional mode! Fix Me!\n", 2001 warn("Translating via %s in functional mode! Fix Me!\n", 2063 warn("miscreg L2CTLR (%s) written with %#x. ignored...\n",
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H A D | pmu.hh | 500 warn("[counterId = %d, eventId = %d, sourceEvent = 0x%x] %s",
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H A D | pagetable.hh | 164 warn("ARM TlbEntry does not support read-only mappings\n");
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/gem5/src/dev/alpha/ |
H A D | tsunami_cchip.cc | 396 warn("clear IPI for CPU=%d, but NO IPI\n", cpunum); 442 warn("post IPI for CPU=%d, but IPI already\n", cpunum);
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/gem5/configs/example/ |
H A D | fs.py | 53 from m5.util import addToPath, fatal, warn 371 warn("Can only correctly generate a dtb for VExpress_GEM5_V1 " \
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H A D | se.py | 55 from m5.util import addToPath, fatal, warn
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/gem5/src/dev/ |
H A D | pixelpump.cc | 228 warn("Input buffer underrun in BasePixelPump (%u, %u)\n",
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/gem5/src/arch/mips/ |
H A D | tlb.cc | 162 warn("Attempted to write at index (%d) beyond TLB size (%d)",
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/gem5/src/arch/power/ |
H A D | tlb.cc | 164 warn("Attempted to write at index (%d) beyond TLB size (%d)",
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/gem5/src/cpu/testers/traffic_gen/ |
H A D | traffic_gen.cc | 234 warn("DRAM generator stride size (%d) is greater "
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/gem5/src/dev/net/ |
H A D | etherlink.cc | 266 warn("Old-style EtherLink serialization format detected, "
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/gem5/src/cpu/o3/ |
H A D | regfile.cc | 84 warn("Non-zero number of physical CC regs specified, even though\n"
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/gem5/src/cpu/testers/memtest/ |
H A D | memtest.cc | 154 warn("%s access failed at %#x\n",
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/gem5/src/mem/ |
H A D | mem_checker_monitor.cc | 281 warn("%s: read of %#llx @ cycle %d failed:\n%s\n",
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/gem5/ext/testlib/ |
H A D | main.py | 291 log.test_log.warn(
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/gem5/src/dev/x86/ |
H A D | i8042.cc | 278 warn("Write to unknown i8042 "
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H A D | i8259.cc | 264 warn("Received interrupt but didn't have "
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/gem5/src/base/ |
H A D | remote_gdb.cc | 481 warn(e.warning); 500 warn("GDB trap event has already been scheduled!");
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/gem5/src/arch/hsail/ |
H A D | operand.cc | 329 warn("HSAIL implementation does not support instructions with "
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Completed in 63 milliseconds
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