Searched refs:lookup (Results 26 - 50 of 72) sorted by relevance

123

/gem5/src/arch/riscv/
H A Dtlb.hh60 PageTable lookupTable; // Quick lookup into page table
67 RiscvISA::PTE *lookup(Addr vpn, uint8_t asn) const;
/gem5/src/arch/mips/
H A Dremote_gdb.cc168 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
H A Dtlb.cc79 TLB::lookup(Addr vpn, uint8_t asn) const function in class:TLB
103 DPRINTF(TLB, "lookup %#x, asn %#x -> %s ppn %#x\n", vpn, (int)asn,
179 // Update fast lookup table
/gem5/src/arch/power/
H A Dremote_gdb.cc171 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
H A Dtlb.hh103 PageTable lookupTable; // Quick lookup into page table
117 PowerISA::PTE *lookup(Addr vpn, uint8_t asn) const;
/gem5/src/arch/x86/
H A Dtlb.hh74 TlbEntry *lookup(Addr va, bool update_lru = true);
/gem5/src/cpu/pred/
H A Dsimple_indirect.hh47 bool lookup(Addr br_addr, TheISA::PCState& br_target, ThreadID tid);
H A Dtage.cc105 TAGE::lookup(ThreadID tid, Addr branch_pc, void* &bp_history) function in class:TAGE
H A Dbpred_unit.cc198 pred_taken = lookup(tid, pc.instAddr(), bp_history);
217 // Now lookup in the BTB or RAS.
259 target = BTB.lookup(pc.instAddr(), tid);
287 if (iPred->lookup(pc.instAddr(), target, tid)) {
327 // Note that this happens after indirect lookup, so it does not use
H A Dbi_mode.cc94 * Here we lookup the actual branch prediction. We use the PC to
103 BiModeBP::lookup(ThreadID tid, Addr branchAddr, void * &bpHistory) function in class:BiModeBP
/gem5/src/mem/
H A Dpage_table.hh135 const Entry *lookup(Addr vaddr);
/gem5/src/arch/alpha/
H A Dfaults.cc199 const EmulationPageTable::Entry *pte = p->pTable->lookup(pc);
218 const EmulationPageTable::Entry *pte = p->pTable->lookup(vaddr);
220 pte = p->pTable->lookup(vaddr);
H A Dtlb.hh75 PageTable lookupTable; // Quick lookup into page table
81 TlbEntry *lookup(Addr vpn, uint8_t asn);
H A Dtlb.cc164 TLB::lookup(Addr vpn, uint8_t asn) function in class:AlphaISA::TLB
200 DPRINTF(TLB, "lookup %#x, asn %#x -> %s ppn %#x\n", vpn, (int)asn,
418 TlbEntry *entry = lookup(VAddr(req->getVaddr()).vpn(),
520 TlbEntry *entry = lookup(VAddr(req->getVaddr()).vpn(), asn);
/gem5/src/systemc/tests/systemc/examples/trie/
H A Dtrie.cpp21 sc_uint<10> lookup(sc_uint<32>);
76 // do the ip lookup to next hop
77 hop = lookup(data_in);
109 lc::lookup(sc_uint<32> ip) function in class:lc
/gem5/src/cpu/o3/
H A Dcpu.cc1319 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
1330 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
1341 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
1351 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
1361 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
1371 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
1381 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
1391 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
1402 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
1413 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
[all...]
H A Drename_map.cc210 PhysRegIdPtr s_prid = vecElemMap.lookup(s_rid);
H A Dcpu.hh437 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
448 PhysRegIdPtr phys_reg = commitRenameMap[tid].lookup(
/gem5/src/gpu-compute/
H A Dgpu_tlb.cc213 GpuTLB::lookup(Addr va, bool update_lru) function in class:X86ISA::GpuTLB
645 * TLB_lookup will only perform a TLB lookup returning true on a TLB hit
675 TlbEntry *entry = lookup(vaddr, true);
783 TlbEntry *entry = lookup(vaddr);
800 p->pTable->lookup(vaddr);
808 pte = p->pTable->lookup(vaddr);
1028 * Do the TLB lookup for this coalesced request and schedule
1068 TlbEntry *entry = lookup(tmp_req->getVaddr(), false);
1088 * We now know the TLB lookup outcome (if it's a hit or a miss), as well
1241 * TLB lookup
[all...]
/gem5/src/dev/arm/
H A Dsmmu_v3_caches.cc179 SMMUTLB::lookup(uint32_t sid, uint32_t ssid, function in class:SMMUTLB
248 lookup(incoming.sid, incoming.ssid, incoming.va, false);
459 ARMArchTLB::lookup(Addr va, uint16_t asid, uint16_t vmid, bool updStats) function in class:ARMArchTLB
500 lookup(incoming.va, incoming.asid, incoming.vmid, false);
658 IPACache::lookup(Addr ipa, uint16_t vmid, bool updStats) function in class:IPACache
698 const Entry *existing = lookup(incoming.ipa, incoming.vmid, false);
838 ConfigCache::lookup(uint32_t sid, uint32_t ssid, bool updStats) function in class:ConfigCache
877 const Entry *existing = lookup(incoming.sid, incoming.ssid, false);
1014 WalkCache::lookup(Addr va, Addr vaMask, function in class:WalkCache
1067 const Entry *existing = lookup(incomin
[all...]
/gem5/src/arch/sparc/
H A Dremote_gdb.cc170 return context()->getProcessPtr()->pTable->lookup(va) != nullptr;
H A Dtlb.hh108 /** lookup an entry in the TLB based on the partition id, and real bit if
119 TlbEntry *lookup(Addr va, int partition_id, bool real, int context_id = 0,
/gem5/src/python/m5/util/
H A Dcode_formatter.py39 class lookup(object): class in inherits:object
219 l = lookup(self, frame, *args, **kwargs)
/gem5/ext/systemc/src/sysc/utils/
H A Dsc_hash.cpp481 sc_phash_base::lookup( const void* k, void** c_ptr ) const function in class:sc_core::sc_phash_base
499 lookup( key, &contents );
/gem5/src/base/
H A Dtrie.hh274 lookup(Key key) function in class:Trie
328 * Method to lookup a value from the trie and then delete it.

Completed in 54 milliseconds

123