| /gem5/ext/sst/ |
| H A D | ExtSlave.cc | 87 ::MemCmd::Command pktCmd = (::MemCmd::Command)pkt->cmd.toInt();
101 Command cmd;
102 switch ((::MemCmd::Command)pkt->cmd.toInt()) {
117 if ((::MemCmd::Command)pkt->cmd.toInt() == ::MemCmd::LoadLockedReq)
119 else if ((::MemCmd::Command)pkt->cmd.toInt() == ::MemCmd::StoreCondReq)
173 Command cmd = event->getCmd();
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| H A D | ExtMaster.cc | 132 Command cmdI = ev->getCmd(); // command in - SST
133 MemCmd::Command cmdO; // command out - gem5
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| /gem5/src/dev/storage/ |
| H A D | Ide.py | 49 Command = 0x0 variable in class:IdeController
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| /gem5/util/ |
| H A D | gem5img.py | 167 class Command(object): class in inherits:object
205 initCom = Command('init', 'Create an image with an empty file system.',
213 mountCom = Command('mount', 'Mount the first partition in the disk image.',
233 umountCom = Command('umount', 'Unmount the first partition in the disk image.',
257 newCom = Command('new', 'File creation part of "init".',
281 partitionCom = Command('partition', 'Partition part of "init".',
311 formatCom = Command('format', 'Formatting part of "init".',
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| /gem5/src/cpu/testers/directedtest/ |
| H A D | SeriesRequestGenerator.cc | 65 Packet::Command cmd;
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| H A D | InvalidateGenerator.cc | 60 Packet::Command cmd;
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| /gem5/src/mem/ruby/system/ |
| H A D | CacheRecorder.cc | 91 MemCmd::Command requestType = MemCmd::FlushReq;
116 MemCmd::Command requestType;
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| /gem5/src/mem/ |
| H A D | packet.hh | 85 enum Command enum in class:MemCmd
171 * with a Command.
179 const Command response;
184 /// Array to map Command enum to associated info.
189 Command cmd;
232 Command
242 MemCmd(Command _cmd) : cmd(_cmd) { }
243 MemCmd(int _cmd) : cmd((Command)_cmd) { }
321 typedef MemCmd::Command Command; typedef
[all...] |
| H A D | dram_ctrl.hh | 150 struct Command { struct in class:DRAMCtrl
155 constexpr Command(Data::MemCommand::cmds _type, uint8_t _bank, function in struct:DRAMCtrl::Command
312 * Command energies
428 std::vector<Command> cmdList;
1164 * Function for sorting Command structures based on timeStamp
1166 * @param a Memory Command
1167 * @param next Memory Command
1168 * @return true if timeStamp of Command 1 < timeStamp of Command 2
1170 static bool sortTime(const Command
[all...] |
| H A D | dram_ctrl.cc | 978 rank_ref.cmdList.push_back(Command(MemCommand::ACT, bank_ref.bank,
1082 rank_ref.cmdList.push_back(Command(MemCommand::PRE, bank.bank,
1281 dram_pkt->rankRef.cmdList.push_back(Command(command, dram_pkt->bank,
1817 Command cmd = *next_iter;
1969 cmdList.push_back(Command(MemCommand::PREA, 0, pre_at));
2012 cmdList.push_back(Command(MemCommand::REF, 0, curTick()));
2119 cmdList.push_back(Command(MemCommand::PDN_F_ACT, 0, tick));
2127 //push Command to DRAMPower
2128 cmdList.push_back(Command(MemCommand::PDN_F_PRE, 0, tick));
2137 //push Command t
[all...] |
| /gem5/src/cpu/testers/rubytest/ |
| H A D | Check.cc | 92 Packet::Command cmd;
151 Packet::Command cmd;
185 Packet::Command cmd;
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| /gem5/src/dev/x86/ |
| H A D | i8042.hh | 47 enum Command enum in class:X86ISA::I8042
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| H A D | SouthBridge.py | 82 ide.Command = 0
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| /gem5/src/dev/ |
| H A D | dma_device.hh | 156 dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
160 dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
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| H A D | dma_device.cc | 153 DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
202 DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
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| /gem5/src/dev/pci/ |
| H A D | PciDevice.py | 63 Command = Param.UInt16(0, "Command") variable in class:PciDevice
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| H A D | device.cc | 91 config.command = htole(p->Command);
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| /gem5/src/dev/arm/ |
| H A D | hdlcd.cc | 304 case Command: return command;
400 case Command: {
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| H A D | hdlcd.hh | 143 Command = 0x0230, enumerator in enum:HDLcd::RegisterOffset
251 CommandReg command; /**< Command register */
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| H A D | RealView.py | 639 io_shift = 1, ctrl_offset = 2, Command = 0x1,
809 io_shift = 2, ctrl_offset = 2, Command = 0x1,
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| /gem5/src/dev/net/ |
| H A D | sinicreg.hh | 65 __SINIC_REG32(Command, 0x04) // 32: command register
105 // Command register bits
189 { 4, false, true, "Command" },
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| H A D | sinic.hh | 110 uint32_t Command; // 0x04 member in struct:Sinic::Device::__anon134
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| H A D | sinic.cc | 343 case Regs::Command:
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| /gem5/src/cpu/testers/garnet_synthetic_traffic/ |
| H A D | GarnetSyntheticTraffic.cc | 276 MemCmd::Command requestType;
|