Searched refs:Addr (Results 526 - 550 of 767) sorted by relevance

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/gem5/src/cpu/o3/
H A Dcomm.hh97 Addr mispredPC[Impl::MaxThreads];
125 Addr mispredPC;
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.hh147 bool readMemNoEffect(Addr addr, uint8_t *data, unsigned size,
268 Addr startPc;
/gem5/src/mem/cache/prefetch/
H A Dqueued.cc53 QueuedPrefetcher::DeferredPacket::createPkt(Addr paddr, unsigned blk_size,
145 Addr blk_addr = blockAddress(pfi.getAddr());
284 Addr target_paddr = it->translationRequest->getPaddr();
341 QueuedPrefetcher::createPrefetchRequest(Addr addr, PrefetchInfo const &pfi,
376 Addr orig_addr = useVirtualAddresses ?
379 Addr stride = positive_stride ?
382 Addr target_paddr;
410 Addr target_vaddr = positive_stride ?
/gem5/src/mem/cache/
H A Dwrite_queue_entry.cc91 WriteQueueEntry::allocate(Addr blk_addr, unsigned blk_size, PacketPtr target,
148 WriteQueueEntry::matchBlockAddr(const Addr addr, const bool is_secure) const
/gem5/src/mem/
H A Ddram_ctrl.hh670 Addr addr;
719 inline Addr getAddr() const { return addr; }
735 uint32_t _row, uint16_t bank_id, Addr _addr,
842 DRAMPacket* decodeAddr(const PacketPtr pkt, Addr dramPktAddr,
922 Addr burstAlign(Addr addr) const { return (addr & ~(Addr(burstSize - 1))); }
937 std::unordered_set<Addr> isInWriteQueue;
H A Dphysical.hh183 bool isMemAddr(Addr addr) const;
/gem5/src/sim/
H A Dsystem.cc169 Addr shift_amt = findMsbSet(kernelEnd - kernelStart) + 1;
170 loadAddrMask = ((Addr)1 << shift_amt) - 1;
375 Addr
378 Addr return_addr = pagePtr << PageShift;
381 Addr next_return_addr = pagePtr << PageShift;
395 Addr
401 Addr
408 System::isMemAddr(Addr addr) const
/gem5/src/mem/cache/tags/
H A Dcompressed_tags.cc104 CompressedTags::findVictim(Addr addr, const bool is_secure,
114 Addr tag = extractTag(addr);
/gem5/src/dev/x86/
H A Di8042.hh100 Addr dataPort;
101 Addr commandPort;
/gem5/src/gpu-compute/
H A Dtlb_coalescer.hh123 typedef std::unordered_map<Addr, coalescedReq> CoalescingTable;
228 std::queue<Addr> cleanupQueue;
H A Dwavefront.hh192 std::vector<Addr> lastAddr;
263 Addr spillBase;
270 Addr privBase;
275 Addr roBase;
/gem5/src/cpu/simple/
H A Dexec_context.hh71 Addr fetchOffset;
438 readMem(Addr addr, uint8_t *data, unsigned int size,
447 initiateMemRead(Addr addr, unsigned int size,
456 writeMem(uint8_t *data, unsigned int size, Addr addr,
465 Fault amoMem(Addr addr, uint8_t *data, unsigned int size,
471 Fault initiateMemAMO(Addr addr, unsigned int size,
543 demapPage(Addr vaddr, uint64_t asn) override
549 armMonitor(Addr address) override
/gem5/src/arch/arm/
H A Dprocess.cc78 Addr brk_point = roundUp(objFile->dataBase() + objFile->dataSize() +
80 Addr stack_base = 0xbf000000L;
81 Addr max_stack_size = 8 * 1024 * 1024;
82 Addr next_thread_stack_base = stack_base - max_stack_size;
83 Addr mmap_end = 0x40000000L;
93 Addr brk_point = roundUp(objFile->dataBase() + objFile->dataSize() +
95 Addr stack_base = 0x7fffff0000L;
96 Addr max_stack_size = 8 * 1024 * 1024;
97 Addr next_thread_stack_base = stack_base - max_stack_size;
98 Addr mmap_en
[all...]
/gem5/src/dev/arm/
H A Dsmmu_v3_transl.cc66 SMMUTranslRequest::prefetch(Addr addr, uint32_t sid, uint32_t ssid)
145 const Addr next4k = (request.addr + 0x1000ULL) & ~0xfffULL;
236 SMMUTranslationProcess::bypass(Addr addr) const
650 Addr addr, uint16_t asid, uint16_t vmid,
688 SMMUTranslationProcess::walkCacheUpdate(Yield &yield, Addr va,
689 Addr vaMask, Addr pa,
729 SMMUTranslationProcess::walkStage1And2(Yield &yield, Addr addr,
731 unsigned level, Addr walkPtr)
740 Addr pte_add
[all...]
H A Dgpu_nomali.hh173 const Addr pioAddr;
H A Dtimer_sp804.cc70 Addr daddr = pkt->getAddr() - pioAddr;
85 Sp804::Timer::read(PacketPtr pkt, Addr daddr)
125 Addr daddr = pkt->getAddr() - pioAddr;
139 Sp804::Timer::write(PacketPtr pkt, Addr daddr)
H A Dtimer_a9global.cc70 Addr daddr = pkt->getAddr() - pioAddr;
88 A9GlobalTimer::Timer::read(PacketPtr pkt, Addr daddr)
150 Addr daddr = pkt->getAddr() - pioAddr;
165 A9GlobalTimer::Timer::write(PacketPtr pkt, Addr daddr)
/gem5/src/arch/x86/insts/
H A Dmicroop.hh114 std::string generateDisassembly(Addr pc,
/gem5/src/dev/virtio/
H A Dblock.hh75 void readConfig(PacketPtr pkt, Addr cfgOffset);
H A Dconsole.hh73 void readConfig(PacketPtr pkt, Addr cfgOffset);
/gem5/src/arch/sparc/insts/
H A Dmicro.hh61 Addr pc, const SymbolTable *symtab) const override;
/gem5/src/arch/sparc/
H A Dremote_gdb.hh49 bool acc(Addr addr, size_t len);
/gem5/src/cpu/testers/directedtest/
H A DSeriesRequestGenerator.cc92 SeriesRequestGenerator::performCallback(uint32_t proc, Addr address)
H A DInvalidateGenerator.cc103 InvalidateGenerator::performCallback(uint32_t proc, Addr address)
/gem5/src/arch/alpha/
H A Disa.hh66 Addr lock_addr; // lock address for LL/SC

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