stats: update for snoop filter tweak

stats: Update stats to reflect cache changes

Removed unused stats, now counting WriteLineReq, and changed how
uncacheable writes are handled while responses are outstanding.

stats: Match current behaviour

Small changes to the branch predictor and BTB caused stats changes
throughout.

stats: Update stats to reflect changes to cache and crossbar

stats: Update to reflect changes to PCI handling

stats: Bump stats to match current behaviour

stats: updates due to recent chagnesets

stats: remove wb_penalized and wb_penalized_rate

stats: Update stats to match cache changes

stats: Update stats to reflect snoop-filter changes

stats: updates due to recent changesets including d0934b57735a

stats: x86: updates due to patch on vex

stats: Update pc-switcheroo stats

The pc-switcheroo test cases has slightly different timing after
decoupling draining from the SimObject hierarchy. This is expected
since objects aren't drained in the exact same order as before.

stats: Update stats for cache, crossbar and DRAM changes

This update includes the changes to whole-line writes, the refinement
of Read to ReadClean and ReadShared, the introduction of CleanEvict
for snoop-filter tracking, and updates to the DRAM command scheduler
for bank-group-aware scheduling.

Needless to say, almost every regression is affected.

stats: Update stats to reflect cache changes

stats: x86: updates due to change in div latency

stats: update for previous changeset

Very small differences in IQ-specific O3 stats.

stats: update a few stats from long O3 runs

Very small changes to iew.predictedNotTakenIncorrect
and iew.branchMispredicts. Looks like similar updates
were committed on April 3 (changeset 235ff1c046df), but
only for the quick tests.

stats: x86: changes due to recent patches

The change in 20.parser is from new x87 instructions. The change to
pc-o3-timing is not clear to me. It seems that this test might be invoking
some undefined behavior.

stats: updates due to recent changesets.

stats: changes to due to recent set of patches

stats: Update stats to reflect cache and interconnect changes

This is a bulk update of stats to match the changes to cache timing,
interconnect timing, and a few minor changes to the o3 CPU.

stats: Update stats to reflect x86 table walker changes

stats: changes due to recent changesets.

stats: x86: Update stats for the CPUID change.

stats: changes due to recent changesets.

stats: Bump stats for decoder, TLB, prefetcher and DRAM changes

Changes due to speculative execution of an unaligned PC, introduction
of TLB stats, changes and re-work of the prefetcher, and the
introduction of rank-wise refresh in the DRAM controller.

stats: Bump stats for fixes, mostly TLB and WriteInvalidate

x86: Update stats for the new Linux delay port.

x86: Update the stats for the x86 FS o3 boot test.

stats: Bump regressions to match latest changes

Updates after timezone hick-up and sorting of dictionary items in the
SimObject.

stats: changes to x86 o3 fs and sparc fs regression tests.

tests: Update regressions for the new kernels and various preceeding fixes.

stats: Small bump of trailing stats

Somehow these seem to have been missed.

stats: updates due to changes to x86, stale configs.

stats: Add DRAM power statistics to reference output

stats: Bump stats for filter, crossbar and config changes

This patch bumps the stats to reflect the addition of the snoop filter
and snoop stats, the change from bus to crossbar, and the updates to
the ARM regressions that are now using a different CPU and cache
configuration. Lastly, some minor changes are expected due to the
activation cleanup of the CPUs.

stats: Update stats for CPU and cache changes

This patch updates the stats to reflect the fixes and changes to the
CPU (mainly the o3), and the caches.

stats: update for O3 changes

Mostly small differences in total ticks, but O3 stall causes
shifted significantly.

30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex
by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8%
slower.

stats: changes due to recent o3 patch.

stats: Bump stats for the fixes, and mostly DRAM controller changes

stats: Update stats for DRAM changes

This patch updates the stats to reflect the changes to the DRAM
controller.

stats: update stats for cache occupancy and clock domain changes

stats: updates due to changes to ticksToCycles()

stats: Bump stats to match DRAM controller changes

This patch encompasses all the stats updates needed to reflect the
changes to the DRAM controller.

test: update stats

Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.

stats: Update x86 stats after x87 fixes

The updates to the x87 caused the stats for several regressions to
change. This was mainly caused by the addition of a working 32-bit and
80-bit FP load instruction and xsave support.

stats: Cumulative stats update

This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.

The main reason for bundling them up is to minimise the changeset
size.

stats: Update stats for monitor, cache and bus changes

This patch removes the sparse histogram total from the CommMonitor
stats. It also bumps the stats after the unit fixes in the atomic
cache access. Lastly, it updates the stats to match the new port
ordering. All numbers are the same, and the only thing that changes is
which master corresponds to what port index.

stats: Update the stats to reflect bus and memory changes

This patch updates the stats to reflect the addition of the bus stats,
and changes to the bus layers. In addition it updates the stats to
match the addition of the static pipeline latency of the memory
conotroller and the addition of a stat tracking the bytes per
activate.

x86, regressions: updates stats
This is due to op class, function call, walker patches.

x86, stats: updates due to lret bugfix

regressions: updates due to changes to o3 cpu, x86 memory map

regressions: update due to cache latency fix

stats: Update stats for cache retry event check

This patch updates the stats for the affected stats. All the changes
are minimal (in the <0.01% range).

stats: Update stats to reflect bus retry changes

This patch updates the stats after splitting the bus retry into
waiting for the bus and waiting for the peer.

stats: update patches for branch predictor and fetch updates.

stats: Update stats to reflect SimpleDRAM changes

This patch bumps the stats to reflect the slight change in how the
retry is handled, and also the pruning of some redundant stats.

stats: update regressions for o3 changes in renaming and translation.

stats: Update stats for regressions using SimpleDDR3

This patch updates the regression stats to reflect that they are using
the SimpleDDR3 controller by default.

regressions: update stats due to branch predictor changes
The actual statistical values are being updated for only two tests belonging
to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others
the patch updates config.ini and name changes to statistical variables.

x86 regressions: updates due to new instructions and cpuid

stats: update stats for previous changes.

update stats for preceeding changes

stats: Update the stats to reflect the 1GHz default system clock

This patch updates the stats to reflect the change in the default
system clock from 1 THz to 1GHz. The changes are due to the DMA
devices now injecting requests at a lower pace.

stats: Update stats to reflect use of SimpleDRAM

This patch bumps the stats to match the use of SimpleDRAM instead of
SimpleMemory in all inorder and O3 regressions, and also all
full-system regressions. A number of performance-related stats change,
and a whole bunch of stats are added for the memory controller.

Stats: Update stats for cache timings in cycles

This patch updates the stats to reflect the change in how cache
latencies are expressed. In addition, the latencies are now rounded to
multiples of the clock period, thus also affecting other stats.

Stats: Update stats for new default L1-to-L2 bus clock and width

This patch updates the stats to reflect the changes in the clock speed
and width for the bus connecting the L1 and L2 caches.

Stats: Update stats for use of two-level builder

This patch updates the name of the l2 stats.

Stats: Update stats to reflect SimpleMemory bandwidth

This patch simply bumps the stats to reflect the introduction of a
bandwidth limit of 12.8GB/s for SimpleMemory.

Stats: Remove the reference stats that are no longer present

This patch simply removes the commitCommittedInsts and
commitCommittedOps from the reference statistics, following their
removal from the CPU.

x86 Regressions: Update stats due to register predication

Device: Update stats for PIO and PCI latency change

This patch merely updates the regression stats to reflect the change
in PIO and PCI latency.

stats: update stats for icache change not allowing dirty data

Regression: Update stats due to changes to x86 cpuid instruction

Stats: Updates due to bus changes

This patch bumps all the stats to reflect the bus changes, i.e. the
introduction of the state variable, the division into a request and
response layer, and the new default bus width of 8 bytes.

Stats: Update stats for RAS and LRU fixes.

all: Update stats for memory per master and total fix.

X86: Update stats for the CPUID change.

X86 Regression: update stats due to cc register split

stats: update stats for no_value -> nan
Lots of accumulated older changes too.

X86: Update stats for the slightly changed TLB behavior.

bp: fix up stats for changes to branch predictor

stats: update stats for insts/ops and master id changes

Regressions: Update stats due to O3 CPU changes

Yet another merge with the main repository.

SE/FS: Make both SE and FS tests available all the time.