| /gem5/src/arch/arm/ |
| H A D | tlbi_op.hh | 58 TLBIOp(ExceptionLevel _targetEL, bool _secure)
82 ExceptionLevel targetEL;
89 TLBIALL(ExceptionLevel _targetEL, bool _secure)
100 ITLBIALL(ExceptionLevel _targetEL, bool _secure)
113 DTLBIALL(ExceptionLevel _targetEL, bool _secure)
126 TLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
140 ITLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
156 DTLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
172 TLBIALLN(ExceptionLevel _targetEL)
183 TLBIMVAA(ExceptionLevel _targetE
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| H A D | utility.hh | 153 static inline ExceptionLevel
159 inline ExceptionLevel
181 ELUsingAArch32K(ThreadContext *tc, ExceptionLevel el);
183 bool ELIs32(ThreadContext *tc, ExceptionLevel el);
185 bool ELIs64(ThreadContext *tc, ExceptionLevel el);
191 bool ELIsInHost(ThreadContext *tc, ExceptionLevel el);
232 Addr purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el,
234 Addr purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el);
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| H A D | tlb.hh | 148 static ExceptionLevel tranTypeEL(CPSR cpsr, ArmTranslationType type);
215 bool ignore_asn, ExceptionLevel target_el);
254 void flushAllSecurity(bool secure_lookup, ExceptionLevel target_el,
260 void flushAllNs(ExceptionLevel target_el, bool ignore_el = false);
278 ExceptionLevel target_el);
285 ExceptionLevel target_el);
291 void flushMva(Addr mva, bool secure_lookup, ExceptionLevel target_el);
299 void flushIpaVmid(Addr ipa, bool secure_lookup, ExceptionLevel target_el);
413 ExceptionLevel aarch64EL;
456 bool ignore_asn, ExceptionLevel target_e
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| H A D | system.hh | 230 ExceptionLevel highestEL() const
316 static ExceptionLevel highestEL(ThreadContext *tc);
319 static bool haveEL(ThreadContext *tc, ExceptionLevel el);
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| H A D | pagetable.hh | 136 ExceptionLevel el;
194 ExceptionLevel target_el) const
201 bool secure_lookup, bool ignore_asn, ExceptionLevel target_el) const
222 checkELMatch(ExceptionLevel target_el) const
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| H A D | utility.cc | 228 const ExceptionLevel current_el = currEL(tc);
284 ELIs64(ThreadContext *tc, ExceptionLevel el)
290 ELIs32(ThreadContext *tc, ExceptionLevel el)
299 ELIsInHost(ThreadContext *tc, ExceptionLevel el)
310 ELUsingAArch32K(ThreadContext *tc, ExceptionLevel el)
385 purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el,
416 purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el)
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| H A D | interrupts.cc | 61 ExceptionLevel el = currEL(tc);
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| H A D | system.cc | 227 ExceptionLevel
234 ArmSystem::haveEL(ThreadContext *tc, ExceptionLevel el)
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| H A D | types.hh | 585 enum ExceptionLevel { enum in namespace:ArmISA
688 static ExceptionLevel inline
713 return (ExceptionLevel) ((mode >> 2) & 3);
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| H A D | tlb.cc | 153 bool functional, bool ignore_asn, ExceptionLevel target_el)
239 TLB::flushAllSecurity(bool secure_lookup, ExceptionLevel target_el,
271 TLB::flushAllNs(ExceptionLevel target_el, bool ignore_el)
303 ExceptionLevel target_el)
313 TLB::flushAsid(uint64_t asn, bool secure_lookup, ExceptionLevel target_el)
337 TLB::flushMva(Addr mva, bool secure_lookup, ExceptionLevel target_el)
347 bool ignore_asn, ExceptionLevel target_el)
369 TLB::flushIpaVmid(Addr ipa, bool secure_lookup, ExceptionLevel target_el)
1422 ExceptionLevel
1466 ExceptionLevel target_e
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| H A D | faults.hh | 74 ExceptionLevel fromEL; // Source exception level
75 ExceptionLevel toEL; // Target exception level
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| H A D | pmu.cc | 502 const ExceptionLevel el(currEL(cpsr));
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| H A D | table_walker.hh | 701 ExceptionLevel el;
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| H A D | isa.hh | 482 ExceptionLevel el = opModeToEL(
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| H A D | isa.cc | 2133 ExceptionLevel el = (ExceptionLevel) (uint8_t) cpsr.el;
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| H A D | miscregs.cc | 1126 ExceptionLevel highest_el = ArmSystem::highestEL(tc);
1131 ExceptionLevel highest_el = ArmSystem::highestEL(tc);
1161 ExceptionLevel el = currEL(cpsr);
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| H A D | faults.cc | 968 lower_32 = ELIs32(tc, static_cast<ExceptionLevel>(toEL - 1));
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| /gem5/src/arch/arm/insts/ |
| H A D | misc64.cc | 88 ExceptionLevel el, uint32_t immediate) const
123 ExceptionLevel el) const
144 ExceptionLevel el, bool * is_vfp_neon) const
293 ExceptionLevel el, bool * is_vfp_neon) const
378 const ExceptionLevel el = (ExceptionLevel) (uint8_t) cpsr.el;
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| H A D | static_inst.hh | 374 ExceptionLevel targetEL, bool isWfe) const;
393 Fault advSIMDFPAccessTrap64(ExceptionLevel el) const;
432 ExceptionLevel tgtEl, bool isWfe) const;
441 ExceptionLevel tgtEl, bool isWfe) const;
462 Fault undefinedFault32(ThreadContext *tc, ExceptionLevel el) const;
470 Fault undefinedFault64(ThreadContext *tc, ExceptionLevel el) const;
477 Fault sveAccessTrap(ExceptionLevel el) const;
507 ExceptionLevel pstateEL) const;
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| H A D | static_inst.cc | 648 ArmStaticInst::advSIMDFPAccessTrap64(ExceptionLevel el) const
689 const ExceptionLevel el = currEL(tc);
706 const ExceptionLevel cur_el = currEL(tc);
776 ExceptionLevel tgtEl,
803 ExceptionLevel targetEL,
843 ExceptionLevel targetEL,
879 ExceptionLevel curr_el = currEL(tc);
904 ExceptionLevel pstate_el = currEL(tc);
934 ExceptionLevel pstateEL) const
953 ExceptionLevel pstateE
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| H A D | misc64.hh | 133 ExceptionLevel el, uint32_t immediate) const;
136 ExceptionLevel el) const;
139 ExceptionLevel el, bool *is_vfp_neon) const;
142 ExceptionLevel el, bool *is_vfp_neon) const;
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| /gem5/src/dev/arm/ |
| H A D | gic_v3_cpu_interface.hh | 313 bool haveEL(ArmISA::ExceptionLevel el) const;
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| H A D | gic_v3_cpu_interface.cc | 2343 return (ExceptionLevel)(uint8_t) cpsr.el;
2362 Gicv3CPUInterface::haveEL(ExceptionLevel el) const
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