17259Sgblack@eecs.umich.edu/* 214128Sgiacomo.travaglini@arm.com * Copyright (c) 2010-2013, 2015-2019 ARM Limited 37259Sgblack@eecs.umich.edu * All rights reserved 47259Sgblack@eecs.umich.edu * 57259Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67259Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77259Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87259Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97259Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107259Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117259Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127259Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137259Sgblack@eecs.umich.edu * 147259Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 157259Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 167259Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 177259Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 187259Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 197259Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 207259Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 217259Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 227259Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 237259Sgblack@eecs.umich.edu * this software without specific prior written permission. 247259Sgblack@eecs.umich.edu * 257259Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 267259Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 277259Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 287259Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 297259Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 307259Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 317259Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 327259Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 337259Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 347259Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 357259Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 367259Sgblack@eecs.umich.edu * 377259Sgblack@eecs.umich.edu * Authors: Gabe Black 387405SAli.Saidi@ARM.com * Ali Saidi 3910037SARM gem5 Developers * Giacomo Gabrielli 407259Sgblack@eecs.umich.edu */ 417259Sgblack@eecs.umich.edu 4211793Sbrandon.potter@amd.com#include "arch/arm/miscregs.hh" 4311793Sbrandon.potter@amd.com 4411939Snikos.nikoleris@arm.com#include <tuple> 4511939Snikos.nikoleris@arm.com 467405SAli.Saidi@ARM.com#include "arch/arm/isa.hh" 4712334Sgabeblack@google.com#include "base/logging.hh" 4810037SARM gem5 Developers#include "cpu/thread_context.hh" 4910828SGiacomo.Gabrielli@arm.com#include "sim/full_system.hh" 507259Sgblack@eecs.umich.edu 517259Sgblack@eecs.umich.edunamespace ArmISA 527259Sgblack@eecs.umich.edu{ 537259Sgblack@eecs.umich.edu 547259Sgblack@eecs.umich.eduMiscRegIndex 558868SMatt.Horsnell@arm.comdecodeCP14Reg(unsigned crn, unsigned opc1, unsigned crm, unsigned opc2) 568868SMatt.Horsnell@arm.com{ 578868SMatt.Horsnell@arm.com switch(crn) { 588868SMatt.Horsnell@arm.com case 0: 5910037SARM gem5 Developers switch (opc1) { 608868SMatt.Horsnell@arm.com case 0: 6110037SARM gem5 Developers switch (opc2) { 628868SMatt.Horsnell@arm.com case 0: 6310037SARM gem5 Developers switch (crm) { 6410037SARM gem5 Developers case 0: 6510037SARM gem5 Developers return MISCREG_DBGDIDR; 6610037SARM gem5 Developers case 1: 6710037SARM gem5 Developers return MISCREG_DBGDSCRint; 6810037SARM gem5 Developers } 6910037SARM gem5 Developers break; 708868SMatt.Horsnell@arm.com } 7110037SARM gem5 Developers break; 7210037SARM gem5 Developers case 7: 7310037SARM gem5 Developers switch (opc2) { 7410037SARM gem5 Developers case 0: 7510037SARM gem5 Developers switch (crm) { 7610037SARM gem5 Developers case 0: 7710037SARM gem5 Developers return MISCREG_JIDR; 7810037SARM gem5 Developers } 7910037SARM gem5 Developers break; 8010037SARM gem5 Developers } 8110037SARM gem5 Developers break; 829959Schander.sudanthi@arm.com } 8310037SARM gem5 Developers break; 849959Schander.sudanthi@arm.com case 1: 859959Schander.sudanthi@arm.com switch (opc1) { 869959Schander.sudanthi@arm.com case 6: 879959Schander.sudanthi@arm.com switch (crm) { 889959Schander.sudanthi@arm.com case 0: 899959Schander.sudanthi@arm.com switch (opc2) { 909959Schander.sudanthi@arm.com case 0: 919959Schander.sudanthi@arm.com return MISCREG_TEEHBR; 929959Schander.sudanthi@arm.com } 9310037SARM gem5 Developers break; 949959Schander.sudanthi@arm.com } 9510037SARM gem5 Developers break; 9610037SARM gem5 Developers case 7: 9710037SARM gem5 Developers switch (crm) { 9810037SARM gem5 Developers case 0: 9910037SARM gem5 Developers switch (opc2) { 10010037SARM gem5 Developers case 0: 10110037SARM gem5 Developers return MISCREG_JOSCR; 10210037SARM gem5 Developers } 10310037SARM gem5 Developers break; 10410037SARM gem5 Developers } 10510037SARM gem5 Developers break; 1068868SMatt.Horsnell@arm.com } 10710037SARM gem5 Developers break; 10810037SARM gem5 Developers case 2: 10910037SARM gem5 Developers switch (opc1) { 11010037SARM gem5 Developers case 7: 11110037SARM gem5 Developers switch (crm) { 11210037SARM gem5 Developers case 0: 11310037SARM gem5 Developers switch (opc2) { 11410037SARM gem5 Developers case 0: 11510037SARM gem5 Developers return MISCREG_JMCR; 11610037SARM gem5 Developers } 11710037SARM gem5 Developers break; 11810037SARM gem5 Developers } 11910037SARM gem5 Developers break; 12010037SARM gem5 Developers } 12110037SARM gem5 Developers break; 1228868SMatt.Horsnell@arm.com } 12310037SARM gem5 Developers // If we get here then it must be a register that we haven't implemented 12410037SARM gem5 Developers warn("CP14 unimplemented crn[%d], opc1[%d], crm[%d], opc2[%d]", 12510037SARM gem5 Developers crn, opc1, crm, opc2); 12610037SARM gem5 Developers return MISCREG_CP14_UNIMPL; 12710037SARM gem5 Developers} 1288868SMatt.Horsnell@arm.com 12910037SARM gem5 Developersusing namespace std; 13010037SARM gem5 Developers 1318868SMatt.Horsnell@arm.comMiscRegIndex 1327259Sgblack@eecs.umich.edudecodeCP15Reg(unsigned crn, unsigned opc1, unsigned crm, unsigned opc2) 1337259Sgblack@eecs.umich.edu{ 1347259Sgblack@eecs.umich.edu switch (crn) { 1357259Sgblack@eecs.umich.edu case 0: 1367259Sgblack@eecs.umich.edu switch (opc1) { 1377259Sgblack@eecs.umich.edu case 0: 1387259Sgblack@eecs.umich.edu switch (crm) { 1397259Sgblack@eecs.umich.edu case 0: 1407259Sgblack@eecs.umich.edu switch (opc2) { 1417259Sgblack@eecs.umich.edu case 1: 1427259Sgblack@eecs.umich.edu return MISCREG_CTR; 1437259Sgblack@eecs.umich.edu case 2: 1447259Sgblack@eecs.umich.edu return MISCREG_TCMTR; 1457351Sgblack@eecs.umich.edu case 3: 1467351Sgblack@eecs.umich.edu return MISCREG_TLBTR; 1477259Sgblack@eecs.umich.edu case 5: 1487259Sgblack@eecs.umich.edu return MISCREG_MPIDR; 14910037SARM gem5 Developers case 6: 15010037SARM gem5 Developers return MISCREG_REVIDR; 1517259Sgblack@eecs.umich.edu default: 1527259Sgblack@eecs.umich.edu return MISCREG_MIDR; 1537259Sgblack@eecs.umich.edu } 1547259Sgblack@eecs.umich.edu break; 1557259Sgblack@eecs.umich.edu case 1: 1567259Sgblack@eecs.umich.edu switch (opc2) { 1577259Sgblack@eecs.umich.edu case 0: 1587259Sgblack@eecs.umich.edu return MISCREG_ID_PFR0; 1597259Sgblack@eecs.umich.edu case 1: 1607259Sgblack@eecs.umich.edu return MISCREG_ID_PFR1; 1617259Sgblack@eecs.umich.edu case 2: 1627259Sgblack@eecs.umich.edu return MISCREG_ID_DFR0; 1637259Sgblack@eecs.umich.edu case 3: 1647259Sgblack@eecs.umich.edu return MISCREG_ID_AFR0; 1657259Sgblack@eecs.umich.edu case 4: 1667259Sgblack@eecs.umich.edu return MISCREG_ID_MMFR0; 1677259Sgblack@eecs.umich.edu case 5: 1687259Sgblack@eecs.umich.edu return MISCREG_ID_MMFR1; 1697259Sgblack@eecs.umich.edu case 6: 1707259Sgblack@eecs.umich.edu return MISCREG_ID_MMFR2; 1717259Sgblack@eecs.umich.edu case 7: 1727259Sgblack@eecs.umich.edu return MISCREG_ID_MMFR3; 1737259Sgblack@eecs.umich.edu } 1747259Sgblack@eecs.umich.edu break; 1757259Sgblack@eecs.umich.edu case 2: 1767259Sgblack@eecs.umich.edu switch (opc2) { 1777259Sgblack@eecs.umich.edu case 0: 1787259Sgblack@eecs.umich.edu return MISCREG_ID_ISAR0; 1797259Sgblack@eecs.umich.edu case 1: 1807259Sgblack@eecs.umich.edu return MISCREG_ID_ISAR1; 1817259Sgblack@eecs.umich.edu case 2: 1827259Sgblack@eecs.umich.edu return MISCREG_ID_ISAR2; 1837259Sgblack@eecs.umich.edu case 3: 1847259Sgblack@eecs.umich.edu return MISCREG_ID_ISAR3; 1857259Sgblack@eecs.umich.edu case 4: 1867259Sgblack@eecs.umich.edu return MISCREG_ID_ISAR4; 1877259Sgblack@eecs.umich.edu case 5: 1887259Sgblack@eecs.umich.edu return MISCREG_ID_ISAR5; 1897259Sgblack@eecs.umich.edu case 6: 1907259Sgblack@eecs.umich.edu case 7: 1917259Sgblack@eecs.umich.edu return MISCREG_RAZ; // read as zero 1927259Sgblack@eecs.umich.edu } 1937259Sgblack@eecs.umich.edu break; 1947259Sgblack@eecs.umich.edu default: 1957259Sgblack@eecs.umich.edu return MISCREG_RAZ; // read as zero 1967259Sgblack@eecs.umich.edu } 1977259Sgblack@eecs.umich.edu break; 1987259Sgblack@eecs.umich.edu case 1: 1997259Sgblack@eecs.umich.edu if (crm == 0) { 2007259Sgblack@eecs.umich.edu switch (opc2) { 2017259Sgblack@eecs.umich.edu case 0: 2027259Sgblack@eecs.umich.edu return MISCREG_CCSIDR; 2037259Sgblack@eecs.umich.edu case 1: 2047259Sgblack@eecs.umich.edu return MISCREG_CLIDR; 2057259Sgblack@eecs.umich.edu case 7: 2067259Sgblack@eecs.umich.edu return MISCREG_AIDR; 2077259Sgblack@eecs.umich.edu } 2087259Sgblack@eecs.umich.edu } 2097259Sgblack@eecs.umich.edu break; 2107259Sgblack@eecs.umich.edu case 2: 2117259Sgblack@eecs.umich.edu if (crm == 0 && opc2 == 0) { 2127259Sgblack@eecs.umich.edu return MISCREG_CSSELR; 2137259Sgblack@eecs.umich.edu } 2147259Sgblack@eecs.umich.edu break; 21510037SARM gem5 Developers case 4: 21610037SARM gem5 Developers if (crm == 0) { 21710037SARM gem5 Developers if (opc2 == 0) 21810037SARM gem5 Developers return MISCREG_VPIDR; 21910037SARM gem5 Developers else if (opc2 == 5) 22010037SARM gem5 Developers return MISCREG_VMPIDR; 22110037SARM gem5 Developers } 22210037SARM gem5 Developers break; 2237259Sgblack@eecs.umich.edu } 2247259Sgblack@eecs.umich.edu break; 2257259Sgblack@eecs.umich.edu case 1: 2267351Sgblack@eecs.umich.edu if (opc1 == 0) { 2277351Sgblack@eecs.umich.edu if (crm == 0) { 2287351Sgblack@eecs.umich.edu switch (opc2) { 2297351Sgblack@eecs.umich.edu case 0: 2307351Sgblack@eecs.umich.edu return MISCREG_SCTLR; 2317351Sgblack@eecs.umich.edu case 1: 2327351Sgblack@eecs.umich.edu return MISCREG_ACTLR; 2337351Sgblack@eecs.umich.edu case 0x2: 2347351Sgblack@eecs.umich.edu return MISCREG_CPACR; 2357351Sgblack@eecs.umich.edu } 2367351Sgblack@eecs.umich.edu } else if (crm == 1) { 2377351Sgblack@eecs.umich.edu switch (opc2) { 2387351Sgblack@eecs.umich.edu case 0: 2397351Sgblack@eecs.umich.edu return MISCREG_SCR; 2407351Sgblack@eecs.umich.edu case 1: 2417351Sgblack@eecs.umich.edu return MISCREG_SDER; 2427351Sgblack@eecs.umich.edu case 2: 2437351Sgblack@eecs.umich.edu return MISCREG_NSACR; 2447351Sgblack@eecs.umich.edu } 2457351Sgblack@eecs.umich.edu } 24610037SARM gem5 Developers } else if (opc1 == 4) { 24710037SARM gem5 Developers if (crm == 0) { 24810037SARM gem5 Developers if (opc2 == 0) 24910037SARM gem5 Developers return MISCREG_HSCTLR; 25010037SARM gem5 Developers else if (opc2 == 1) 25110037SARM gem5 Developers return MISCREG_HACTLR; 25210037SARM gem5 Developers } else if (crm == 1) { 25310037SARM gem5 Developers switch (opc2) { 25410037SARM gem5 Developers case 0: 25510037SARM gem5 Developers return MISCREG_HCR; 25610037SARM gem5 Developers case 1: 25710037SARM gem5 Developers return MISCREG_HDCR; 25810037SARM gem5 Developers case 2: 25910037SARM gem5 Developers return MISCREG_HCPTR; 26010037SARM gem5 Developers case 3: 26110037SARM gem5 Developers return MISCREG_HSTR; 26210037SARM gem5 Developers case 7: 26310037SARM gem5 Developers return MISCREG_HACR; 26410037SARM gem5 Developers } 26510037SARM gem5 Developers } 2667351Sgblack@eecs.umich.edu } 2677351Sgblack@eecs.umich.edu break; 2687351Sgblack@eecs.umich.edu case 2: 2697406SAli.Saidi@ARM.com if (opc1 == 0 && crm == 0) { 2707259Sgblack@eecs.umich.edu switch (opc2) { 2717259Sgblack@eecs.umich.edu case 0: 2727351Sgblack@eecs.umich.edu return MISCREG_TTBR0; 2737259Sgblack@eecs.umich.edu case 1: 2747351Sgblack@eecs.umich.edu return MISCREG_TTBR1; 2757351Sgblack@eecs.umich.edu case 2: 2767351Sgblack@eecs.umich.edu return MISCREG_TTBCR; 2777259Sgblack@eecs.umich.edu } 27810037SARM gem5 Developers } else if (opc1 == 4) { 27910037SARM gem5 Developers if (crm == 0 && opc2 == 2) 28010037SARM gem5 Developers return MISCREG_HTCR; 28110037SARM gem5 Developers else if (crm == 1 && opc2 == 2) 28210037SARM gem5 Developers return MISCREG_VTCR; 2837259Sgblack@eecs.umich.edu } 2847259Sgblack@eecs.umich.edu break; 2857351Sgblack@eecs.umich.edu case 3: 2867351Sgblack@eecs.umich.edu if (opc1 == 0 && crm == 0 && opc2 == 0) { 2877351Sgblack@eecs.umich.edu return MISCREG_DACR; 2887351Sgblack@eecs.umich.edu } 2897351Sgblack@eecs.umich.edu break; 29013531Sjairo.balart@metempsy.com case 4: 29113531Sjairo.balart@metempsy.com if (opc1 == 0 && crm == 6 && opc2 == 0) { 29213531Sjairo.balart@metempsy.com return MISCREG_ICC_PMR; 29313531Sjairo.balart@metempsy.com } 29413531Sjairo.balart@metempsy.com break; 2957259Sgblack@eecs.umich.edu case 5: 2967259Sgblack@eecs.umich.edu if (opc1 == 0) { 2977259Sgblack@eecs.umich.edu if (crm == 0) { 2987259Sgblack@eecs.umich.edu if (opc2 == 0) { 2997259Sgblack@eecs.umich.edu return MISCREG_DFSR; 3007259Sgblack@eecs.umich.edu } else if (opc2 == 1) { 3017259Sgblack@eecs.umich.edu return MISCREG_IFSR; 3027259Sgblack@eecs.umich.edu } 3037259Sgblack@eecs.umich.edu } else if (crm == 1) { 3047259Sgblack@eecs.umich.edu if (opc2 == 0) { 3057259Sgblack@eecs.umich.edu return MISCREG_ADFSR; 3067259Sgblack@eecs.umich.edu } else if (opc2 == 1) { 3077259Sgblack@eecs.umich.edu return MISCREG_AIFSR; 3087259Sgblack@eecs.umich.edu } 3097259Sgblack@eecs.umich.edu } 31010037SARM gem5 Developers } else if (opc1 == 4) { 31110037SARM gem5 Developers if (crm == 1) { 31210037SARM gem5 Developers if (opc2 == 0) 31310037SARM gem5 Developers return MISCREG_HADFSR; 31410037SARM gem5 Developers else if (opc2 == 1) 31510037SARM gem5 Developers return MISCREG_HAIFSR; 31610037SARM gem5 Developers } else if (crm == 2 && opc2 == 0) { 31710037SARM gem5 Developers return MISCREG_HSR; 31810037SARM gem5 Developers } 3197259Sgblack@eecs.umich.edu } 3207259Sgblack@eecs.umich.edu break; 3217259Sgblack@eecs.umich.edu case 6: 3227351Sgblack@eecs.umich.edu if (opc1 == 0 && crm == 0) { 3237351Sgblack@eecs.umich.edu switch (opc2) { 3247259Sgblack@eecs.umich.edu case 0: 3257351Sgblack@eecs.umich.edu return MISCREG_DFAR; 3267259Sgblack@eecs.umich.edu case 2: 3277351Sgblack@eecs.umich.edu return MISCREG_IFAR; 3287259Sgblack@eecs.umich.edu } 32910037SARM gem5 Developers } else if (opc1 == 4 && crm == 0) { 33010037SARM gem5 Developers switch (opc2) { 33110037SARM gem5 Developers case 0: 33210037SARM gem5 Developers return MISCREG_HDFAR; 33310037SARM gem5 Developers case 2: 33410037SARM gem5 Developers return MISCREG_HIFAR; 33510037SARM gem5 Developers case 4: 33610037SARM gem5 Developers return MISCREG_HPFAR; 33710037SARM gem5 Developers } 3387259Sgblack@eecs.umich.edu } 3397259Sgblack@eecs.umich.edu break; 3407259Sgblack@eecs.umich.edu case 7: 3417259Sgblack@eecs.umich.edu if (opc1 == 0) { 3427259Sgblack@eecs.umich.edu switch (crm) { 3437259Sgblack@eecs.umich.edu case 0: 3447259Sgblack@eecs.umich.edu if (opc2 == 4) { 3457259Sgblack@eecs.umich.edu return MISCREG_NOP; 3467259Sgblack@eecs.umich.edu } 3477259Sgblack@eecs.umich.edu break; 3487259Sgblack@eecs.umich.edu case 1: 3497259Sgblack@eecs.umich.edu switch (opc2) { 3507259Sgblack@eecs.umich.edu case 0: 3517259Sgblack@eecs.umich.edu return MISCREG_ICIALLUIS; 3527259Sgblack@eecs.umich.edu case 6: 3537259Sgblack@eecs.umich.edu return MISCREG_BPIALLIS; 3547259Sgblack@eecs.umich.edu } 3557259Sgblack@eecs.umich.edu break; 3567351Sgblack@eecs.umich.edu case 4: 3577351Sgblack@eecs.umich.edu if (opc2 == 0) { 3587351Sgblack@eecs.umich.edu return MISCREG_PAR; 3597351Sgblack@eecs.umich.edu } 3607351Sgblack@eecs.umich.edu break; 3617259Sgblack@eecs.umich.edu case 5: 3627259Sgblack@eecs.umich.edu switch (opc2) { 3637259Sgblack@eecs.umich.edu case 0: 3647259Sgblack@eecs.umich.edu return MISCREG_ICIALLU; 3657259Sgblack@eecs.umich.edu case 1: 3667259Sgblack@eecs.umich.edu return MISCREG_ICIMVAU; 3677259Sgblack@eecs.umich.edu case 4: 3687259Sgblack@eecs.umich.edu return MISCREG_CP15ISB; 3697259Sgblack@eecs.umich.edu case 6: 3707259Sgblack@eecs.umich.edu return MISCREG_BPIALL; 3717259Sgblack@eecs.umich.edu case 7: 3727259Sgblack@eecs.umich.edu return MISCREG_BPIMVA; 3737259Sgblack@eecs.umich.edu } 3747259Sgblack@eecs.umich.edu break; 3757259Sgblack@eecs.umich.edu case 6: 3767259Sgblack@eecs.umich.edu if (opc2 == 1) { 3777259Sgblack@eecs.umich.edu return MISCREG_DCIMVAC; 3787259Sgblack@eecs.umich.edu } else if (opc2 == 2) { 3797259Sgblack@eecs.umich.edu return MISCREG_DCISW; 3807259Sgblack@eecs.umich.edu } 3817259Sgblack@eecs.umich.edu break; 3827351Sgblack@eecs.umich.edu case 8: 3837351Sgblack@eecs.umich.edu switch (opc2) { 3847351Sgblack@eecs.umich.edu case 0: 38510037SARM gem5 Developers return MISCREG_ATS1CPR; 3867351Sgblack@eecs.umich.edu case 1: 38710037SARM gem5 Developers return MISCREG_ATS1CPW; 3887351Sgblack@eecs.umich.edu case 2: 38910037SARM gem5 Developers return MISCREG_ATS1CUR; 3907351Sgblack@eecs.umich.edu case 3: 39110037SARM gem5 Developers return MISCREG_ATS1CUW; 3927351Sgblack@eecs.umich.edu case 4: 39310037SARM gem5 Developers return MISCREG_ATS12NSOPR; 3947351Sgblack@eecs.umich.edu case 5: 39510037SARM gem5 Developers return MISCREG_ATS12NSOPW; 3967351Sgblack@eecs.umich.edu case 6: 39710037SARM gem5 Developers return MISCREG_ATS12NSOUR; 3987351Sgblack@eecs.umich.edu case 7: 39910037SARM gem5 Developers return MISCREG_ATS12NSOUW; 4007351Sgblack@eecs.umich.edu } 4017351Sgblack@eecs.umich.edu break; 4027259Sgblack@eecs.umich.edu case 10: 4037259Sgblack@eecs.umich.edu switch (opc2) { 4047259Sgblack@eecs.umich.edu case 1: 4057259Sgblack@eecs.umich.edu return MISCREG_DCCMVAC; 4067259Sgblack@eecs.umich.edu case 2: 40710037SARM gem5 Developers return MISCREG_DCCSW; 4087259Sgblack@eecs.umich.edu case 4: 4097259Sgblack@eecs.umich.edu return MISCREG_CP15DSB; 4107259Sgblack@eecs.umich.edu case 5: 4117259Sgblack@eecs.umich.edu return MISCREG_CP15DMB; 4127259Sgblack@eecs.umich.edu } 4137259Sgblack@eecs.umich.edu break; 4147259Sgblack@eecs.umich.edu case 11: 4157259Sgblack@eecs.umich.edu if (opc2 == 1) { 4167259Sgblack@eecs.umich.edu return MISCREG_DCCMVAU; 4177259Sgblack@eecs.umich.edu } 4187259Sgblack@eecs.umich.edu break; 4197259Sgblack@eecs.umich.edu case 13: 4207259Sgblack@eecs.umich.edu if (opc2 == 1) { 4217259Sgblack@eecs.umich.edu return MISCREG_NOP; 4227259Sgblack@eecs.umich.edu } 4237259Sgblack@eecs.umich.edu break; 4247259Sgblack@eecs.umich.edu case 14: 4257259Sgblack@eecs.umich.edu if (opc2 == 1) { 4267259Sgblack@eecs.umich.edu return MISCREG_DCCIMVAC; 4277259Sgblack@eecs.umich.edu } else if (opc2 == 2) { 4287259Sgblack@eecs.umich.edu return MISCREG_DCCISW; 4297259Sgblack@eecs.umich.edu } 4307259Sgblack@eecs.umich.edu break; 4317259Sgblack@eecs.umich.edu } 43210037SARM gem5 Developers } else if (opc1 == 4 && crm == 8) { 43310037SARM gem5 Developers if (opc2 == 0) 43410037SARM gem5 Developers return MISCREG_ATS1HR; 43510037SARM gem5 Developers else if (opc2 == 1) 43610037SARM gem5 Developers return MISCREG_ATS1HW; 4377259Sgblack@eecs.umich.edu } 4387259Sgblack@eecs.umich.edu break; 4397351Sgblack@eecs.umich.edu case 8: 4407351Sgblack@eecs.umich.edu if (opc1 == 0) { 4417351Sgblack@eecs.umich.edu switch (crm) { 4427351Sgblack@eecs.umich.edu case 3: 4437351Sgblack@eecs.umich.edu switch (opc2) { 4447351Sgblack@eecs.umich.edu case 0: 4457351Sgblack@eecs.umich.edu return MISCREG_TLBIALLIS; 4467351Sgblack@eecs.umich.edu case 1: 4477351Sgblack@eecs.umich.edu return MISCREG_TLBIMVAIS; 4487351Sgblack@eecs.umich.edu case 2: 4497351Sgblack@eecs.umich.edu return MISCREG_TLBIASIDIS; 4507351Sgblack@eecs.umich.edu case 3: 4517351Sgblack@eecs.umich.edu return MISCREG_TLBIMVAAIS; 45212576Sgiacomo.travaglini@arm.com case 5: 45312576Sgiacomo.travaglini@arm.com return MISCREG_TLBIMVALIS; 45412576Sgiacomo.travaglini@arm.com case 7: 45512576Sgiacomo.travaglini@arm.com return MISCREG_TLBIMVAALIS; 4567351Sgblack@eecs.umich.edu } 4577351Sgblack@eecs.umich.edu break; 4587351Sgblack@eecs.umich.edu case 5: 4597351Sgblack@eecs.umich.edu switch (opc2) { 4607351Sgblack@eecs.umich.edu case 0: 4617351Sgblack@eecs.umich.edu return MISCREG_ITLBIALL; 4627351Sgblack@eecs.umich.edu case 1: 4637351Sgblack@eecs.umich.edu return MISCREG_ITLBIMVA; 4647351Sgblack@eecs.umich.edu case 2: 4657351Sgblack@eecs.umich.edu return MISCREG_ITLBIASID; 4667351Sgblack@eecs.umich.edu } 4677351Sgblack@eecs.umich.edu break; 4687351Sgblack@eecs.umich.edu case 6: 4697351Sgblack@eecs.umich.edu switch (opc2) { 4707351Sgblack@eecs.umich.edu case 0: 4717351Sgblack@eecs.umich.edu return MISCREG_DTLBIALL; 4727351Sgblack@eecs.umich.edu case 1: 4737351Sgblack@eecs.umich.edu return MISCREG_DTLBIMVA; 4747351Sgblack@eecs.umich.edu case 2: 4757351Sgblack@eecs.umich.edu return MISCREG_DTLBIASID; 4767351Sgblack@eecs.umich.edu } 4777351Sgblack@eecs.umich.edu break; 4787351Sgblack@eecs.umich.edu case 7: 4797351Sgblack@eecs.umich.edu switch (opc2) { 4807351Sgblack@eecs.umich.edu case 0: 4817351Sgblack@eecs.umich.edu return MISCREG_TLBIALL; 4827351Sgblack@eecs.umich.edu case 1: 4837351Sgblack@eecs.umich.edu return MISCREG_TLBIMVA; 4847351Sgblack@eecs.umich.edu case 2: 4857351Sgblack@eecs.umich.edu return MISCREG_TLBIASID; 4867351Sgblack@eecs.umich.edu case 3: 4877351Sgblack@eecs.umich.edu return MISCREG_TLBIMVAA; 48812576Sgiacomo.travaglini@arm.com case 5: 48912576Sgiacomo.travaglini@arm.com return MISCREG_TLBIMVAL; 49012576Sgiacomo.travaglini@arm.com case 7: 49112576Sgiacomo.travaglini@arm.com return MISCREG_TLBIMVAAL; 4927351Sgblack@eecs.umich.edu } 4937351Sgblack@eecs.umich.edu break; 4947351Sgblack@eecs.umich.edu } 49510037SARM gem5 Developers } else if (opc1 == 4) { 49612577Sgiacomo.travaglini@arm.com if (crm == 0) { 49712577Sgiacomo.travaglini@arm.com switch (opc2) { 49812577Sgiacomo.travaglini@arm.com case 1: 49912577Sgiacomo.travaglini@arm.com return MISCREG_TLBIIPAS2IS; 50012577Sgiacomo.travaglini@arm.com case 5: 50112577Sgiacomo.travaglini@arm.com return MISCREG_TLBIIPAS2LIS; 50212577Sgiacomo.travaglini@arm.com } 50312577Sgiacomo.travaglini@arm.com } else if (crm == 3) { 50410037SARM gem5 Developers switch (opc2) { 50510037SARM gem5 Developers case 0: 50610037SARM gem5 Developers return MISCREG_TLBIALLHIS; 50710037SARM gem5 Developers case 1: 50810037SARM gem5 Developers return MISCREG_TLBIMVAHIS; 50910037SARM gem5 Developers case 4: 51010037SARM gem5 Developers return MISCREG_TLBIALLNSNHIS; 51112576Sgiacomo.travaglini@arm.com case 5: 51212576Sgiacomo.travaglini@arm.com return MISCREG_TLBIMVALHIS; 51310037SARM gem5 Developers } 51412577Sgiacomo.travaglini@arm.com } else if (crm == 4) { 51512577Sgiacomo.travaglini@arm.com switch (opc2) { 51612577Sgiacomo.travaglini@arm.com case 1: 51712577Sgiacomo.travaglini@arm.com return MISCREG_TLBIIPAS2; 51812577Sgiacomo.travaglini@arm.com case 5: 51912577Sgiacomo.travaglini@arm.com return MISCREG_TLBIIPAS2L; 52012577Sgiacomo.travaglini@arm.com } 52110037SARM gem5 Developers } else if (crm == 7) { 52210037SARM gem5 Developers switch (opc2) { 52310037SARM gem5 Developers case 0: 52410037SARM gem5 Developers return MISCREG_TLBIALLH; 52510037SARM gem5 Developers case 1: 52610037SARM gem5 Developers return MISCREG_TLBIMVAH; 52710037SARM gem5 Developers case 4: 52810037SARM gem5 Developers return MISCREG_TLBIALLNSNH; 52912576Sgiacomo.travaglini@arm.com case 5: 53012576Sgiacomo.travaglini@arm.com return MISCREG_TLBIMVALH; 53110037SARM gem5 Developers } 53210037SARM gem5 Developers } 5337351Sgblack@eecs.umich.edu } 5347351Sgblack@eecs.umich.edu break; 5357259Sgblack@eecs.umich.edu case 9: 53612530Sgiacomo.travaglini@arm.com // Every cop register with CRn = 9 and CRm in 53712530Sgiacomo.travaglini@arm.com // {0-2}, {5-8} is implementation defined regardless 53812530Sgiacomo.travaglini@arm.com // of opc1 and opc2. 53912530Sgiacomo.travaglini@arm.com switch (crm) { 54012530Sgiacomo.travaglini@arm.com case 0: 54112530Sgiacomo.travaglini@arm.com case 1: 54212530Sgiacomo.travaglini@arm.com case 2: 54312530Sgiacomo.travaglini@arm.com case 5: 54412530Sgiacomo.travaglini@arm.com case 6: 54512530Sgiacomo.travaglini@arm.com case 7: 54612530Sgiacomo.travaglini@arm.com case 8: 54712530Sgiacomo.travaglini@arm.com return MISCREG_IMPDEF_UNIMPL; 54812530Sgiacomo.travaglini@arm.com } 5497583SAli.Saidi@arm.com if (opc1 == 0) { 5507259Sgblack@eecs.umich.edu switch (crm) { 5517259Sgblack@eecs.umich.edu case 12: 5527583SAli.Saidi@arm.com switch (opc2) { 5537583SAli.Saidi@arm.com case 0: 5547583SAli.Saidi@arm.com return MISCREG_PMCR; 5557583SAli.Saidi@arm.com case 1: 5567583SAli.Saidi@arm.com return MISCREG_PMCNTENSET; 5577583SAli.Saidi@arm.com case 2: 5587583SAli.Saidi@arm.com return MISCREG_PMCNTENCLR; 5597583SAli.Saidi@arm.com case 3: 5607583SAli.Saidi@arm.com return MISCREG_PMOVSR; 5617583SAli.Saidi@arm.com case 4: 5627583SAli.Saidi@arm.com return MISCREG_PMSWINC; 5637583SAli.Saidi@arm.com case 5: 5647583SAli.Saidi@arm.com return MISCREG_PMSELR; 5657583SAli.Saidi@arm.com case 6: 5667583SAli.Saidi@arm.com return MISCREG_PMCEID0; 5677583SAli.Saidi@arm.com case 7: 5687583SAli.Saidi@arm.com return MISCREG_PMCEID1; 5697583SAli.Saidi@arm.com } 5708988SAli.Saidi@ARM.com break; 5717259Sgblack@eecs.umich.edu case 13: 5727583SAli.Saidi@arm.com switch (opc2) { 5737583SAli.Saidi@arm.com case 0: 5747583SAli.Saidi@arm.com return MISCREG_PMCCNTR; 5757583SAli.Saidi@arm.com case 1: 57610037SARM gem5 Developers // Selector is PMSELR.SEL 57710037SARM gem5 Developers return MISCREG_PMXEVTYPER_PMCCFILTR; 5787583SAli.Saidi@arm.com case 2: 5797583SAli.Saidi@arm.com return MISCREG_PMXEVCNTR; 5807583SAli.Saidi@arm.com } 5818988SAli.Saidi@ARM.com break; 5827259Sgblack@eecs.umich.edu case 14: 5837583SAli.Saidi@arm.com switch (opc2) { 5847583SAli.Saidi@arm.com case 0: 5857583SAli.Saidi@arm.com return MISCREG_PMUSERENR; 5867583SAli.Saidi@arm.com case 1: 5877583SAli.Saidi@arm.com return MISCREG_PMINTENSET; 5887583SAli.Saidi@arm.com case 2: 5897583SAli.Saidi@arm.com return MISCREG_PMINTENCLR; 59010037SARM gem5 Developers case 3: 59110037SARM gem5 Developers return MISCREG_PMOVSSET; 5927583SAli.Saidi@arm.com } 5938988SAli.Saidi@ARM.com break; 5947259Sgblack@eecs.umich.edu } 5958058SAli.Saidi@ARM.com } else if (opc1 == 1) { 5968549Sdaniel.johnson@arm.com switch (crm) { 5978549Sdaniel.johnson@arm.com case 0: 5988549Sdaniel.johnson@arm.com switch (opc2) { 5998549Sdaniel.johnson@arm.com case 2: // L2CTLR, L2 Control Register 6008549Sdaniel.johnson@arm.com return MISCREG_L2CTLR; 60110037SARM gem5 Developers case 3: 60210037SARM gem5 Developers return MISCREG_L2ECTLR; 6038549Sdaniel.johnson@arm.com } 6048988SAli.Saidi@ARM.com break; 60510037SARM gem5 Developers break; 6068549Sdaniel.johnson@arm.com } 6077259Sgblack@eecs.umich.edu } 6087259Sgblack@eecs.umich.edu break; 6097351Sgblack@eecs.umich.edu case 10: 6107351Sgblack@eecs.umich.edu if (opc1 == 0) { 6117351Sgblack@eecs.umich.edu // crm 0, 1, 4, and 8, with op2 0 - 7, reserved for TLB lockdown 61212530Sgiacomo.travaglini@arm.com if (crm < 2) { 61312530Sgiacomo.travaglini@arm.com return MISCREG_IMPDEF_UNIMPL; 61412530Sgiacomo.travaglini@arm.com } else if (crm == 2) { // TEX Remap Registers 6157351Sgblack@eecs.umich.edu if (opc2 == 0) { 61610037SARM gem5 Developers // Selector is TTBCR.EAE 61710037SARM gem5 Developers return MISCREG_PRRR_MAIR0; 6187351Sgblack@eecs.umich.edu } else if (opc2 == 1) { 61910037SARM gem5 Developers // Selector is TTBCR.EAE 62010037SARM gem5 Developers return MISCREG_NMRR_MAIR1; 6217351Sgblack@eecs.umich.edu } 62210037SARM gem5 Developers } else if (crm == 3) { 62310037SARM gem5 Developers if (opc2 == 0) { 62410037SARM gem5 Developers return MISCREG_AMAIR0; 62510037SARM gem5 Developers } else if (opc2 == 1) { 62610037SARM gem5 Developers return MISCREG_AMAIR1; 62710037SARM gem5 Developers } 62810037SARM gem5 Developers } 62910037SARM gem5 Developers } else if (opc1 == 4) { 63010037SARM gem5 Developers // crm 0, 1, 4, and 8, with op2 0 - 7, reserved for TLB lockdown 63110037SARM gem5 Developers if (crm == 2) { 63210037SARM gem5 Developers if (opc2 == 0) 63310037SARM gem5 Developers return MISCREG_HMAIR0; 63410037SARM gem5 Developers else if (opc2 == 1) 63510037SARM gem5 Developers return MISCREG_HMAIR1; 63610037SARM gem5 Developers } else if (crm == 3) { 63710037SARM gem5 Developers if (opc2 == 0) 63810037SARM gem5 Developers return MISCREG_HAMAIR0; 63910037SARM gem5 Developers else if (opc2 == 1) 64010037SARM gem5 Developers return MISCREG_HAMAIR1; 6417351Sgblack@eecs.umich.edu } 6427351Sgblack@eecs.umich.edu } 6437351Sgblack@eecs.umich.edu break; 6447259Sgblack@eecs.umich.edu case 11: 6458737Skoansin.tan@gmail.com if (opc1 <=7) { 6467259Sgblack@eecs.umich.edu switch (crm) { 6477259Sgblack@eecs.umich.edu case 0: 6487259Sgblack@eecs.umich.edu case 1: 6497259Sgblack@eecs.umich.edu case 2: 6507259Sgblack@eecs.umich.edu case 3: 6517259Sgblack@eecs.umich.edu case 4: 6527259Sgblack@eecs.umich.edu case 5: 6537259Sgblack@eecs.umich.edu case 6: 6547259Sgblack@eecs.umich.edu case 7: 6557259Sgblack@eecs.umich.edu case 8: 6567259Sgblack@eecs.umich.edu case 15: 6577259Sgblack@eecs.umich.edu // Reserved for DMA operations for TCM access 65812530Sgiacomo.travaglini@arm.com return MISCREG_IMPDEF_UNIMPL; 65912530Sgiacomo.travaglini@arm.com default: 6607259Sgblack@eecs.umich.edu break; 6617259Sgblack@eecs.umich.edu } 6627259Sgblack@eecs.umich.edu } 6637259Sgblack@eecs.umich.edu break; 6647351Sgblack@eecs.umich.edu case 12: 6657351Sgblack@eecs.umich.edu if (opc1 == 0) { 6667351Sgblack@eecs.umich.edu if (crm == 0) { 6677351Sgblack@eecs.umich.edu if (opc2 == 0) { 6687351Sgblack@eecs.umich.edu return MISCREG_VBAR; 6697351Sgblack@eecs.umich.edu } else if (opc2 == 1) { 6707351Sgblack@eecs.umich.edu return MISCREG_MVBAR; 6717351Sgblack@eecs.umich.edu } 6727351Sgblack@eecs.umich.edu } else if (crm == 1) { 6737351Sgblack@eecs.umich.edu if (opc2 == 0) { 6747351Sgblack@eecs.umich.edu return MISCREG_ISR; 6757351Sgblack@eecs.umich.edu } 67613531Sjairo.balart@metempsy.com } else if (crm == 8) { 67713531Sjairo.balart@metempsy.com switch (opc2) { 67813531Sjairo.balart@metempsy.com case 0: 67913531Sjairo.balart@metempsy.com return MISCREG_ICC_IAR0; 68013531Sjairo.balart@metempsy.com case 1: 68113531Sjairo.balart@metempsy.com return MISCREG_ICC_EOIR0; 68213531Sjairo.balart@metempsy.com case 2: 68313531Sjairo.balart@metempsy.com return MISCREG_ICC_HPPIR0; 68413531Sjairo.balart@metempsy.com case 3: 68513531Sjairo.balart@metempsy.com return MISCREG_ICC_BPR0; 68613531Sjairo.balart@metempsy.com case 4: 68713531Sjairo.balart@metempsy.com return MISCREG_ICC_AP0R0; 68813531Sjairo.balart@metempsy.com case 5: 68913531Sjairo.balart@metempsy.com return MISCREG_ICC_AP0R1; 69013531Sjairo.balart@metempsy.com case 6: 69113531Sjairo.balart@metempsy.com return MISCREG_ICC_AP0R2; 69213531Sjairo.balart@metempsy.com case 7: 69313531Sjairo.balart@metempsy.com return MISCREG_ICC_AP0R3; 69413531Sjairo.balart@metempsy.com } 69513531Sjairo.balart@metempsy.com } else if (crm == 9) { 69613531Sjairo.balart@metempsy.com switch (opc2) { 69713531Sjairo.balart@metempsy.com case 0: 69813531Sjairo.balart@metempsy.com return MISCREG_ICC_AP1R0; 69913531Sjairo.balart@metempsy.com case 1: 70013531Sjairo.balart@metempsy.com return MISCREG_ICC_AP1R1; 70113531Sjairo.balart@metempsy.com case 2: 70213531Sjairo.balart@metempsy.com return MISCREG_ICC_AP1R2; 70313531Sjairo.balart@metempsy.com case 3: 70413531Sjairo.balart@metempsy.com return MISCREG_ICC_AP1R3; 70513531Sjairo.balart@metempsy.com } 70613531Sjairo.balart@metempsy.com } else if (crm == 11) { 70713531Sjairo.balart@metempsy.com switch (opc2) { 70813531Sjairo.balart@metempsy.com case 1: 70913531Sjairo.balart@metempsy.com return MISCREG_ICC_DIR; 71013531Sjairo.balart@metempsy.com case 3: 71113531Sjairo.balart@metempsy.com return MISCREG_ICC_RPR; 71213531Sjairo.balart@metempsy.com } 71313531Sjairo.balart@metempsy.com } else if (crm == 12) { 71413531Sjairo.balart@metempsy.com switch (opc2) { 71513531Sjairo.balart@metempsy.com case 0: 71613531Sjairo.balart@metempsy.com return MISCREG_ICC_IAR1; 71713531Sjairo.balart@metempsy.com case 1: 71813531Sjairo.balart@metempsy.com return MISCREG_ICC_EOIR1; 71913531Sjairo.balart@metempsy.com case 2: 72013531Sjairo.balart@metempsy.com return MISCREG_ICC_HPPIR1; 72113531Sjairo.balart@metempsy.com case 3: 72213531Sjairo.balart@metempsy.com return MISCREG_ICC_BPR1; 72313531Sjairo.balart@metempsy.com case 4: 72413531Sjairo.balart@metempsy.com return MISCREG_ICC_CTLR; 72513531Sjairo.balart@metempsy.com case 5: 72613531Sjairo.balart@metempsy.com return MISCREG_ICC_SRE; 72713531Sjairo.balart@metempsy.com case 6: 72813531Sjairo.balart@metempsy.com return MISCREG_ICC_IGRPEN0; 72913531Sjairo.balart@metempsy.com case 7: 73013531Sjairo.balart@metempsy.com return MISCREG_ICC_IGRPEN1; 73113531Sjairo.balart@metempsy.com } 7327351Sgblack@eecs.umich.edu } 73310037SARM gem5 Developers } else if (opc1 == 4) { 73413531Sjairo.balart@metempsy.com if (crm == 0 && opc2 == 0) { 73510037SARM gem5 Developers return MISCREG_HVBAR; 73613531Sjairo.balart@metempsy.com } else if (crm == 8) { 73713531Sjairo.balart@metempsy.com switch (opc2) { 73813531Sjairo.balart@metempsy.com case 0: 73913531Sjairo.balart@metempsy.com return MISCREG_ICH_AP0R0; 74013531Sjairo.balart@metempsy.com case 1: 74113531Sjairo.balart@metempsy.com return MISCREG_ICH_AP0R1; 74213531Sjairo.balart@metempsy.com case 2: 74313531Sjairo.balart@metempsy.com return MISCREG_ICH_AP0R2; 74413531Sjairo.balart@metempsy.com case 3: 74513531Sjairo.balart@metempsy.com return MISCREG_ICH_AP0R3; 74613531Sjairo.balart@metempsy.com } 74713531Sjairo.balart@metempsy.com } else if (crm == 9) { 74813531Sjairo.balart@metempsy.com switch (opc2) { 74913531Sjairo.balart@metempsy.com case 0: 75013531Sjairo.balart@metempsy.com return MISCREG_ICH_AP1R0; 75113531Sjairo.balart@metempsy.com case 1: 75213531Sjairo.balart@metempsy.com return MISCREG_ICH_AP1R1; 75313531Sjairo.balart@metempsy.com case 2: 75413531Sjairo.balart@metempsy.com return MISCREG_ICH_AP1R2; 75513531Sjairo.balart@metempsy.com case 3: 75613531Sjairo.balart@metempsy.com return MISCREG_ICH_AP1R3; 75713531Sjairo.balart@metempsy.com case 5: 75813531Sjairo.balart@metempsy.com return MISCREG_ICC_HSRE; 75913531Sjairo.balart@metempsy.com } 76013531Sjairo.balart@metempsy.com } else if (crm == 11) { 76113531Sjairo.balart@metempsy.com switch (opc2) { 76213531Sjairo.balart@metempsy.com case 0: 76313531Sjairo.balart@metempsy.com return MISCREG_ICH_HCR; 76413531Sjairo.balart@metempsy.com case 1: 76513531Sjairo.balart@metempsy.com return MISCREG_ICH_VTR; 76613531Sjairo.balart@metempsy.com case 2: 76713531Sjairo.balart@metempsy.com return MISCREG_ICH_MISR; 76813531Sjairo.balart@metempsy.com case 3: 76913531Sjairo.balart@metempsy.com return MISCREG_ICH_EISR; 77013531Sjairo.balart@metempsy.com case 5: 77113531Sjairo.balart@metempsy.com return MISCREG_ICH_ELRSR; 77213531Sjairo.balart@metempsy.com case 7: 77313531Sjairo.balart@metempsy.com return MISCREG_ICH_VMCR; 77413531Sjairo.balart@metempsy.com } 77513531Sjairo.balart@metempsy.com } else if (crm == 12) { 77613531Sjairo.balart@metempsy.com switch (opc2) { 77713531Sjairo.balart@metempsy.com case 0: 77813531Sjairo.balart@metempsy.com return MISCREG_ICH_LR0; 77913531Sjairo.balart@metempsy.com case 1: 78013531Sjairo.balart@metempsy.com return MISCREG_ICH_LR1; 78113531Sjairo.balart@metempsy.com case 2: 78213531Sjairo.balart@metempsy.com return MISCREG_ICH_LR2; 78313531Sjairo.balart@metempsy.com case 3: 78413531Sjairo.balart@metempsy.com return MISCREG_ICH_LR3; 78513531Sjairo.balart@metempsy.com case 4: 78613531Sjairo.balart@metempsy.com return MISCREG_ICH_LR4; 78713531Sjairo.balart@metempsy.com case 5: 78813531Sjairo.balart@metempsy.com return MISCREG_ICH_LR5; 78913531Sjairo.balart@metempsy.com case 6: 79013531Sjairo.balart@metempsy.com return MISCREG_ICH_LR6; 79113531Sjairo.balart@metempsy.com case 7: 79213531Sjairo.balart@metempsy.com return MISCREG_ICH_LR7; 79313531Sjairo.balart@metempsy.com } 79413531Sjairo.balart@metempsy.com } else if (crm == 13) { 79513531Sjairo.balart@metempsy.com switch (opc2) { 79613531Sjairo.balart@metempsy.com case 0: 79713531Sjairo.balart@metempsy.com return MISCREG_ICH_LR8; 79813531Sjairo.balart@metempsy.com case 1: 79913531Sjairo.balart@metempsy.com return MISCREG_ICH_LR9; 80013531Sjairo.balart@metempsy.com case 2: 80113531Sjairo.balart@metempsy.com return MISCREG_ICH_LR10; 80213531Sjairo.balart@metempsy.com case 3: 80313531Sjairo.balart@metempsy.com return MISCREG_ICH_LR11; 80413531Sjairo.balart@metempsy.com case 4: 80513531Sjairo.balart@metempsy.com return MISCREG_ICH_LR12; 80613531Sjairo.balart@metempsy.com case 5: 80713531Sjairo.balart@metempsy.com return MISCREG_ICH_LR13; 80813531Sjairo.balart@metempsy.com case 6: 80913531Sjairo.balart@metempsy.com return MISCREG_ICH_LR14; 81013531Sjairo.balart@metempsy.com case 7: 81113531Sjairo.balart@metempsy.com return MISCREG_ICH_LR15; 81213531Sjairo.balart@metempsy.com } 81313531Sjairo.balart@metempsy.com } else if (crm == 14) { 81413531Sjairo.balart@metempsy.com switch (opc2) { 81513531Sjairo.balart@metempsy.com case 0: 81613531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC0; 81713531Sjairo.balart@metempsy.com case 1: 81813531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC1; 81913531Sjairo.balart@metempsy.com case 2: 82013531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC2; 82113531Sjairo.balart@metempsy.com case 3: 82213531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC3; 82313531Sjairo.balart@metempsy.com case 4: 82413531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC4; 82513531Sjairo.balart@metempsy.com case 5: 82613531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC5; 82713531Sjairo.balart@metempsy.com case 6: 82813531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC6; 82913531Sjairo.balart@metempsy.com case 7: 83013531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC7; 83113531Sjairo.balart@metempsy.com } 83213531Sjairo.balart@metempsy.com } else if (crm == 15) { 83313531Sjairo.balart@metempsy.com switch (opc2) { 83413531Sjairo.balart@metempsy.com case 0: 83513531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC8; 83613531Sjairo.balart@metempsy.com case 1: 83713531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC9; 83813531Sjairo.balart@metempsy.com case 2: 83913531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC10; 84013531Sjairo.balart@metempsy.com case 3: 84113531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC11; 84213531Sjairo.balart@metempsy.com case 4: 84313531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC12; 84413531Sjairo.balart@metempsy.com case 5: 84513531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC13; 84613531Sjairo.balart@metempsy.com case 6: 84713531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC14; 84813531Sjairo.balart@metempsy.com case 7: 84913531Sjairo.balart@metempsy.com return MISCREG_ICH_LRC15; 85013531Sjairo.balart@metempsy.com } 85113531Sjairo.balart@metempsy.com } 85213531Sjairo.balart@metempsy.com } else if (opc1 == 6) { 85313531Sjairo.balart@metempsy.com if (crm == 12) { 85413531Sjairo.balart@metempsy.com switch (opc2) { 85513531Sjairo.balart@metempsy.com case 4: 85613531Sjairo.balart@metempsy.com return MISCREG_ICC_MCTLR; 85713531Sjairo.balart@metempsy.com case 5: 85813531Sjairo.balart@metempsy.com return MISCREG_ICC_MSRE; 85913531Sjairo.balart@metempsy.com case 7: 86013531Sjairo.balart@metempsy.com return MISCREG_ICC_MGRPEN1; 86113531Sjairo.balart@metempsy.com } 86213531Sjairo.balart@metempsy.com } 8637351Sgblack@eecs.umich.edu } 8647351Sgblack@eecs.umich.edu break; 8657259Sgblack@eecs.umich.edu case 13: 8667259Sgblack@eecs.umich.edu if (opc1 == 0) { 8677259Sgblack@eecs.umich.edu if (crm == 0) { 8687406SAli.Saidi@ARM.com switch (opc2) { 8697351Sgblack@eecs.umich.edu case 0: 87010037SARM gem5 Developers return MISCREG_FCSEIDR; 8717259Sgblack@eecs.umich.edu case 1: 8727259Sgblack@eecs.umich.edu return MISCREG_CONTEXTIDR; 8737259Sgblack@eecs.umich.edu case 2: 8747259Sgblack@eecs.umich.edu return MISCREG_TPIDRURW; 8757259Sgblack@eecs.umich.edu case 3: 8767259Sgblack@eecs.umich.edu return MISCREG_TPIDRURO; 8777259Sgblack@eecs.umich.edu case 4: 8787259Sgblack@eecs.umich.edu return MISCREG_TPIDRPRW; 8797259Sgblack@eecs.umich.edu } 8807259Sgblack@eecs.umich.edu } 88110037SARM gem5 Developers } else if (opc1 == 4) { 88210037SARM gem5 Developers if (crm == 0 && opc2 == 2) 88310037SARM gem5 Developers return MISCREG_HTPIDR; 88410037SARM gem5 Developers } 88510037SARM gem5 Developers break; 88610037SARM gem5 Developers case 14: 88710037SARM gem5 Developers if (opc1 == 0) { 88810037SARM gem5 Developers switch (crm) { 88910037SARM gem5 Developers case 0: 89010037SARM gem5 Developers if (opc2 == 0) 89110037SARM gem5 Developers return MISCREG_CNTFRQ; 89210037SARM gem5 Developers break; 89310037SARM gem5 Developers case 1: 89410037SARM gem5 Developers if (opc2 == 0) 89510037SARM gem5 Developers return MISCREG_CNTKCTL; 89610037SARM gem5 Developers break; 89710037SARM gem5 Developers case 2: 89810037SARM gem5 Developers if (opc2 == 0) 89910037SARM gem5 Developers return MISCREG_CNTP_TVAL; 90010037SARM gem5 Developers else if (opc2 == 1) 90110037SARM gem5 Developers return MISCREG_CNTP_CTL; 90210037SARM gem5 Developers break; 90310037SARM gem5 Developers case 3: 90410037SARM gem5 Developers if (opc2 == 0) 90510037SARM gem5 Developers return MISCREG_CNTV_TVAL; 90610037SARM gem5 Developers else if (opc2 == 1) 90710037SARM gem5 Developers return MISCREG_CNTV_CTL; 90810037SARM gem5 Developers break; 90910037SARM gem5 Developers } 91010037SARM gem5 Developers } else if (opc1 == 4) { 91110037SARM gem5 Developers if (crm == 1 && opc2 == 0) { 91210037SARM gem5 Developers return MISCREG_CNTHCTL; 91310037SARM gem5 Developers } else if (crm == 2) { 91410037SARM gem5 Developers if (opc2 == 0) 91510037SARM gem5 Developers return MISCREG_CNTHP_TVAL; 91610037SARM gem5 Developers else if (opc2 == 1) 91710037SARM gem5 Developers return MISCREG_CNTHP_CTL; 91810037SARM gem5 Developers } 9197259Sgblack@eecs.umich.edu } 9207259Sgblack@eecs.umich.edu break; 9217259Sgblack@eecs.umich.edu case 15: 9227259Sgblack@eecs.umich.edu // Implementation defined 92312530Sgiacomo.travaglini@arm.com return MISCREG_IMPDEF_UNIMPL; 9247259Sgblack@eecs.umich.edu } 9257259Sgblack@eecs.umich.edu // Unrecognized register 92610037SARM gem5 Developers return MISCREG_CP15_UNIMPL; 9277259Sgblack@eecs.umich.edu} 9287259Sgblack@eecs.umich.edu 92910037SARM gem5 DevelopersMiscRegIndex 93010037SARM gem5 DevelopersdecodeCP15Reg64(unsigned crm, unsigned opc1) 93110037SARM gem5 Developers{ 93210037SARM gem5 Developers switch (crm) { 93310037SARM gem5 Developers case 2: 93410037SARM gem5 Developers switch (opc1) { 93510037SARM gem5 Developers case 0: 93610037SARM gem5 Developers return MISCREG_TTBR0; 93710037SARM gem5 Developers case 1: 93810037SARM gem5 Developers return MISCREG_TTBR1; 93910037SARM gem5 Developers case 4: 94010037SARM gem5 Developers return MISCREG_HTTBR; 94110037SARM gem5 Developers case 6: 94210037SARM gem5 Developers return MISCREG_VTTBR; 94310037SARM gem5 Developers } 94410037SARM gem5 Developers break; 94510037SARM gem5 Developers case 7: 94610037SARM gem5 Developers if (opc1 == 0) 94710037SARM gem5 Developers return MISCREG_PAR; 94810037SARM gem5 Developers break; 94910037SARM gem5 Developers case 14: 95010037SARM gem5 Developers switch (opc1) { 95110037SARM gem5 Developers case 0: 95210037SARM gem5 Developers return MISCREG_CNTPCT; 95310037SARM gem5 Developers case 1: 95410037SARM gem5 Developers return MISCREG_CNTVCT; 95510037SARM gem5 Developers case 2: 95610037SARM gem5 Developers return MISCREG_CNTP_CVAL; 95710037SARM gem5 Developers case 3: 95810037SARM gem5 Developers return MISCREG_CNTV_CVAL; 95910037SARM gem5 Developers case 4: 96010037SARM gem5 Developers return MISCREG_CNTVOFF; 96110037SARM gem5 Developers case 6: 96210037SARM gem5 Developers return MISCREG_CNTHP_CVAL; 96310037SARM gem5 Developers } 96410037SARM gem5 Developers break; 96514229Sgiacomo.travaglini@arm.com case 12: 96614229Sgiacomo.travaglini@arm.com switch (opc1) { 96714229Sgiacomo.travaglini@arm.com case 0: 96814229Sgiacomo.travaglini@arm.com return MISCREG_ICC_SGI1R; 96914229Sgiacomo.travaglini@arm.com case 1: 97014229Sgiacomo.travaglini@arm.com return MISCREG_ICC_ASGI1R; 97114229Sgiacomo.travaglini@arm.com case 2: 97214229Sgiacomo.travaglini@arm.com return MISCREG_ICC_SGI0R; 97314229Sgiacomo.travaglini@arm.com default: 97414229Sgiacomo.travaglini@arm.com break; 97514229Sgiacomo.travaglini@arm.com } 97614229Sgiacomo.travaglini@arm.com break; 97710037SARM gem5 Developers case 15: 97810037SARM gem5 Developers if (opc1 == 0) 97910037SARM gem5 Developers return MISCREG_CPUMERRSR; 98010037SARM gem5 Developers else if (opc1 == 1) 98110037SARM gem5 Developers return MISCREG_L2MERRSR; 98210037SARM gem5 Developers break; 98310037SARM gem5 Developers } 98410037SARM gem5 Developers // Unrecognized register 98510037SARM gem5 Developers return MISCREG_CP15_UNIMPL; 9868902Sandreas.hansson@arm.com} 98710037SARM gem5 Developers 98811939Snikos.nikoleris@arm.comstd::tuple<bool, bool> 98911939Snikos.nikoleris@arm.comcanReadCoprocReg(MiscRegIndex reg, SCR scr, CPSR cpsr) 99010037SARM gem5 Developers{ 99110037SARM gem5 Developers bool secure = !scr.ns; 99211939Snikos.nikoleris@arm.com bool canRead = false; 99311939Snikos.nikoleris@arm.com bool undefined = false; 99410037SARM gem5 Developers 99510037SARM gem5 Developers switch (cpsr.mode) { 99610037SARM gem5 Developers case MODE_USER: 99710037SARM gem5 Developers canRead = secure ? miscRegInfo[reg][MISCREG_USR_S_RD] : 99810037SARM gem5 Developers miscRegInfo[reg][MISCREG_USR_NS_RD]; 99910037SARM gem5 Developers break; 100010037SARM gem5 Developers case MODE_FIQ: 100110037SARM gem5 Developers case MODE_IRQ: 100210037SARM gem5 Developers case MODE_SVC: 100310037SARM gem5 Developers case MODE_ABORT: 100410037SARM gem5 Developers case MODE_UNDEFINED: 100510037SARM gem5 Developers case MODE_SYSTEM: 100610037SARM gem5 Developers canRead = secure ? miscRegInfo[reg][MISCREG_PRI_S_RD] : 100710037SARM gem5 Developers miscRegInfo[reg][MISCREG_PRI_NS_RD]; 100810037SARM gem5 Developers break; 100910037SARM gem5 Developers case MODE_MON: 101010037SARM gem5 Developers canRead = secure ? miscRegInfo[reg][MISCREG_MON_NS0_RD] : 101110037SARM gem5 Developers miscRegInfo[reg][MISCREG_MON_NS1_RD]; 101210037SARM gem5 Developers break; 101310037SARM gem5 Developers case MODE_HYP: 101410037SARM gem5 Developers canRead = miscRegInfo[reg][MISCREG_HYP_RD]; 101510037SARM gem5 Developers break; 101610037SARM gem5 Developers default: 101711939Snikos.nikoleris@arm.com undefined = true; 101810037SARM gem5 Developers } 101910037SARM gem5 Developers // can't do permissions checkes on the root of a banked pair of regs 102010037SARM gem5 Developers assert(!miscRegInfo[reg][MISCREG_BANKED]); 102111939Snikos.nikoleris@arm.com return std::make_tuple(canRead, undefined); 102210037SARM gem5 Developers} 102310037SARM gem5 Developers 102411939Snikos.nikoleris@arm.comstd::tuple<bool, bool> 102511939Snikos.nikoleris@arm.comcanWriteCoprocReg(MiscRegIndex reg, SCR scr, CPSR cpsr) 102610037SARM gem5 Developers{ 102710037SARM gem5 Developers bool secure = !scr.ns; 102811939Snikos.nikoleris@arm.com bool canWrite = false; 102911939Snikos.nikoleris@arm.com bool undefined = false; 103010037SARM gem5 Developers 103110037SARM gem5 Developers switch (cpsr.mode) { 103210037SARM gem5 Developers case MODE_USER: 103310037SARM gem5 Developers canWrite = secure ? miscRegInfo[reg][MISCREG_USR_S_WR] : 103410037SARM gem5 Developers miscRegInfo[reg][MISCREG_USR_NS_WR]; 103510037SARM gem5 Developers break; 103610037SARM gem5 Developers case MODE_FIQ: 103710037SARM gem5 Developers case MODE_IRQ: 103810037SARM gem5 Developers case MODE_SVC: 103910037SARM gem5 Developers case MODE_ABORT: 104010037SARM gem5 Developers case MODE_UNDEFINED: 104110037SARM gem5 Developers case MODE_SYSTEM: 104210037SARM gem5 Developers canWrite = secure ? miscRegInfo[reg][MISCREG_PRI_S_WR] : 104310037SARM gem5 Developers miscRegInfo[reg][MISCREG_PRI_NS_WR]; 104410037SARM gem5 Developers break; 104510037SARM gem5 Developers case MODE_MON: 104610037SARM gem5 Developers canWrite = secure ? miscRegInfo[reg][MISCREG_MON_NS0_WR] : 104710037SARM gem5 Developers miscRegInfo[reg][MISCREG_MON_NS1_WR]; 104810037SARM gem5 Developers break; 104910037SARM gem5 Developers case MODE_HYP: 105010037SARM gem5 Developers canWrite = miscRegInfo[reg][MISCREG_HYP_WR]; 105110037SARM gem5 Developers break; 105210037SARM gem5 Developers default: 105311939Snikos.nikoleris@arm.com undefined = true; 105410037SARM gem5 Developers } 105510037SARM gem5 Developers // can't do permissions checkes on the root of a banked pair of regs 105610037SARM gem5 Developers assert(!miscRegInfo[reg][MISCREG_BANKED]); 105711939Snikos.nikoleris@arm.com return std::make_tuple(canWrite, undefined); 105810037SARM gem5 Developers} 105910037SARM gem5 Developers 106010037SARM gem5 Developersint 106112499Sgiacomo.travaglini@arm.comsnsBankedIndex(MiscRegIndex reg, ThreadContext *tc) 106210037SARM gem5 Developers{ 106311771SCurtis.Dunham@arm.com SCR scr = tc->readMiscReg(MISCREG_SCR); 106412499Sgiacomo.travaglini@arm.com return snsBankedIndex(reg, tc, scr.ns); 106510037SARM gem5 Developers} 106610037SARM gem5 Developers 106710037SARM gem5 Developersint 106812499Sgiacomo.travaglini@arm.comsnsBankedIndex(MiscRegIndex reg, ThreadContext *tc, bool ns) 106910037SARM gem5 Developers{ 107010421Sandreas.hansson@arm.com int reg_as_int = static_cast<int>(reg); 107110037SARM gem5 Developers if (miscRegInfo[reg][MISCREG_BANKED]) { 107211771SCurtis.Dunham@arm.com reg_as_int += (ArmSystem::haveSecurity(tc) && 107311771SCurtis.Dunham@arm.com !ArmSystem::highestELIs64(tc) && !ns) ? 2 : 1; 107410037SARM gem5 Developers } 107510421Sandreas.hansson@arm.com return reg_as_int; 107610037SARM gem5 Developers} 107710037SARM gem5 Developers 107814242Sgiacomo.travaglini@arm.comint 107914242Sgiacomo.travaglini@arm.comsnsBankedIndex64(MiscRegIndex reg, ThreadContext *tc) 108014242Sgiacomo.travaglini@arm.com{ 108114242Sgiacomo.travaglini@arm.com SCR scr = tc->readMiscReg(MISCREG_SCR); 108214242Sgiacomo.travaglini@arm.com return tc->getIsaPtr()->snsBankedIndex64(reg, scr.ns); 108314242Sgiacomo.travaglini@arm.com} 108410037SARM gem5 Developers 108510037SARM gem5 Developers/** 108610037SARM gem5 Developers * If the reg is a child reg of a banked set, then the parent is the last 108710037SARM gem5 Developers * banked one in the list. This is messy, and the wish is to eventually have 108810037SARM gem5 Developers * the bitmap replaced with a better data structure. the preUnflatten function 108910037SARM gem5 Developers * initializes a lookup table to speed up the search for these banked 109010037SARM gem5 Developers * registers. 109110037SARM gem5 Developers */ 109210037SARM gem5 Developers 109310037SARM gem5 Developersint unflattenResultMiscReg[NUM_MISCREGS]; 109410037SARM gem5 Developers 109510037SARM gem5 Developersvoid 109610037SARM gem5 DeveloperspreUnflattenMiscReg() 109710037SARM gem5 Developers{ 109810037SARM gem5 Developers int reg = -1; 109910037SARM gem5 Developers for (int i = 0 ; i < NUM_MISCREGS; i++){ 110010037SARM gem5 Developers if (miscRegInfo[i][MISCREG_BANKED]) 110110037SARM gem5 Developers reg = i; 110210037SARM gem5 Developers if (miscRegInfo[i][MISCREG_BANKED_CHILD]) 110310037SARM gem5 Developers unflattenResultMiscReg[i] = reg; 110410037SARM gem5 Developers else 110510037SARM gem5 Developers unflattenResultMiscReg[i] = i; 110610037SARM gem5 Developers // if this assert fails, no parent was found, and something is broken 110710037SARM gem5 Developers assert(unflattenResultMiscReg[i] > -1); 110810037SARM gem5 Developers } 110910037SARM gem5 Developers} 111010037SARM gem5 Developers 111110037SARM gem5 Developersint 111210037SARM gem5 DevelopersunflattenMiscReg(int reg) 111310037SARM gem5 Developers{ 111410037SARM gem5 Developers return unflattenResultMiscReg[reg]; 111510037SARM gem5 Developers} 111610037SARM gem5 Developers 111710037SARM gem5 Developersbool 111810037SARM gem5 DeveloperscanReadAArch64SysReg(MiscRegIndex reg, SCR scr, CPSR cpsr, ThreadContext *tc) 111910037SARM gem5 Developers{ 112010037SARM gem5 Developers // Check for SP_EL0 access while SPSEL == 0 112110037SARM gem5 Developers if ((reg == MISCREG_SP_EL0) && (tc->readMiscReg(MISCREG_SPSEL) == 0)) 112210037SARM gem5 Developers return false; 112310037SARM gem5 Developers 112410037SARM gem5 Developers // Check for RVBAR access 112510037SARM gem5 Developers if (reg == MISCREG_RVBAR_EL1) { 112610037SARM gem5 Developers ExceptionLevel highest_el = ArmSystem::highestEL(tc); 112710037SARM gem5 Developers if (highest_el == EL2 || highest_el == EL3) 112810037SARM gem5 Developers return false; 112910037SARM gem5 Developers } 113010037SARM gem5 Developers if (reg == MISCREG_RVBAR_EL2) { 113110037SARM gem5 Developers ExceptionLevel highest_el = ArmSystem::highestEL(tc); 113210037SARM gem5 Developers if (highest_el == EL3) 113310037SARM gem5 Developers return false; 113410037SARM gem5 Developers } 113510037SARM gem5 Developers 113610037SARM gem5 Developers bool secure = ArmSystem::haveSecurity(tc) && !scr.ns; 113710037SARM gem5 Developers 113814172Sgiacomo.travaglini@arm.com switch (currEL(cpsr)) { 113910037SARM gem5 Developers case EL0: 114010037SARM gem5 Developers return secure ? miscRegInfo[reg][MISCREG_USR_S_RD] : 114110037SARM gem5 Developers miscRegInfo[reg][MISCREG_USR_NS_RD]; 114210037SARM gem5 Developers case EL1: 114310037SARM gem5 Developers return secure ? miscRegInfo[reg][MISCREG_PRI_S_RD] : 114410037SARM gem5 Developers miscRegInfo[reg][MISCREG_PRI_NS_RD]; 114511574SCurtis.Dunham@arm.com case EL2: 114611574SCurtis.Dunham@arm.com return miscRegInfo[reg][MISCREG_HYP_RD]; 114710037SARM gem5 Developers case EL3: 114810037SARM gem5 Developers return secure ? miscRegInfo[reg][MISCREG_MON_NS0_RD] : 114910037SARM gem5 Developers miscRegInfo[reg][MISCREG_MON_NS1_RD]; 115010037SARM gem5 Developers default: 115110037SARM gem5 Developers panic("Invalid exception level"); 115210037SARM gem5 Developers } 115310037SARM gem5 Developers} 115410037SARM gem5 Developers 115510037SARM gem5 Developersbool 115610037SARM gem5 DeveloperscanWriteAArch64SysReg(MiscRegIndex reg, SCR scr, CPSR cpsr, ThreadContext *tc) 115710037SARM gem5 Developers{ 115810037SARM gem5 Developers // Check for SP_EL0 access while SPSEL == 0 115910037SARM gem5 Developers if ((reg == MISCREG_SP_EL0) && (tc->readMiscReg(MISCREG_SPSEL) == 0)) 116010037SARM gem5 Developers return false; 116114172Sgiacomo.travaglini@arm.com ExceptionLevel el = currEL(cpsr); 116210037SARM gem5 Developers if (reg == MISCREG_DAIF) { 116310037SARM gem5 Developers SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR_EL1); 116410037SARM gem5 Developers if (el == EL0 && !sctlr.uma) 116510037SARM gem5 Developers return false; 116610037SARM gem5 Developers } 116710828SGiacomo.Gabrielli@arm.com if (FullSystem && reg == MISCREG_DC_ZVA_Xt) { 116810828SGiacomo.Gabrielli@arm.com // In syscall-emulation mode, this test is skipped and DCZVA is always 116910828SGiacomo.Gabrielli@arm.com // allowed at EL0 117010037SARM gem5 Developers SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR_EL1); 117110037SARM gem5 Developers if (el == EL0 && !sctlr.dze) 117210037SARM gem5 Developers return false; 117310037SARM gem5 Developers } 117412502Snikos.nikoleris@arm.com if (reg == MISCREG_DC_CVAC_Xt || reg == MISCREG_DC_CIVAC_Xt) { 117510037SARM gem5 Developers SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR_EL1); 117610037SARM gem5 Developers if (el == EL0 && !sctlr.uci) 117710037SARM gem5 Developers return false; 117810037SARM gem5 Developers } 117910037SARM gem5 Developers 118010037SARM gem5 Developers bool secure = ArmSystem::haveSecurity(tc) && !scr.ns; 118110037SARM gem5 Developers 118210037SARM gem5 Developers switch (el) { 118310037SARM gem5 Developers case EL0: 118410037SARM gem5 Developers return secure ? miscRegInfo[reg][MISCREG_USR_S_WR] : 118510037SARM gem5 Developers miscRegInfo[reg][MISCREG_USR_NS_WR]; 118610037SARM gem5 Developers case EL1: 118710037SARM gem5 Developers return secure ? miscRegInfo[reg][MISCREG_PRI_S_WR] : 118810037SARM gem5 Developers miscRegInfo[reg][MISCREG_PRI_NS_WR]; 118911574SCurtis.Dunham@arm.com case EL2: 119011574SCurtis.Dunham@arm.com return miscRegInfo[reg][MISCREG_HYP_WR]; 119110037SARM gem5 Developers case EL3: 119210037SARM gem5 Developers return secure ? miscRegInfo[reg][MISCREG_MON_NS0_WR] : 119310037SARM gem5 Developers miscRegInfo[reg][MISCREG_MON_NS1_WR]; 119410037SARM gem5 Developers default: 119510037SARM gem5 Developers panic("Invalid exception level"); 119610037SARM gem5 Developers } 119710037SARM gem5 Developers} 119810037SARM gem5 Developers 119910037SARM gem5 DevelopersMiscRegIndex 120010037SARM gem5 DevelopersdecodeAArch64SysReg(unsigned op0, unsigned op1, 120110037SARM gem5 Developers unsigned crn, unsigned crm, 120210037SARM gem5 Developers unsigned op2) 120310037SARM gem5 Developers{ 120410037SARM gem5 Developers switch (op0) { 120510037SARM gem5 Developers case 1: 120610037SARM gem5 Developers switch (crn) { 120710037SARM gem5 Developers case 7: 120810037SARM gem5 Developers switch (op1) { 120910037SARM gem5 Developers case 0: 121010037SARM gem5 Developers switch (crm) { 121110037SARM gem5 Developers case 1: 121210037SARM gem5 Developers switch (op2) { 121310037SARM gem5 Developers case 0: 121410037SARM gem5 Developers return MISCREG_IC_IALLUIS; 121510037SARM gem5 Developers } 121610037SARM gem5 Developers break; 121710037SARM gem5 Developers case 5: 121810037SARM gem5 Developers switch (op2) { 121910037SARM gem5 Developers case 0: 122010037SARM gem5 Developers return MISCREG_IC_IALLU; 122110037SARM gem5 Developers } 122210037SARM gem5 Developers break; 122310037SARM gem5 Developers case 6: 122410037SARM gem5 Developers switch (op2) { 122510037SARM gem5 Developers case 1: 122610037SARM gem5 Developers return MISCREG_DC_IVAC_Xt; 122710037SARM gem5 Developers case 2: 122810037SARM gem5 Developers return MISCREG_DC_ISW_Xt; 122910037SARM gem5 Developers } 123010037SARM gem5 Developers break; 123110037SARM gem5 Developers case 8: 123210037SARM gem5 Developers switch (op2) { 123310037SARM gem5 Developers case 0: 123410037SARM gem5 Developers return MISCREG_AT_S1E1R_Xt; 123510037SARM gem5 Developers case 1: 123610037SARM gem5 Developers return MISCREG_AT_S1E1W_Xt; 123710037SARM gem5 Developers case 2: 123810037SARM gem5 Developers return MISCREG_AT_S1E0R_Xt; 123910037SARM gem5 Developers case 3: 124010037SARM gem5 Developers return MISCREG_AT_S1E0W_Xt; 124110037SARM gem5 Developers } 124210037SARM gem5 Developers break; 124310037SARM gem5 Developers case 10: 124410037SARM gem5 Developers switch (op2) { 124510037SARM gem5 Developers case 2: 124610037SARM gem5 Developers return MISCREG_DC_CSW_Xt; 124710037SARM gem5 Developers } 124810037SARM gem5 Developers break; 124910037SARM gem5 Developers case 14: 125010037SARM gem5 Developers switch (op2) { 125110037SARM gem5 Developers case 2: 125210037SARM gem5 Developers return MISCREG_DC_CISW_Xt; 125310037SARM gem5 Developers } 125410037SARM gem5 Developers break; 125510037SARM gem5 Developers } 125610037SARM gem5 Developers break; 125710037SARM gem5 Developers case 3: 125810037SARM gem5 Developers switch (crm) { 125910037SARM gem5 Developers case 4: 126010037SARM gem5 Developers switch (op2) { 126110037SARM gem5 Developers case 1: 126210037SARM gem5 Developers return MISCREG_DC_ZVA_Xt; 126310037SARM gem5 Developers } 126410037SARM gem5 Developers break; 126510037SARM gem5 Developers case 5: 126610037SARM gem5 Developers switch (op2) { 126710037SARM gem5 Developers case 1: 126810037SARM gem5 Developers return MISCREG_IC_IVAU_Xt; 126910037SARM gem5 Developers } 127010037SARM gem5 Developers break; 127110037SARM gem5 Developers case 10: 127210037SARM gem5 Developers switch (op2) { 127310037SARM gem5 Developers case 1: 127410037SARM gem5 Developers return MISCREG_DC_CVAC_Xt; 127510037SARM gem5 Developers } 127610037SARM gem5 Developers break; 127710037SARM gem5 Developers case 11: 127810037SARM gem5 Developers switch (op2) { 127910037SARM gem5 Developers case 1: 128010037SARM gem5 Developers return MISCREG_DC_CVAU_Xt; 128110037SARM gem5 Developers } 128210037SARM gem5 Developers break; 128310037SARM gem5 Developers case 14: 128410037SARM gem5 Developers switch (op2) { 128510037SARM gem5 Developers case 1: 128610037SARM gem5 Developers return MISCREG_DC_CIVAC_Xt; 128710037SARM gem5 Developers } 128810037SARM gem5 Developers break; 128910037SARM gem5 Developers } 129010037SARM gem5 Developers break; 129110037SARM gem5 Developers case 4: 129210037SARM gem5 Developers switch (crm) { 129310037SARM gem5 Developers case 8: 129410037SARM gem5 Developers switch (op2) { 129510037SARM gem5 Developers case 0: 129610037SARM gem5 Developers return MISCREG_AT_S1E2R_Xt; 129710037SARM gem5 Developers case 1: 129810037SARM gem5 Developers return MISCREG_AT_S1E2W_Xt; 129910037SARM gem5 Developers case 4: 130010037SARM gem5 Developers return MISCREG_AT_S12E1R_Xt; 130110037SARM gem5 Developers case 5: 130210037SARM gem5 Developers return MISCREG_AT_S12E1W_Xt; 130310037SARM gem5 Developers case 6: 130410037SARM gem5 Developers return MISCREG_AT_S12E0R_Xt; 130510037SARM gem5 Developers case 7: 130610037SARM gem5 Developers return MISCREG_AT_S12E0W_Xt; 130710037SARM gem5 Developers } 130810037SARM gem5 Developers break; 130910037SARM gem5 Developers } 131010037SARM gem5 Developers break; 131110037SARM gem5 Developers case 6: 131210037SARM gem5 Developers switch (crm) { 131310037SARM gem5 Developers case 8: 131410037SARM gem5 Developers switch (op2) { 131510037SARM gem5 Developers case 0: 131610037SARM gem5 Developers return MISCREG_AT_S1E3R_Xt; 131710037SARM gem5 Developers case 1: 131810037SARM gem5 Developers return MISCREG_AT_S1E3W_Xt; 131910037SARM gem5 Developers } 132010037SARM gem5 Developers break; 132110037SARM gem5 Developers } 132210037SARM gem5 Developers break; 132310037SARM gem5 Developers } 132410037SARM gem5 Developers break; 132510037SARM gem5 Developers case 8: 132610037SARM gem5 Developers switch (op1) { 132710037SARM gem5 Developers case 0: 132810037SARM gem5 Developers switch (crm) { 132910037SARM gem5 Developers case 3: 133010037SARM gem5 Developers switch (op2) { 133110037SARM gem5 Developers case 0: 133210037SARM gem5 Developers return MISCREG_TLBI_VMALLE1IS; 133310037SARM gem5 Developers case 1: 133410037SARM gem5 Developers return MISCREG_TLBI_VAE1IS_Xt; 133510037SARM gem5 Developers case 2: 133610037SARM gem5 Developers return MISCREG_TLBI_ASIDE1IS_Xt; 133710037SARM gem5 Developers case 3: 133810037SARM gem5 Developers return MISCREG_TLBI_VAAE1IS_Xt; 133910037SARM gem5 Developers case 5: 134010037SARM gem5 Developers return MISCREG_TLBI_VALE1IS_Xt; 134110037SARM gem5 Developers case 7: 134210037SARM gem5 Developers return MISCREG_TLBI_VAALE1IS_Xt; 134310037SARM gem5 Developers } 134410037SARM gem5 Developers break; 134510037SARM gem5 Developers case 7: 134610037SARM gem5 Developers switch (op2) { 134710037SARM gem5 Developers case 0: 134810037SARM gem5 Developers return MISCREG_TLBI_VMALLE1; 134910037SARM gem5 Developers case 1: 135010037SARM gem5 Developers return MISCREG_TLBI_VAE1_Xt; 135110037SARM gem5 Developers case 2: 135210037SARM gem5 Developers return MISCREG_TLBI_ASIDE1_Xt; 135310037SARM gem5 Developers case 3: 135410037SARM gem5 Developers return MISCREG_TLBI_VAAE1_Xt; 135510037SARM gem5 Developers case 5: 135610037SARM gem5 Developers return MISCREG_TLBI_VALE1_Xt; 135710037SARM gem5 Developers case 7: 135810037SARM gem5 Developers return MISCREG_TLBI_VAALE1_Xt; 135910037SARM gem5 Developers } 136010037SARM gem5 Developers break; 136110037SARM gem5 Developers } 136210037SARM gem5 Developers break; 136310037SARM gem5 Developers case 4: 136410037SARM gem5 Developers switch (crm) { 136510037SARM gem5 Developers case 0: 136610037SARM gem5 Developers switch (op2) { 136710037SARM gem5 Developers case 1: 136810037SARM gem5 Developers return MISCREG_TLBI_IPAS2E1IS_Xt; 136910037SARM gem5 Developers case 5: 137010037SARM gem5 Developers return MISCREG_TLBI_IPAS2LE1IS_Xt; 137110037SARM gem5 Developers } 137210037SARM gem5 Developers break; 137310037SARM gem5 Developers case 3: 137410037SARM gem5 Developers switch (op2) { 137510037SARM gem5 Developers case 0: 137610037SARM gem5 Developers return MISCREG_TLBI_ALLE2IS; 137710037SARM gem5 Developers case 1: 137810037SARM gem5 Developers return MISCREG_TLBI_VAE2IS_Xt; 137910037SARM gem5 Developers case 4: 138010037SARM gem5 Developers return MISCREG_TLBI_ALLE1IS; 138110037SARM gem5 Developers case 5: 138210037SARM gem5 Developers return MISCREG_TLBI_VALE2IS_Xt; 138310037SARM gem5 Developers case 6: 138410037SARM gem5 Developers return MISCREG_TLBI_VMALLS12E1IS; 138510037SARM gem5 Developers } 138610037SARM gem5 Developers break; 138710037SARM gem5 Developers case 4: 138810037SARM gem5 Developers switch (op2) { 138910037SARM gem5 Developers case 1: 139010037SARM gem5 Developers return MISCREG_TLBI_IPAS2E1_Xt; 139110037SARM gem5 Developers case 5: 139210037SARM gem5 Developers return MISCREG_TLBI_IPAS2LE1_Xt; 139310037SARM gem5 Developers } 139410037SARM gem5 Developers break; 139510037SARM gem5 Developers case 7: 139610037SARM gem5 Developers switch (op2) { 139710037SARM gem5 Developers case 0: 139810037SARM gem5 Developers return MISCREG_TLBI_ALLE2; 139910037SARM gem5 Developers case 1: 140010037SARM gem5 Developers return MISCREG_TLBI_VAE2_Xt; 140110037SARM gem5 Developers case 4: 140210037SARM gem5 Developers return MISCREG_TLBI_ALLE1; 140310037SARM gem5 Developers case 5: 140410037SARM gem5 Developers return MISCREG_TLBI_VALE2_Xt; 140510037SARM gem5 Developers case 6: 140610037SARM gem5 Developers return MISCREG_TLBI_VMALLS12E1; 140710037SARM gem5 Developers } 140810037SARM gem5 Developers break; 140910037SARM gem5 Developers } 141010037SARM gem5 Developers break; 141110037SARM gem5 Developers case 6: 141210037SARM gem5 Developers switch (crm) { 141310037SARM gem5 Developers case 3: 141410037SARM gem5 Developers switch (op2) { 141510037SARM gem5 Developers case 0: 141610037SARM gem5 Developers return MISCREG_TLBI_ALLE3IS; 141710037SARM gem5 Developers case 1: 141810037SARM gem5 Developers return MISCREG_TLBI_VAE3IS_Xt; 141910037SARM gem5 Developers case 5: 142010037SARM gem5 Developers return MISCREG_TLBI_VALE3IS_Xt; 142110037SARM gem5 Developers } 142210037SARM gem5 Developers break; 142310037SARM gem5 Developers case 7: 142410037SARM gem5 Developers switch (op2) { 142510037SARM gem5 Developers case 0: 142610037SARM gem5 Developers return MISCREG_TLBI_ALLE3; 142710037SARM gem5 Developers case 1: 142810037SARM gem5 Developers return MISCREG_TLBI_VAE3_Xt; 142910037SARM gem5 Developers case 5: 143010037SARM gem5 Developers return MISCREG_TLBI_VALE3_Xt; 143110037SARM gem5 Developers } 143210037SARM gem5 Developers break; 143310037SARM gem5 Developers } 143410037SARM gem5 Developers break; 143510037SARM gem5 Developers } 143610037SARM gem5 Developers break; 143713366Sgiacomo.travaglini@arm.com case 11: 143813366Sgiacomo.travaglini@arm.com case 15: 143913366Sgiacomo.travaglini@arm.com // SYS Instruction with CRn = { 11, 15 } 144013366Sgiacomo.travaglini@arm.com // (Trappable by HCR_EL2.TIDCP) 144113366Sgiacomo.travaglini@arm.com return MISCREG_IMPDEF_UNIMPL; 144210037SARM gem5 Developers } 144310037SARM gem5 Developers break; 144410037SARM gem5 Developers case 2: 144510037SARM gem5 Developers switch (crn) { 144610037SARM gem5 Developers case 0: 144710037SARM gem5 Developers switch (op1) { 144810037SARM gem5 Developers case 0: 144910037SARM gem5 Developers switch (crm) { 145010037SARM gem5 Developers case 0: 145110037SARM gem5 Developers switch (op2) { 145210037SARM gem5 Developers case 2: 145310037SARM gem5 Developers return MISCREG_OSDTRRX_EL1; 145410037SARM gem5 Developers case 4: 145510037SARM gem5 Developers return MISCREG_DBGBVR0_EL1; 145610037SARM gem5 Developers case 5: 145710037SARM gem5 Developers return MISCREG_DBGBCR0_EL1; 145810037SARM gem5 Developers case 6: 145910037SARM gem5 Developers return MISCREG_DBGWVR0_EL1; 146010037SARM gem5 Developers case 7: 146110037SARM gem5 Developers return MISCREG_DBGWCR0_EL1; 146210037SARM gem5 Developers } 146310037SARM gem5 Developers break; 146410037SARM gem5 Developers case 1: 146510037SARM gem5 Developers switch (op2) { 146610037SARM gem5 Developers case 4: 146710037SARM gem5 Developers return MISCREG_DBGBVR1_EL1; 146810037SARM gem5 Developers case 5: 146910037SARM gem5 Developers return MISCREG_DBGBCR1_EL1; 147010037SARM gem5 Developers case 6: 147110037SARM gem5 Developers return MISCREG_DBGWVR1_EL1; 147210037SARM gem5 Developers case 7: 147310037SARM gem5 Developers return MISCREG_DBGWCR1_EL1; 147410037SARM gem5 Developers } 147510037SARM gem5 Developers break; 147610037SARM gem5 Developers case 2: 147710037SARM gem5 Developers switch (op2) { 147810037SARM gem5 Developers case 0: 147910037SARM gem5 Developers return MISCREG_MDCCINT_EL1; 148010037SARM gem5 Developers case 2: 148110037SARM gem5 Developers return MISCREG_MDSCR_EL1; 148210037SARM gem5 Developers case 4: 148310037SARM gem5 Developers return MISCREG_DBGBVR2_EL1; 148410037SARM gem5 Developers case 5: 148510037SARM gem5 Developers return MISCREG_DBGBCR2_EL1; 148610037SARM gem5 Developers case 6: 148710037SARM gem5 Developers return MISCREG_DBGWVR2_EL1; 148810037SARM gem5 Developers case 7: 148910037SARM gem5 Developers return MISCREG_DBGWCR2_EL1; 149010037SARM gem5 Developers } 149110037SARM gem5 Developers break; 149210037SARM gem5 Developers case 3: 149310037SARM gem5 Developers switch (op2) { 149410037SARM gem5 Developers case 2: 149510037SARM gem5 Developers return MISCREG_OSDTRTX_EL1; 149610037SARM gem5 Developers case 4: 149710037SARM gem5 Developers return MISCREG_DBGBVR3_EL1; 149810037SARM gem5 Developers case 5: 149910037SARM gem5 Developers return MISCREG_DBGBCR3_EL1; 150010037SARM gem5 Developers case 6: 150110037SARM gem5 Developers return MISCREG_DBGWVR3_EL1; 150210037SARM gem5 Developers case 7: 150310037SARM gem5 Developers return MISCREG_DBGWCR3_EL1; 150410037SARM gem5 Developers } 150510037SARM gem5 Developers break; 150610037SARM gem5 Developers case 4: 150710037SARM gem5 Developers switch (op2) { 150810037SARM gem5 Developers case 4: 150910037SARM gem5 Developers return MISCREG_DBGBVR4_EL1; 151010037SARM gem5 Developers case 5: 151110037SARM gem5 Developers return MISCREG_DBGBCR4_EL1; 151210037SARM gem5 Developers } 151310037SARM gem5 Developers break; 151410037SARM gem5 Developers case 5: 151510037SARM gem5 Developers switch (op2) { 151610037SARM gem5 Developers case 4: 151710037SARM gem5 Developers return MISCREG_DBGBVR5_EL1; 151810037SARM gem5 Developers case 5: 151910037SARM gem5 Developers return MISCREG_DBGBCR5_EL1; 152010037SARM gem5 Developers } 152110037SARM gem5 Developers break; 152210037SARM gem5 Developers case 6: 152310037SARM gem5 Developers switch (op2) { 152410037SARM gem5 Developers case 2: 152510037SARM gem5 Developers return MISCREG_OSECCR_EL1; 152610037SARM gem5 Developers } 152710037SARM gem5 Developers break; 152810037SARM gem5 Developers } 152910037SARM gem5 Developers break; 153010037SARM gem5 Developers case 2: 153110037SARM gem5 Developers switch (crm) { 153210037SARM gem5 Developers case 0: 153310037SARM gem5 Developers switch (op2) { 153410037SARM gem5 Developers case 0: 153510037SARM gem5 Developers return MISCREG_TEECR32_EL1; 153610037SARM gem5 Developers } 153710037SARM gem5 Developers break; 153810037SARM gem5 Developers } 153910037SARM gem5 Developers break; 154010037SARM gem5 Developers case 3: 154110037SARM gem5 Developers switch (crm) { 154210037SARM gem5 Developers case 1: 154310037SARM gem5 Developers switch (op2) { 154410037SARM gem5 Developers case 0: 154510037SARM gem5 Developers return MISCREG_MDCCSR_EL0; 154610037SARM gem5 Developers } 154710037SARM gem5 Developers break; 154810037SARM gem5 Developers case 4: 154910037SARM gem5 Developers switch (op2) { 155010037SARM gem5 Developers case 0: 155110037SARM gem5 Developers return MISCREG_MDDTR_EL0; 155210037SARM gem5 Developers } 155310037SARM gem5 Developers break; 155410037SARM gem5 Developers case 5: 155510037SARM gem5 Developers switch (op2) { 155610037SARM gem5 Developers case 0: 155710037SARM gem5 Developers return MISCREG_MDDTRRX_EL0; 155810037SARM gem5 Developers } 155910037SARM gem5 Developers break; 156010037SARM gem5 Developers } 156110037SARM gem5 Developers break; 156210037SARM gem5 Developers case 4: 156310037SARM gem5 Developers switch (crm) { 156410037SARM gem5 Developers case 7: 156510037SARM gem5 Developers switch (op2) { 156610037SARM gem5 Developers case 0: 156710037SARM gem5 Developers return MISCREG_DBGVCR32_EL2; 156810037SARM gem5 Developers } 156910037SARM gem5 Developers break; 157010037SARM gem5 Developers } 157110037SARM gem5 Developers break; 157210037SARM gem5 Developers } 157310037SARM gem5 Developers break; 157410037SARM gem5 Developers case 1: 157510037SARM gem5 Developers switch (op1) { 157610037SARM gem5 Developers case 0: 157710037SARM gem5 Developers switch (crm) { 157810037SARM gem5 Developers case 0: 157910037SARM gem5 Developers switch (op2) { 158010037SARM gem5 Developers case 0: 158110037SARM gem5 Developers return MISCREG_MDRAR_EL1; 158210037SARM gem5 Developers case 4: 158310037SARM gem5 Developers return MISCREG_OSLAR_EL1; 158410037SARM gem5 Developers } 158510037SARM gem5 Developers break; 158610037SARM gem5 Developers case 1: 158710037SARM gem5 Developers switch (op2) { 158810037SARM gem5 Developers case 4: 158910037SARM gem5 Developers return MISCREG_OSLSR_EL1; 159010037SARM gem5 Developers } 159110037SARM gem5 Developers break; 159210037SARM gem5 Developers case 3: 159310037SARM gem5 Developers switch (op2) { 159410037SARM gem5 Developers case 4: 159510037SARM gem5 Developers return MISCREG_OSDLR_EL1; 159610037SARM gem5 Developers } 159710037SARM gem5 Developers break; 159810037SARM gem5 Developers case 4: 159910037SARM gem5 Developers switch (op2) { 160010037SARM gem5 Developers case 4: 160110037SARM gem5 Developers return MISCREG_DBGPRCR_EL1; 160210037SARM gem5 Developers } 160310037SARM gem5 Developers break; 160410037SARM gem5 Developers } 160510037SARM gem5 Developers break; 160610037SARM gem5 Developers case 2: 160710037SARM gem5 Developers switch (crm) { 160810037SARM gem5 Developers case 0: 160910037SARM gem5 Developers switch (op2) { 161010037SARM gem5 Developers case 0: 161110037SARM gem5 Developers return MISCREG_TEEHBR32_EL1; 161210037SARM gem5 Developers } 161310037SARM gem5 Developers break; 161410037SARM gem5 Developers } 161510037SARM gem5 Developers break; 161610037SARM gem5 Developers } 161710037SARM gem5 Developers break; 161810037SARM gem5 Developers case 7: 161910037SARM gem5 Developers switch (op1) { 162010037SARM gem5 Developers case 0: 162110037SARM gem5 Developers switch (crm) { 162210037SARM gem5 Developers case 8: 162310037SARM gem5 Developers switch (op2) { 162410037SARM gem5 Developers case 6: 162510037SARM gem5 Developers return MISCREG_DBGCLAIMSET_EL1; 162610037SARM gem5 Developers } 162710037SARM gem5 Developers break; 162810037SARM gem5 Developers case 9: 162910037SARM gem5 Developers switch (op2) { 163010037SARM gem5 Developers case 6: 163110037SARM gem5 Developers return MISCREG_DBGCLAIMCLR_EL1; 163210037SARM gem5 Developers } 163310037SARM gem5 Developers break; 163410037SARM gem5 Developers case 14: 163510037SARM gem5 Developers switch (op2) { 163610037SARM gem5 Developers case 6: 163710037SARM gem5 Developers return MISCREG_DBGAUTHSTATUS_EL1; 163810037SARM gem5 Developers } 163910037SARM gem5 Developers break; 164010037SARM gem5 Developers } 164110037SARM gem5 Developers break; 164210037SARM gem5 Developers } 164310037SARM gem5 Developers break; 164410037SARM gem5 Developers } 164510037SARM gem5 Developers break; 164610037SARM gem5 Developers case 3: 164710037SARM gem5 Developers switch (crn) { 164810037SARM gem5 Developers case 0: 164910037SARM gem5 Developers switch (op1) { 165010037SARM gem5 Developers case 0: 165110037SARM gem5 Developers switch (crm) { 165210037SARM gem5 Developers case 0: 165310037SARM gem5 Developers switch (op2) { 165410037SARM gem5 Developers case 0: 165510037SARM gem5 Developers return MISCREG_MIDR_EL1; 165610037SARM gem5 Developers case 5: 165710037SARM gem5 Developers return MISCREG_MPIDR_EL1; 165810037SARM gem5 Developers case 6: 165910037SARM gem5 Developers return MISCREG_REVIDR_EL1; 166010037SARM gem5 Developers } 166110037SARM gem5 Developers break; 166210037SARM gem5 Developers case 1: 166310037SARM gem5 Developers switch (op2) { 166410037SARM gem5 Developers case 0: 166510037SARM gem5 Developers return MISCREG_ID_PFR0_EL1; 166610037SARM gem5 Developers case 1: 166710037SARM gem5 Developers return MISCREG_ID_PFR1_EL1; 166810037SARM gem5 Developers case 2: 166910037SARM gem5 Developers return MISCREG_ID_DFR0_EL1; 167010037SARM gem5 Developers case 3: 167110037SARM gem5 Developers return MISCREG_ID_AFR0_EL1; 167210037SARM gem5 Developers case 4: 167310037SARM gem5 Developers return MISCREG_ID_MMFR0_EL1; 167410037SARM gem5 Developers case 5: 167510037SARM gem5 Developers return MISCREG_ID_MMFR1_EL1; 167610037SARM gem5 Developers case 6: 167710037SARM gem5 Developers return MISCREG_ID_MMFR2_EL1; 167810037SARM gem5 Developers case 7: 167910037SARM gem5 Developers return MISCREG_ID_MMFR3_EL1; 168010037SARM gem5 Developers } 168110037SARM gem5 Developers break; 168210037SARM gem5 Developers case 2: 168310037SARM gem5 Developers switch (op2) { 168410037SARM gem5 Developers case 0: 168510037SARM gem5 Developers return MISCREG_ID_ISAR0_EL1; 168610037SARM gem5 Developers case 1: 168710037SARM gem5 Developers return MISCREG_ID_ISAR1_EL1; 168810037SARM gem5 Developers case 2: 168910037SARM gem5 Developers return MISCREG_ID_ISAR2_EL1; 169010037SARM gem5 Developers case 3: 169110037SARM gem5 Developers return MISCREG_ID_ISAR3_EL1; 169210037SARM gem5 Developers case 4: 169310037SARM gem5 Developers return MISCREG_ID_ISAR4_EL1; 169410037SARM gem5 Developers case 5: 169510037SARM gem5 Developers return MISCREG_ID_ISAR5_EL1; 169610037SARM gem5 Developers } 169710037SARM gem5 Developers break; 169810037SARM gem5 Developers case 3: 169910037SARM gem5 Developers switch (op2) { 170010037SARM gem5 Developers case 0: 170110037SARM gem5 Developers return MISCREG_MVFR0_EL1; 170210037SARM gem5 Developers case 1: 170310037SARM gem5 Developers return MISCREG_MVFR1_EL1; 170410037SARM gem5 Developers case 2: 170510037SARM gem5 Developers return MISCREG_MVFR2_EL1; 170610037SARM gem5 Developers case 3 ... 7: 170710037SARM gem5 Developers return MISCREG_RAZ; 170810037SARM gem5 Developers } 170910037SARM gem5 Developers break; 171010037SARM gem5 Developers case 4: 171110037SARM gem5 Developers switch (op2) { 171210037SARM gem5 Developers case 0: 171310037SARM gem5 Developers return MISCREG_ID_AA64PFR0_EL1; 171410037SARM gem5 Developers case 1: 171510037SARM gem5 Developers return MISCREG_ID_AA64PFR1_EL1; 171613759Sgiacomo.gabrielli@arm.com case 2 ... 3: 171713759Sgiacomo.gabrielli@arm.com return MISCREG_RAZ; 171813759Sgiacomo.gabrielli@arm.com case 4: 171913759Sgiacomo.gabrielli@arm.com return MISCREG_ID_AA64ZFR0_EL1; 172013759Sgiacomo.gabrielli@arm.com case 5 ... 7: 172110037SARM gem5 Developers return MISCREG_RAZ; 172210037SARM gem5 Developers } 172310037SARM gem5 Developers break; 172410037SARM gem5 Developers case 5: 172510037SARM gem5 Developers switch (op2) { 172610037SARM gem5 Developers case 0: 172710037SARM gem5 Developers return MISCREG_ID_AA64DFR0_EL1; 172810037SARM gem5 Developers case 1: 172910037SARM gem5 Developers return MISCREG_ID_AA64DFR1_EL1; 173010037SARM gem5 Developers case 4: 173110037SARM gem5 Developers return MISCREG_ID_AA64AFR0_EL1; 173210037SARM gem5 Developers case 5: 173310037SARM gem5 Developers return MISCREG_ID_AA64AFR1_EL1; 173410037SARM gem5 Developers case 2: 173510037SARM gem5 Developers case 3: 173610037SARM gem5 Developers case 6: 173710037SARM gem5 Developers case 7: 173810037SARM gem5 Developers return MISCREG_RAZ; 173910037SARM gem5 Developers } 174010037SARM gem5 Developers break; 174110037SARM gem5 Developers case 6: 174210037SARM gem5 Developers switch (op2) { 174310037SARM gem5 Developers case 0: 174410037SARM gem5 Developers return MISCREG_ID_AA64ISAR0_EL1; 174510037SARM gem5 Developers case 1: 174610037SARM gem5 Developers return MISCREG_ID_AA64ISAR1_EL1; 174710037SARM gem5 Developers case 2 ... 7: 174810037SARM gem5 Developers return MISCREG_RAZ; 174910037SARM gem5 Developers } 175010037SARM gem5 Developers break; 175110037SARM gem5 Developers case 7: 175210037SARM gem5 Developers switch (op2) { 175310037SARM gem5 Developers case 0: 175410037SARM gem5 Developers return MISCREG_ID_AA64MMFR0_EL1; 175510037SARM gem5 Developers case 1: 175610037SARM gem5 Developers return MISCREG_ID_AA64MMFR1_EL1; 175713116Sgiacomo.travaglini@arm.com case 2: 175813116Sgiacomo.travaglini@arm.com return MISCREG_ID_AA64MMFR2_EL1; 175913116Sgiacomo.travaglini@arm.com case 3 ... 7: 176010037SARM gem5 Developers return MISCREG_RAZ; 176110037SARM gem5 Developers } 176210037SARM gem5 Developers break; 176310037SARM gem5 Developers } 176410037SARM gem5 Developers break; 176510037SARM gem5 Developers case 1: 176610037SARM gem5 Developers switch (crm) { 176710037SARM gem5 Developers case 0: 176810037SARM gem5 Developers switch (op2) { 176910037SARM gem5 Developers case 0: 177010037SARM gem5 Developers return MISCREG_CCSIDR_EL1; 177110037SARM gem5 Developers case 1: 177210037SARM gem5 Developers return MISCREG_CLIDR_EL1; 177310037SARM gem5 Developers case 7: 177410037SARM gem5 Developers return MISCREG_AIDR_EL1; 177510037SARM gem5 Developers } 177610037SARM gem5 Developers break; 177710037SARM gem5 Developers } 177810037SARM gem5 Developers break; 177910037SARM gem5 Developers case 2: 178010037SARM gem5 Developers switch (crm) { 178110037SARM gem5 Developers case 0: 178210037SARM gem5 Developers switch (op2) { 178310037SARM gem5 Developers case 0: 178410037SARM gem5 Developers return MISCREG_CSSELR_EL1; 178510037SARM gem5 Developers } 178610037SARM gem5 Developers break; 178710037SARM gem5 Developers } 178810037SARM gem5 Developers break; 178910037SARM gem5 Developers case 3: 179010037SARM gem5 Developers switch (crm) { 179110037SARM gem5 Developers case 0: 179210037SARM gem5 Developers switch (op2) { 179310037SARM gem5 Developers case 1: 179410037SARM gem5 Developers return MISCREG_CTR_EL0; 179510037SARM gem5 Developers case 7: 179610037SARM gem5 Developers return MISCREG_DCZID_EL0; 179710037SARM gem5 Developers } 179810037SARM gem5 Developers break; 179910037SARM gem5 Developers } 180010037SARM gem5 Developers break; 180110037SARM gem5 Developers case 4: 180210037SARM gem5 Developers switch (crm) { 180310037SARM gem5 Developers case 0: 180410037SARM gem5 Developers switch (op2) { 180510037SARM gem5 Developers case 0: 180610037SARM gem5 Developers return MISCREG_VPIDR_EL2; 180710037SARM gem5 Developers case 5: 180810037SARM gem5 Developers return MISCREG_VMPIDR_EL2; 180910037SARM gem5 Developers } 181010037SARM gem5 Developers break; 181110037SARM gem5 Developers } 181210037SARM gem5 Developers break; 181310037SARM gem5 Developers } 181410037SARM gem5 Developers break; 181510037SARM gem5 Developers case 1: 181610037SARM gem5 Developers switch (op1) { 181710037SARM gem5 Developers case 0: 181810037SARM gem5 Developers switch (crm) { 181910037SARM gem5 Developers case 0: 182010037SARM gem5 Developers switch (op2) { 182110037SARM gem5 Developers case 0: 182210037SARM gem5 Developers return MISCREG_SCTLR_EL1; 182310037SARM gem5 Developers case 1: 182410037SARM gem5 Developers return MISCREG_ACTLR_EL1; 182510037SARM gem5 Developers case 2: 182610037SARM gem5 Developers return MISCREG_CPACR_EL1; 182710037SARM gem5 Developers } 182810037SARM gem5 Developers break; 182913759Sgiacomo.gabrielli@arm.com case 2: 183013759Sgiacomo.gabrielli@arm.com switch (op2) { 183113759Sgiacomo.gabrielli@arm.com case 0: 183213759Sgiacomo.gabrielli@arm.com return MISCREG_ZCR_EL1; 183313759Sgiacomo.gabrielli@arm.com } 183413759Sgiacomo.gabrielli@arm.com break; 183510037SARM gem5 Developers } 183610037SARM gem5 Developers break; 183710037SARM gem5 Developers case 4: 183810037SARM gem5 Developers switch (crm) { 183910037SARM gem5 Developers case 0: 184010037SARM gem5 Developers switch (op2) { 184110037SARM gem5 Developers case 0: 184210037SARM gem5 Developers return MISCREG_SCTLR_EL2; 184310037SARM gem5 Developers case 1: 184410037SARM gem5 Developers return MISCREG_ACTLR_EL2; 184510037SARM gem5 Developers } 184610037SARM gem5 Developers break; 184710037SARM gem5 Developers case 1: 184810037SARM gem5 Developers switch (op2) { 184910037SARM gem5 Developers case 0: 185010037SARM gem5 Developers return MISCREG_HCR_EL2; 185110037SARM gem5 Developers case 1: 185210037SARM gem5 Developers return MISCREG_MDCR_EL2; 185310037SARM gem5 Developers case 2: 185410037SARM gem5 Developers return MISCREG_CPTR_EL2; 185510037SARM gem5 Developers case 3: 185610037SARM gem5 Developers return MISCREG_HSTR_EL2; 185710037SARM gem5 Developers case 7: 185810037SARM gem5 Developers return MISCREG_HACR_EL2; 185910037SARM gem5 Developers } 186010037SARM gem5 Developers break; 186113759Sgiacomo.gabrielli@arm.com case 2: 186213759Sgiacomo.gabrielli@arm.com switch (op2) { 186313759Sgiacomo.gabrielli@arm.com case 0: 186413759Sgiacomo.gabrielli@arm.com return MISCREG_ZCR_EL2; 186513759Sgiacomo.gabrielli@arm.com } 186613759Sgiacomo.gabrielli@arm.com break; 186713759Sgiacomo.gabrielli@arm.com } 186813759Sgiacomo.gabrielli@arm.com break; 186913759Sgiacomo.gabrielli@arm.com case 5: 187013759Sgiacomo.gabrielli@arm.com switch (crm) { 187113759Sgiacomo.gabrielli@arm.com case 2: 187213759Sgiacomo.gabrielli@arm.com switch (op2) { 187313759Sgiacomo.gabrielli@arm.com case 0: 187413759Sgiacomo.gabrielli@arm.com return MISCREG_ZCR_EL12; 187513759Sgiacomo.gabrielli@arm.com } 187613759Sgiacomo.gabrielli@arm.com break; 187710037SARM gem5 Developers } 187810037SARM gem5 Developers break; 187910037SARM gem5 Developers case 6: 188010037SARM gem5 Developers switch (crm) { 188110037SARM gem5 Developers case 0: 188210037SARM gem5 Developers switch (op2) { 188310037SARM gem5 Developers case 0: 188410037SARM gem5 Developers return MISCREG_SCTLR_EL3; 188510037SARM gem5 Developers case 1: 188610037SARM gem5 Developers return MISCREG_ACTLR_EL3; 188710037SARM gem5 Developers } 188810037SARM gem5 Developers break; 188910037SARM gem5 Developers case 1: 189010037SARM gem5 Developers switch (op2) { 189110037SARM gem5 Developers case 0: 189210037SARM gem5 Developers return MISCREG_SCR_EL3; 189310037SARM gem5 Developers case 1: 189410037SARM gem5 Developers return MISCREG_SDER32_EL3; 189510037SARM gem5 Developers case 2: 189610037SARM gem5 Developers return MISCREG_CPTR_EL3; 189710037SARM gem5 Developers } 189810037SARM gem5 Developers break; 189913759Sgiacomo.gabrielli@arm.com case 2: 190013759Sgiacomo.gabrielli@arm.com switch (op2) { 190113759Sgiacomo.gabrielli@arm.com case 0: 190213759Sgiacomo.gabrielli@arm.com return MISCREG_ZCR_EL3; 190313759Sgiacomo.gabrielli@arm.com } 190413759Sgiacomo.gabrielli@arm.com break; 190510037SARM gem5 Developers case 3: 190610037SARM gem5 Developers switch (op2) { 190710037SARM gem5 Developers case 1: 190810037SARM gem5 Developers return MISCREG_MDCR_EL3; 190910037SARM gem5 Developers } 191010037SARM gem5 Developers break; 191110037SARM gem5 Developers } 191210037SARM gem5 Developers break; 191310037SARM gem5 Developers } 191410037SARM gem5 Developers break; 191510037SARM gem5 Developers case 2: 191610037SARM gem5 Developers switch (op1) { 191710037SARM gem5 Developers case 0: 191810037SARM gem5 Developers switch (crm) { 191910037SARM gem5 Developers case 0: 192010037SARM gem5 Developers switch (op2) { 192110037SARM gem5 Developers case 0: 192210037SARM gem5 Developers return MISCREG_TTBR0_EL1; 192310037SARM gem5 Developers case 1: 192410037SARM gem5 Developers return MISCREG_TTBR1_EL1; 192510037SARM gem5 Developers case 2: 192610037SARM gem5 Developers return MISCREG_TCR_EL1; 192710037SARM gem5 Developers } 192810037SARM gem5 Developers break; 192910037SARM gem5 Developers } 193010037SARM gem5 Developers break; 193110037SARM gem5 Developers case 4: 193210037SARM gem5 Developers switch (crm) { 193310037SARM gem5 Developers case 0: 193410037SARM gem5 Developers switch (op2) { 193510037SARM gem5 Developers case 0: 193610037SARM gem5 Developers return MISCREG_TTBR0_EL2; 193712675Sgiacomo.travaglini@arm.com case 1: 193812675Sgiacomo.travaglini@arm.com return MISCREG_TTBR1_EL2; 193910037SARM gem5 Developers case 2: 194010037SARM gem5 Developers return MISCREG_TCR_EL2; 194110037SARM gem5 Developers } 194210037SARM gem5 Developers break; 194310037SARM gem5 Developers case 1: 194410037SARM gem5 Developers switch (op2) { 194510037SARM gem5 Developers case 0: 194610037SARM gem5 Developers return MISCREG_VTTBR_EL2; 194710037SARM gem5 Developers case 2: 194810037SARM gem5 Developers return MISCREG_VTCR_EL2; 194910037SARM gem5 Developers } 195010037SARM gem5 Developers break; 195110037SARM gem5 Developers } 195210037SARM gem5 Developers break; 195310037SARM gem5 Developers case 6: 195410037SARM gem5 Developers switch (crm) { 195510037SARM gem5 Developers case 0: 195610037SARM gem5 Developers switch (op2) { 195710037SARM gem5 Developers case 0: 195810037SARM gem5 Developers return MISCREG_TTBR0_EL3; 195910037SARM gem5 Developers case 2: 196010037SARM gem5 Developers return MISCREG_TCR_EL3; 196110037SARM gem5 Developers } 196210037SARM gem5 Developers break; 196310037SARM gem5 Developers } 196410037SARM gem5 Developers break; 196510037SARM gem5 Developers } 196610037SARM gem5 Developers break; 196710037SARM gem5 Developers case 3: 196810037SARM gem5 Developers switch (op1) { 196910037SARM gem5 Developers case 4: 197010037SARM gem5 Developers switch (crm) { 197110037SARM gem5 Developers case 0: 197210037SARM gem5 Developers switch (op2) { 197310037SARM gem5 Developers case 0: 197410037SARM gem5 Developers return MISCREG_DACR32_EL2; 197510037SARM gem5 Developers } 197610037SARM gem5 Developers break; 197710037SARM gem5 Developers } 197810037SARM gem5 Developers break; 197910037SARM gem5 Developers } 198010037SARM gem5 Developers break; 198110037SARM gem5 Developers case 4: 198210037SARM gem5 Developers switch (op1) { 198310037SARM gem5 Developers case 0: 198410037SARM gem5 Developers switch (crm) { 198510037SARM gem5 Developers case 0: 198610037SARM gem5 Developers switch (op2) { 198710037SARM gem5 Developers case 0: 198810037SARM gem5 Developers return MISCREG_SPSR_EL1; 198910037SARM gem5 Developers case 1: 199010037SARM gem5 Developers return MISCREG_ELR_EL1; 199110037SARM gem5 Developers } 199210037SARM gem5 Developers break; 199310037SARM gem5 Developers case 1: 199410037SARM gem5 Developers switch (op2) { 199510037SARM gem5 Developers case 0: 199610037SARM gem5 Developers return MISCREG_SP_EL0; 199710037SARM gem5 Developers } 199810037SARM gem5 Developers break; 199910037SARM gem5 Developers case 2: 200010037SARM gem5 Developers switch (op2) { 200110037SARM gem5 Developers case 0: 200210037SARM gem5 Developers return MISCREG_SPSEL; 200310037SARM gem5 Developers case 2: 200410037SARM gem5 Developers return MISCREG_CURRENTEL; 200514128Sgiacomo.travaglini@arm.com case 3: 200614128Sgiacomo.travaglini@arm.com return MISCREG_PAN; 200710037SARM gem5 Developers } 200810037SARM gem5 Developers break; 200913531Sjairo.balart@metempsy.com case 6: 201013531Sjairo.balart@metempsy.com switch (op2) { 201113531Sjairo.balart@metempsy.com case 0: 201213531Sjairo.balart@metempsy.com return MISCREG_ICC_PMR_EL1; 201313531Sjairo.balart@metempsy.com } 201413531Sjairo.balart@metempsy.com break; 201510037SARM gem5 Developers } 201610037SARM gem5 Developers break; 201710037SARM gem5 Developers case 3: 201810037SARM gem5 Developers switch (crm) { 201910037SARM gem5 Developers case 2: 202010037SARM gem5 Developers switch (op2) { 202110037SARM gem5 Developers case 0: 202210037SARM gem5 Developers return MISCREG_NZCV; 202310037SARM gem5 Developers case 1: 202410037SARM gem5 Developers return MISCREG_DAIF; 202510037SARM gem5 Developers } 202610037SARM gem5 Developers break; 202710037SARM gem5 Developers case 4: 202810037SARM gem5 Developers switch (op2) { 202910037SARM gem5 Developers case 0: 203010037SARM gem5 Developers return MISCREG_FPCR; 203110037SARM gem5 Developers case 1: 203210037SARM gem5 Developers return MISCREG_FPSR; 203310037SARM gem5 Developers } 203410037SARM gem5 Developers break; 203510037SARM gem5 Developers case 5: 203610037SARM gem5 Developers switch (op2) { 203710037SARM gem5 Developers case 0: 203810037SARM gem5 Developers return MISCREG_DSPSR_EL0; 203910037SARM gem5 Developers case 1: 204010037SARM gem5 Developers return MISCREG_DLR_EL0; 204110037SARM gem5 Developers } 204210037SARM gem5 Developers break; 204310037SARM gem5 Developers } 204410037SARM gem5 Developers break; 204510037SARM gem5 Developers case 4: 204610037SARM gem5 Developers switch (crm) { 204710037SARM gem5 Developers case 0: 204810037SARM gem5 Developers switch (op2) { 204910037SARM gem5 Developers case 0: 205010037SARM gem5 Developers return MISCREG_SPSR_EL2; 205110037SARM gem5 Developers case 1: 205210037SARM gem5 Developers return MISCREG_ELR_EL2; 205310037SARM gem5 Developers } 205410037SARM gem5 Developers break; 205510037SARM gem5 Developers case 1: 205610037SARM gem5 Developers switch (op2) { 205710037SARM gem5 Developers case 0: 205810037SARM gem5 Developers return MISCREG_SP_EL1; 205910037SARM gem5 Developers } 206010037SARM gem5 Developers break; 206110037SARM gem5 Developers case 3: 206210037SARM gem5 Developers switch (op2) { 206310037SARM gem5 Developers case 0: 206410037SARM gem5 Developers return MISCREG_SPSR_IRQ_AA64; 206510037SARM gem5 Developers case 1: 206610037SARM gem5 Developers return MISCREG_SPSR_ABT_AA64; 206710037SARM gem5 Developers case 2: 206810037SARM gem5 Developers return MISCREG_SPSR_UND_AA64; 206910037SARM gem5 Developers case 3: 207010037SARM gem5 Developers return MISCREG_SPSR_FIQ_AA64; 207110037SARM gem5 Developers } 207210037SARM gem5 Developers break; 207310037SARM gem5 Developers } 207410037SARM gem5 Developers break; 207510037SARM gem5 Developers case 6: 207610037SARM gem5 Developers switch (crm) { 207710037SARM gem5 Developers case 0: 207810037SARM gem5 Developers switch (op2) { 207910037SARM gem5 Developers case 0: 208010037SARM gem5 Developers return MISCREG_SPSR_EL3; 208110037SARM gem5 Developers case 1: 208210037SARM gem5 Developers return MISCREG_ELR_EL3; 208310037SARM gem5 Developers } 208410037SARM gem5 Developers break; 208510037SARM gem5 Developers case 1: 208610037SARM gem5 Developers switch (op2) { 208710037SARM gem5 Developers case 0: 208810037SARM gem5 Developers return MISCREG_SP_EL2; 208910037SARM gem5 Developers } 209010037SARM gem5 Developers break; 209110037SARM gem5 Developers } 209210037SARM gem5 Developers break; 209310037SARM gem5 Developers } 209410037SARM gem5 Developers break; 209510037SARM gem5 Developers case 5: 209610037SARM gem5 Developers switch (op1) { 209710037SARM gem5 Developers case 0: 209810037SARM gem5 Developers switch (crm) { 209910037SARM gem5 Developers case 1: 210010037SARM gem5 Developers switch (op2) { 210110037SARM gem5 Developers case 0: 210210037SARM gem5 Developers return MISCREG_AFSR0_EL1; 210310037SARM gem5 Developers case 1: 210410037SARM gem5 Developers return MISCREG_AFSR1_EL1; 210510037SARM gem5 Developers } 210610037SARM gem5 Developers break; 210710037SARM gem5 Developers case 2: 210810037SARM gem5 Developers switch (op2) { 210910037SARM gem5 Developers case 0: 211010037SARM gem5 Developers return MISCREG_ESR_EL1; 211110037SARM gem5 Developers } 211210037SARM gem5 Developers break; 211312815Sgiacomo.travaglini@arm.com case 3: 211412815Sgiacomo.travaglini@arm.com switch (op2) { 211512815Sgiacomo.travaglini@arm.com case 0: 211612815Sgiacomo.travaglini@arm.com return MISCREG_ERRIDR_EL1; 211712815Sgiacomo.travaglini@arm.com case 1: 211812815Sgiacomo.travaglini@arm.com return MISCREG_ERRSELR_EL1; 211912815Sgiacomo.travaglini@arm.com } 212012815Sgiacomo.travaglini@arm.com break; 212112815Sgiacomo.travaglini@arm.com case 4: 212212815Sgiacomo.travaglini@arm.com switch (op2) { 212312815Sgiacomo.travaglini@arm.com case 0: 212412815Sgiacomo.travaglini@arm.com return MISCREG_ERXFR_EL1; 212512815Sgiacomo.travaglini@arm.com case 1: 212612815Sgiacomo.travaglini@arm.com return MISCREG_ERXCTLR_EL1; 212712815Sgiacomo.travaglini@arm.com case 2: 212812815Sgiacomo.travaglini@arm.com return MISCREG_ERXSTATUS_EL1; 212912815Sgiacomo.travaglini@arm.com case 3: 213012815Sgiacomo.travaglini@arm.com return MISCREG_ERXADDR_EL1; 213112815Sgiacomo.travaglini@arm.com } 213212815Sgiacomo.travaglini@arm.com break; 213312815Sgiacomo.travaglini@arm.com case 5: 213412815Sgiacomo.travaglini@arm.com switch (op2) { 213512815Sgiacomo.travaglini@arm.com case 0: 213612815Sgiacomo.travaglini@arm.com return MISCREG_ERXMISC0_EL1; 213712815Sgiacomo.travaglini@arm.com case 1: 213812815Sgiacomo.travaglini@arm.com return MISCREG_ERXMISC1_EL1; 213912815Sgiacomo.travaglini@arm.com } 214012815Sgiacomo.travaglini@arm.com break; 214110037SARM gem5 Developers } 214210037SARM gem5 Developers break; 214310037SARM gem5 Developers case 4: 214410037SARM gem5 Developers switch (crm) { 214510037SARM gem5 Developers case 0: 214610037SARM gem5 Developers switch (op2) { 214710037SARM gem5 Developers case 1: 214810037SARM gem5 Developers return MISCREG_IFSR32_EL2; 214910037SARM gem5 Developers } 215010037SARM gem5 Developers break; 215110037SARM gem5 Developers case 1: 215210037SARM gem5 Developers switch (op2) { 215310037SARM gem5 Developers case 0: 215410037SARM gem5 Developers return MISCREG_AFSR0_EL2; 215510037SARM gem5 Developers case 1: 215610037SARM gem5 Developers return MISCREG_AFSR1_EL2; 215710037SARM gem5 Developers } 215810037SARM gem5 Developers break; 215910037SARM gem5 Developers case 2: 216010037SARM gem5 Developers switch (op2) { 216110037SARM gem5 Developers case 0: 216210037SARM gem5 Developers return MISCREG_ESR_EL2; 216312815Sgiacomo.travaglini@arm.com case 3: 216412815Sgiacomo.travaglini@arm.com return MISCREG_VSESR_EL2; 216510037SARM gem5 Developers } 216610037SARM gem5 Developers break; 216710037SARM gem5 Developers case 3: 216810037SARM gem5 Developers switch (op2) { 216910037SARM gem5 Developers case 0: 217010037SARM gem5 Developers return MISCREG_FPEXC32_EL2; 217110037SARM gem5 Developers } 217210037SARM gem5 Developers break; 217310037SARM gem5 Developers } 217410037SARM gem5 Developers break; 217510037SARM gem5 Developers case 6: 217610037SARM gem5 Developers switch (crm) { 217710037SARM gem5 Developers case 1: 217810037SARM gem5 Developers switch (op2) { 217910037SARM gem5 Developers case 0: 218010037SARM gem5 Developers return MISCREG_AFSR0_EL3; 218110037SARM gem5 Developers case 1: 218210037SARM gem5 Developers return MISCREG_AFSR1_EL3; 218310037SARM gem5 Developers } 218410037SARM gem5 Developers break; 218510037SARM gem5 Developers case 2: 218610037SARM gem5 Developers switch (op2) { 218710037SARM gem5 Developers case 0: 218810037SARM gem5 Developers return MISCREG_ESR_EL3; 218910037SARM gem5 Developers } 219010037SARM gem5 Developers break; 219110037SARM gem5 Developers } 219210037SARM gem5 Developers break; 219310037SARM gem5 Developers } 219410037SARM gem5 Developers break; 219510037SARM gem5 Developers case 6: 219610037SARM gem5 Developers switch (op1) { 219710037SARM gem5 Developers case 0: 219810037SARM gem5 Developers switch (crm) { 219910037SARM gem5 Developers case 0: 220010037SARM gem5 Developers switch (op2) { 220110037SARM gem5 Developers case 0: 220210037SARM gem5 Developers return MISCREG_FAR_EL1; 220310037SARM gem5 Developers } 220410037SARM gem5 Developers break; 220510037SARM gem5 Developers } 220610037SARM gem5 Developers break; 220710037SARM gem5 Developers case 4: 220810037SARM gem5 Developers switch (crm) { 220910037SARM gem5 Developers case 0: 221010037SARM gem5 Developers switch (op2) { 221110037SARM gem5 Developers case 0: 221210037SARM gem5 Developers return MISCREG_FAR_EL2; 221310037SARM gem5 Developers case 4: 221410037SARM gem5 Developers return MISCREG_HPFAR_EL2; 221510037SARM gem5 Developers } 221610037SARM gem5 Developers break; 221710037SARM gem5 Developers } 221810037SARM gem5 Developers break; 221910037SARM gem5 Developers case 6: 222010037SARM gem5 Developers switch (crm) { 222110037SARM gem5 Developers case 0: 222210037SARM gem5 Developers switch (op2) { 222310037SARM gem5 Developers case 0: 222410037SARM gem5 Developers return MISCREG_FAR_EL3; 222510037SARM gem5 Developers } 222610037SARM gem5 Developers break; 222710037SARM gem5 Developers } 222810037SARM gem5 Developers break; 222910037SARM gem5 Developers } 223010037SARM gem5 Developers break; 223110037SARM gem5 Developers case 7: 223210037SARM gem5 Developers switch (op1) { 223310037SARM gem5 Developers case 0: 223410037SARM gem5 Developers switch (crm) { 223510037SARM gem5 Developers case 4: 223610037SARM gem5 Developers switch (op2) { 223710037SARM gem5 Developers case 0: 223810037SARM gem5 Developers return MISCREG_PAR_EL1; 223910037SARM gem5 Developers } 224010037SARM gem5 Developers break; 224110037SARM gem5 Developers } 224210037SARM gem5 Developers break; 224310037SARM gem5 Developers } 224410037SARM gem5 Developers break; 224510037SARM gem5 Developers case 9: 224610037SARM gem5 Developers switch (op1) { 224710037SARM gem5 Developers case 0: 224810037SARM gem5 Developers switch (crm) { 224910037SARM gem5 Developers case 14: 225010037SARM gem5 Developers switch (op2) { 225110037SARM gem5 Developers case 1: 225210037SARM gem5 Developers return MISCREG_PMINTENSET_EL1; 225310037SARM gem5 Developers case 2: 225410037SARM gem5 Developers return MISCREG_PMINTENCLR_EL1; 225510037SARM gem5 Developers } 225610037SARM gem5 Developers break; 225710037SARM gem5 Developers } 225810037SARM gem5 Developers break; 225910037SARM gem5 Developers case 3: 226010037SARM gem5 Developers switch (crm) { 226110037SARM gem5 Developers case 12: 226210037SARM gem5 Developers switch (op2) { 226310037SARM gem5 Developers case 0: 226410037SARM gem5 Developers return MISCREG_PMCR_EL0; 226510037SARM gem5 Developers case 1: 226610037SARM gem5 Developers return MISCREG_PMCNTENSET_EL0; 226710037SARM gem5 Developers case 2: 226810037SARM gem5 Developers return MISCREG_PMCNTENCLR_EL0; 226910037SARM gem5 Developers case 3: 227010037SARM gem5 Developers return MISCREG_PMOVSCLR_EL0; 227110037SARM gem5 Developers case 4: 227210037SARM gem5 Developers return MISCREG_PMSWINC_EL0; 227310037SARM gem5 Developers case 5: 227410037SARM gem5 Developers return MISCREG_PMSELR_EL0; 227510037SARM gem5 Developers case 6: 227610037SARM gem5 Developers return MISCREG_PMCEID0_EL0; 227710037SARM gem5 Developers case 7: 227810037SARM gem5 Developers return MISCREG_PMCEID1_EL0; 227910037SARM gem5 Developers } 228010037SARM gem5 Developers break; 228110037SARM gem5 Developers case 13: 228210037SARM gem5 Developers switch (op2) { 228310037SARM gem5 Developers case 0: 228410037SARM gem5 Developers return MISCREG_PMCCNTR_EL0; 228510037SARM gem5 Developers case 1: 228610604SAndreas.Sandberg@ARM.com return MISCREG_PMXEVTYPER_EL0; 228710037SARM gem5 Developers case 2: 228810037SARM gem5 Developers return MISCREG_PMXEVCNTR_EL0; 228910037SARM gem5 Developers } 229010037SARM gem5 Developers break; 229110037SARM gem5 Developers case 14: 229210037SARM gem5 Developers switch (op2) { 229310037SARM gem5 Developers case 0: 229410037SARM gem5 Developers return MISCREG_PMUSERENR_EL0; 229510037SARM gem5 Developers case 3: 229610037SARM gem5 Developers return MISCREG_PMOVSSET_EL0; 229710037SARM gem5 Developers } 229810037SARM gem5 Developers break; 229910037SARM gem5 Developers } 230010037SARM gem5 Developers break; 230110037SARM gem5 Developers } 230210037SARM gem5 Developers break; 230310037SARM gem5 Developers case 10: 230410037SARM gem5 Developers switch (op1) { 230510037SARM gem5 Developers case 0: 230610037SARM gem5 Developers switch (crm) { 230710037SARM gem5 Developers case 2: 230810037SARM gem5 Developers switch (op2) { 230910037SARM gem5 Developers case 0: 231010037SARM gem5 Developers return MISCREG_MAIR_EL1; 231110037SARM gem5 Developers } 231210037SARM gem5 Developers break; 231310037SARM gem5 Developers case 3: 231410037SARM gem5 Developers switch (op2) { 231510037SARM gem5 Developers case 0: 231610037SARM gem5 Developers return MISCREG_AMAIR_EL1; 231710037SARM gem5 Developers } 231810037SARM gem5 Developers break; 231910037SARM gem5 Developers } 232010037SARM gem5 Developers break; 232110037SARM gem5 Developers case 4: 232210037SARM gem5 Developers switch (crm) { 232310037SARM gem5 Developers case 2: 232410037SARM gem5 Developers switch (op2) { 232510037SARM gem5 Developers case 0: 232610037SARM gem5 Developers return MISCREG_MAIR_EL2; 232710037SARM gem5 Developers } 232810037SARM gem5 Developers break; 232910037SARM gem5 Developers case 3: 233010037SARM gem5 Developers switch (op2) { 233110037SARM gem5 Developers case 0: 233210037SARM gem5 Developers return MISCREG_AMAIR_EL2; 233310037SARM gem5 Developers } 233410037SARM gem5 Developers break; 233510037SARM gem5 Developers } 233610037SARM gem5 Developers break; 233710037SARM gem5 Developers case 6: 233810037SARM gem5 Developers switch (crm) { 233910037SARM gem5 Developers case 2: 234010037SARM gem5 Developers switch (op2) { 234110037SARM gem5 Developers case 0: 234210037SARM gem5 Developers return MISCREG_MAIR_EL3; 234310037SARM gem5 Developers } 234410037SARM gem5 Developers break; 234510037SARM gem5 Developers case 3: 234610037SARM gem5 Developers switch (op2) { 234710037SARM gem5 Developers case 0: 234810037SARM gem5 Developers return MISCREG_AMAIR_EL3; 234910037SARM gem5 Developers } 235010037SARM gem5 Developers break; 235110037SARM gem5 Developers } 235210037SARM gem5 Developers break; 235310037SARM gem5 Developers } 235410037SARM gem5 Developers break; 235510037SARM gem5 Developers case 11: 235610037SARM gem5 Developers switch (op1) { 235710037SARM gem5 Developers case 1: 235810037SARM gem5 Developers switch (crm) { 235910037SARM gem5 Developers case 0: 236010037SARM gem5 Developers switch (op2) { 236110037SARM gem5 Developers case 2: 236210037SARM gem5 Developers return MISCREG_L2CTLR_EL1; 236310037SARM gem5 Developers case 3: 236410037SARM gem5 Developers return MISCREG_L2ECTLR_EL1; 236510037SARM gem5 Developers } 236610037SARM gem5 Developers break; 236710037SARM gem5 Developers } 236812711Sgiacomo.travaglini@arm.com M5_FALLTHROUGH; 236912711Sgiacomo.travaglini@arm.com default: 237012711Sgiacomo.travaglini@arm.com // S3_<op1>_11_<Cm>_<op2> 237112711Sgiacomo.travaglini@arm.com return MISCREG_IMPDEF_UNIMPL; 237210037SARM gem5 Developers } 237312711Sgiacomo.travaglini@arm.com M5_UNREACHABLE; 237410037SARM gem5 Developers case 12: 237510037SARM gem5 Developers switch (op1) { 237610037SARM gem5 Developers case 0: 237710037SARM gem5 Developers switch (crm) { 237810037SARM gem5 Developers case 0: 237910037SARM gem5 Developers switch (op2) { 238010037SARM gem5 Developers case 0: 238110037SARM gem5 Developers return MISCREG_VBAR_EL1; 238210037SARM gem5 Developers case 1: 238310037SARM gem5 Developers return MISCREG_RVBAR_EL1; 238410037SARM gem5 Developers } 238510037SARM gem5 Developers break; 238610037SARM gem5 Developers case 1: 238710037SARM gem5 Developers switch (op2) { 238810037SARM gem5 Developers case 0: 238910037SARM gem5 Developers return MISCREG_ISR_EL1; 239012815Sgiacomo.travaglini@arm.com case 1: 239112815Sgiacomo.travaglini@arm.com return MISCREG_DISR_EL1; 239210037SARM gem5 Developers } 239310037SARM gem5 Developers break; 239413531Sjairo.balart@metempsy.com case 8: 239513531Sjairo.balart@metempsy.com switch (op2) { 239613531Sjairo.balart@metempsy.com case 0: 239713531Sjairo.balart@metempsy.com return MISCREG_ICC_IAR0_EL1; 239813531Sjairo.balart@metempsy.com case 1: 239913531Sjairo.balart@metempsy.com return MISCREG_ICC_EOIR0_EL1; 240013531Sjairo.balart@metempsy.com case 2: 240113531Sjairo.balart@metempsy.com return MISCREG_ICC_HPPIR0_EL1; 240213531Sjairo.balart@metempsy.com case 3: 240313531Sjairo.balart@metempsy.com return MISCREG_ICC_BPR0_EL1; 240413531Sjairo.balart@metempsy.com case 4: 240513531Sjairo.balart@metempsy.com return MISCREG_ICC_AP0R0_EL1; 240613531Sjairo.balart@metempsy.com case 5: 240713531Sjairo.balart@metempsy.com return MISCREG_ICC_AP0R1_EL1; 240813531Sjairo.balart@metempsy.com case 6: 240913531Sjairo.balart@metempsy.com return MISCREG_ICC_AP0R2_EL1; 241013531Sjairo.balart@metempsy.com case 7: 241113531Sjairo.balart@metempsy.com return MISCREG_ICC_AP0R3_EL1; 241213531Sjairo.balart@metempsy.com } 241313531Sjairo.balart@metempsy.com break; 241413531Sjairo.balart@metempsy.com case 9: 241513531Sjairo.balart@metempsy.com switch (op2) { 241613531Sjairo.balart@metempsy.com case 0: 241713531Sjairo.balart@metempsy.com return MISCREG_ICC_AP1R0_EL1; 241813531Sjairo.balart@metempsy.com case 1: 241913531Sjairo.balart@metempsy.com return MISCREG_ICC_AP1R1_EL1; 242013531Sjairo.balart@metempsy.com case 2: 242113531Sjairo.balart@metempsy.com return MISCREG_ICC_AP1R2_EL1; 242213531Sjairo.balart@metempsy.com case 3: 242313531Sjairo.balart@metempsy.com return MISCREG_ICC_AP1R3_EL1; 242413531Sjairo.balart@metempsy.com } 242513531Sjairo.balart@metempsy.com break; 242613531Sjairo.balart@metempsy.com case 11: 242713531Sjairo.balart@metempsy.com switch (op2) { 242813531Sjairo.balart@metempsy.com case 1: 242913531Sjairo.balart@metempsy.com return MISCREG_ICC_DIR_EL1; 243013531Sjairo.balart@metempsy.com case 3: 243113531Sjairo.balart@metempsy.com return MISCREG_ICC_RPR_EL1; 243213531Sjairo.balart@metempsy.com case 5: 243313531Sjairo.balart@metempsy.com return MISCREG_ICC_SGI1R_EL1; 243413531Sjairo.balart@metempsy.com case 6: 243513531Sjairo.balart@metempsy.com return MISCREG_ICC_ASGI1R_EL1; 243613531Sjairo.balart@metempsy.com case 7: 243713531Sjairo.balart@metempsy.com return MISCREG_ICC_SGI0R_EL1; 243813531Sjairo.balart@metempsy.com } 243913531Sjairo.balart@metempsy.com break; 244013531Sjairo.balart@metempsy.com case 12: 244113531Sjairo.balart@metempsy.com switch (op2) { 244213531Sjairo.balart@metempsy.com case 0: 244313531Sjairo.balart@metempsy.com return MISCREG_ICC_IAR1_EL1; 244413531Sjairo.balart@metempsy.com case 1: 244513531Sjairo.balart@metempsy.com return MISCREG_ICC_EOIR1_EL1; 244613531Sjairo.balart@metempsy.com case 2: 244713531Sjairo.balart@metempsy.com return MISCREG_ICC_HPPIR1_EL1; 244813531Sjairo.balart@metempsy.com case 3: 244913531Sjairo.balart@metempsy.com return MISCREG_ICC_BPR1_EL1; 245013531Sjairo.balart@metempsy.com case 4: 245113531Sjairo.balart@metempsy.com return MISCREG_ICC_CTLR_EL1; 245213531Sjairo.balart@metempsy.com case 5: 245313531Sjairo.balart@metempsy.com return MISCREG_ICC_SRE_EL1; 245413531Sjairo.balart@metempsy.com case 6: 245513531Sjairo.balart@metempsy.com return MISCREG_ICC_IGRPEN0_EL1; 245613531Sjairo.balart@metempsy.com case 7: 245713531Sjairo.balart@metempsy.com return MISCREG_ICC_IGRPEN1_EL1; 245813531Sjairo.balart@metempsy.com } 245913531Sjairo.balart@metempsy.com break; 246010037SARM gem5 Developers } 246110037SARM gem5 Developers break; 246210037SARM gem5 Developers case 4: 246310037SARM gem5 Developers switch (crm) { 246410037SARM gem5 Developers case 0: 246510037SARM gem5 Developers switch (op2) { 246610037SARM gem5 Developers case 0: 246710037SARM gem5 Developers return MISCREG_VBAR_EL2; 246810037SARM gem5 Developers case 1: 246910037SARM gem5 Developers return MISCREG_RVBAR_EL2; 247010037SARM gem5 Developers } 247110037SARM gem5 Developers break; 247212815Sgiacomo.travaglini@arm.com case 1: 247312815Sgiacomo.travaglini@arm.com switch (op2) { 247412815Sgiacomo.travaglini@arm.com case 1: 247512815Sgiacomo.travaglini@arm.com return MISCREG_VDISR_EL2; 247612815Sgiacomo.travaglini@arm.com } 247712815Sgiacomo.travaglini@arm.com break; 247813531Sjairo.balart@metempsy.com case 8: 247913531Sjairo.balart@metempsy.com switch (op2) { 248013531Sjairo.balart@metempsy.com case 0: 248113531Sjairo.balart@metempsy.com return MISCREG_ICH_AP0R0_EL2; 248213531Sjairo.balart@metempsy.com case 1: 248313531Sjairo.balart@metempsy.com return MISCREG_ICH_AP0R1_EL2; 248413531Sjairo.balart@metempsy.com case 2: 248513531Sjairo.balart@metempsy.com return MISCREG_ICH_AP0R2_EL2; 248613531Sjairo.balart@metempsy.com case 3: 248713531Sjairo.balart@metempsy.com return MISCREG_ICH_AP0R3_EL2; 248813531Sjairo.balart@metempsy.com } 248913531Sjairo.balart@metempsy.com break; 249013531Sjairo.balart@metempsy.com case 9: 249113531Sjairo.balart@metempsy.com switch (op2) { 249213531Sjairo.balart@metempsy.com case 0: 249313531Sjairo.balart@metempsy.com return MISCREG_ICH_AP1R0_EL2; 249413531Sjairo.balart@metempsy.com case 1: 249513531Sjairo.balart@metempsy.com return MISCREG_ICH_AP1R1_EL2; 249613531Sjairo.balart@metempsy.com case 2: 249713531Sjairo.balart@metempsy.com return MISCREG_ICH_AP1R2_EL2; 249813531Sjairo.balart@metempsy.com case 3: 249913531Sjairo.balart@metempsy.com return MISCREG_ICH_AP1R3_EL2; 250013531Sjairo.balart@metempsy.com case 5: 250113531Sjairo.balart@metempsy.com return MISCREG_ICC_SRE_EL2; 250213531Sjairo.balart@metempsy.com } 250313531Sjairo.balart@metempsy.com break; 250413531Sjairo.balart@metempsy.com case 11: 250513531Sjairo.balart@metempsy.com switch (op2) { 250613531Sjairo.balart@metempsy.com case 0: 250713531Sjairo.balart@metempsy.com return MISCREG_ICH_HCR_EL2; 250813531Sjairo.balart@metempsy.com case 1: 250913531Sjairo.balart@metempsy.com return MISCREG_ICH_VTR_EL2; 251013531Sjairo.balart@metempsy.com case 2: 251113531Sjairo.balart@metempsy.com return MISCREG_ICH_MISR_EL2; 251213531Sjairo.balart@metempsy.com case 3: 251313531Sjairo.balart@metempsy.com return MISCREG_ICH_EISR_EL2; 251413531Sjairo.balart@metempsy.com case 5: 251513531Sjairo.balart@metempsy.com return MISCREG_ICH_ELRSR_EL2; 251613531Sjairo.balart@metempsy.com case 7: 251713531Sjairo.balart@metempsy.com return MISCREG_ICH_VMCR_EL2; 251813531Sjairo.balart@metempsy.com } 251913531Sjairo.balart@metempsy.com break; 252013531Sjairo.balart@metempsy.com case 12: 252113531Sjairo.balart@metempsy.com switch (op2) { 252213531Sjairo.balart@metempsy.com case 0: 252313531Sjairo.balart@metempsy.com return MISCREG_ICH_LR0_EL2; 252413531Sjairo.balart@metempsy.com case 1: 252513531Sjairo.balart@metempsy.com return MISCREG_ICH_LR1_EL2; 252613531Sjairo.balart@metempsy.com case 2: 252713531Sjairo.balart@metempsy.com return MISCREG_ICH_LR2_EL2; 252813531Sjairo.balart@metempsy.com case 3: 252913531Sjairo.balart@metempsy.com return MISCREG_ICH_LR3_EL2; 253013531Sjairo.balart@metempsy.com case 4: 253113531Sjairo.balart@metempsy.com return MISCREG_ICH_LR4_EL2; 253213531Sjairo.balart@metempsy.com case 5: 253313531Sjairo.balart@metempsy.com return MISCREG_ICH_LR5_EL2; 253413531Sjairo.balart@metempsy.com case 6: 253513531Sjairo.balart@metempsy.com return MISCREG_ICH_LR6_EL2; 253613531Sjairo.balart@metempsy.com case 7: 253713531Sjairo.balart@metempsy.com return MISCREG_ICH_LR7_EL2; 253813531Sjairo.balart@metempsy.com } 253913531Sjairo.balart@metempsy.com break; 254013531Sjairo.balart@metempsy.com case 13: 254113531Sjairo.balart@metempsy.com switch (op2) { 254213531Sjairo.balart@metempsy.com case 0: 254313531Sjairo.balart@metempsy.com return MISCREG_ICH_LR8_EL2; 254413531Sjairo.balart@metempsy.com case 1: 254513531Sjairo.balart@metempsy.com return MISCREG_ICH_LR9_EL2; 254613531Sjairo.balart@metempsy.com case 2: 254713531Sjairo.balart@metempsy.com return MISCREG_ICH_LR10_EL2; 254813531Sjairo.balart@metempsy.com case 3: 254913531Sjairo.balart@metempsy.com return MISCREG_ICH_LR11_EL2; 255013531Sjairo.balart@metempsy.com case 4: 255113531Sjairo.balart@metempsy.com return MISCREG_ICH_LR12_EL2; 255213531Sjairo.balart@metempsy.com case 5: 255313531Sjairo.balart@metempsy.com return MISCREG_ICH_LR13_EL2; 255413531Sjairo.balart@metempsy.com case 6: 255513531Sjairo.balart@metempsy.com return MISCREG_ICH_LR14_EL2; 255613531Sjairo.balart@metempsy.com case 7: 255713531Sjairo.balart@metempsy.com return MISCREG_ICH_LR15_EL2; 255813531Sjairo.balart@metempsy.com } 255913531Sjairo.balart@metempsy.com break; 256010037SARM gem5 Developers } 256110037SARM gem5 Developers break; 256210037SARM gem5 Developers case 6: 256310037SARM gem5 Developers switch (crm) { 256410037SARM gem5 Developers case 0: 256510037SARM gem5 Developers switch (op2) { 256610037SARM gem5 Developers case 0: 256710037SARM gem5 Developers return MISCREG_VBAR_EL3; 256810037SARM gem5 Developers case 1: 256910037SARM gem5 Developers return MISCREG_RVBAR_EL3; 257010037SARM gem5 Developers case 2: 257110037SARM gem5 Developers return MISCREG_RMR_EL3; 257210037SARM gem5 Developers } 257310037SARM gem5 Developers break; 257413531Sjairo.balart@metempsy.com case 12: 257513531Sjairo.balart@metempsy.com switch (op2) { 257613531Sjairo.balart@metempsy.com case 4: 257713531Sjairo.balart@metempsy.com return MISCREG_ICC_CTLR_EL3; 257813531Sjairo.balart@metempsy.com case 5: 257913531Sjairo.balart@metempsy.com return MISCREG_ICC_SRE_EL3; 258013531Sjairo.balart@metempsy.com case 7: 258113531Sjairo.balart@metempsy.com return MISCREG_ICC_IGRPEN1_EL3; 258213531Sjairo.balart@metempsy.com } 258313531Sjairo.balart@metempsy.com break; 258410037SARM gem5 Developers } 258510037SARM gem5 Developers break; 258610037SARM gem5 Developers } 258710037SARM gem5 Developers break; 258810037SARM gem5 Developers case 13: 258910037SARM gem5 Developers switch (op1) { 259010037SARM gem5 Developers case 0: 259110037SARM gem5 Developers switch (crm) { 259210037SARM gem5 Developers case 0: 259310037SARM gem5 Developers switch (op2) { 259410037SARM gem5 Developers case 1: 259510037SARM gem5 Developers return MISCREG_CONTEXTIDR_EL1; 259610037SARM gem5 Developers case 4: 259710037SARM gem5 Developers return MISCREG_TPIDR_EL1; 259810037SARM gem5 Developers } 259910037SARM gem5 Developers break; 260010037SARM gem5 Developers } 260110037SARM gem5 Developers break; 260210037SARM gem5 Developers case 3: 260310037SARM gem5 Developers switch (crm) { 260410037SARM gem5 Developers case 0: 260510037SARM gem5 Developers switch (op2) { 260610037SARM gem5 Developers case 2: 260710037SARM gem5 Developers return MISCREG_TPIDR_EL0; 260810037SARM gem5 Developers case 3: 260910037SARM gem5 Developers return MISCREG_TPIDRRO_EL0; 261010037SARM gem5 Developers } 261110037SARM gem5 Developers break; 261210037SARM gem5 Developers } 261310037SARM gem5 Developers break; 261410037SARM gem5 Developers case 4: 261510037SARM gem5 Developers switch (crm) { 261610037SARM gem5 Developers case 0: 261710037SARM gem5 Developers switch (op2) { 261810856SCurtis.Dunham@arm.com case 1: 261910856SCurtis.Dunham@arm.com return MISCREG_CONTEXTIDR_EL2; 262010037SARM gem5 Developers case 2: 262110037SARM gem5 Developers return MISCREG_TPIDR_EL2; 262210037SARM gem5 Developers } 262310037SARM gem5 Developers break; 262410037SARM gem5 Developers } 262510037SARM gem5 Developers break; 262610037SARM gem5 Developers case 6: 262710037SARM gem5 Developers switch (crm) { 262810037SARM gem5 Developers case 0: 262910037SARM gem5 Developers switch (op2) { 263010037SARM gem5 Developers case 2: 263110037SARM gem5 Developers return MISCREG_TPIDR_EL3; 263210037SARM gem5 Developers } 263310037SARM gem5 Developers break; 263410037SARM gem5 Developers } 263510037SARM gem5 Developers break; 263610037SARM gem5 Developers } 263710037SARM gem5 Developers break; 263810037SARM gem5 Developers case 14: 263910037SARM gem5 Developers switch (op1) { 264010037SARM gem5 Developers case 0: 264110037SARM gem5 Developers switch (crm) { 264210037SARM gem5 Developers case 1: 264310037SARM gem5 Developers switch (op2) { 264410037SARM gem5 Developers case 0: 264510037SARM gem5 Developers return MISCREG_CNTKCTL_EL1; 264610037SARM gem5 Developers } 264710037SARM gem5 Developers break; 264810037SARM gem5 Developers } 264910037SARM gem5 Developers break; 265010037SARM gem5 Developers case 3: 265110037SARM gem5 Developers switch (crm) { 265210037SARM gem5 Developers case 0: 265310037SARM gem5 Developers switch (op2) { 265410037SARM gem5 Developers case 0: 265510037SARM gem5 Developers return MISCREG_CNTFRQ_EL0; 265610037SARM gem5 Developers case 1: 265710037SARM gem5 Developers return MISCREG_CNTPCT_EL0; 265810037SARM gem5 Developers case 2: 265910037SARM gem5 Developers return MISCREG_CNTVCT_EL0; 266010037SARM gem5 Developers } 266110037SARM gem5 Developers break; 266210037SARM gem5 Developers case 2: 266310037SARM gem5 Developers switch (op2) { 266410037SARM gem5 Developers case 0: 266510037SARM gem5 Developers return MISCREG_CNTP_TVAL_EL0; 266610037SARM gem5 Developers case 1: 266710037SARM gem5 Developers return MISCREG_CNTP_CTL_EL0; 266810037SARM gem5 Developers case 2: 266910037SARM gem5 Developers return MISCREG_CNTP_CVAL_EL0; 267010037SARM gem5 Developers } 267110037SARM gem5 Developers break; 267210037SARM gem5 Developers case 3: 267310037SARM gem5 Developers switch (op2) { 267410037SARM gem5 Developers case 0: 267510037SARM gem5 Developers return MISCREG_CNTV_TVAL_EL0; 267610037SARM gem5 Developers case 1: 267710037SARM gem5 Developers return MISCREG_CNTV_CTL_EL0; 267810037SARM gem5 Developers case 2: 267910037SARM gem5 Developers return MISCREG_CNTV_CVAL_EL0; 268010037SARM gem5 Developers } 268110037SARM gem5 Developers break; 268210037SARM gem5 Developers case 8: 268310037SARM gem5 Developers switch (op2) { 268410037SARM gem5 Developers case 0: 268510037SARM gem5 Developers return MISCREG_PMEVCNTR0_EL0; 268610037SARM gem5 Developers case 1: 268710037SARM gem5 Developers return MISCREG_PMEVCNTR1_EL0; 268810037SARM gem5 Developers case 2: 268910037SARM gem5 Developers return MISCREG_PMEVCNTR2_EL0; 269010037SARM gem5 Developers case 3: 269110037SARM gem5 Developers return MISCREG_PMEVCNTR3_EL0; 269210037SARM gem5 Developers case 4: 269310037SARM gem5 Developers return MISCREG_PMEVCNTR4_EL0; 269410037SARM gem5 Developers case 5: 269510037SARM gem5 Developers return MISCREG_PMEVCNTR5_EL0; 269610037SARM gem5 Developers } 269710037SARM gem5 Developers break; 269810037SARM gem5 Developers case 12: 269910037SARM gem5 Developers switch (op2) { 270010037SARM gem5 Developers case 0: 270110037SARM gem5 Developers return MISCREG_PMEVTYPER0_EL0; 270210037SARM gem5 Developers case 1: 270310037SARM gem5 Developers return MISCREG_PMEVTYPER1_EL0; 270410037SARM gem5 Developers case 2: 270510037SARM gem5 Developers return MISCREG_PMEVTYPER2_EL0; 270610037SARM gem5 Developers case 3: 270710037SARM gem5 Developers return MISCREG_PMEVTYPER3_EL0; 270810037SARM gem5 Developers case 4: 270910037SARM gem5 Developers return MISCREG_PMEVTYPER4_EL0; 271010037SARM gem5 Developers case 5: 271110037SARM gem5 Developers return MISCREG_PMEVTYPER5_EL0; 271210037SARM gem5 Developers } 271310037SARM gem5 Developers break; 271410604SAndreas.Sandberg@ARM.com case 15: 271510604SAndreas.Sandberg@ARM.com switch (op2) { 271610604SAndreas.Sandberg@ARM.com case 7: 271710604SAndreas.Sandberg@ARM.com return MISCREG_PMCCFILTR_EL0; 271810604SAndreas.Sandberg@ARM.com } 271910037SARM gem5 Developers } 272010037SARM gem5 Developers break; 272110037SARM gem5 Developers case 4: 272210037SARM gem5 Developers switch (crm) { 272310037SARM gem5 Developers case 0: 272410037SARM gem5 Developers switch (op2) { 272510037SARM gem5 Developers case 3: 272610037SARM gem5 Developers return MISCREG_CNTVOFF_EL2; 272710037SARM gem5 Developers } 272810037SARM gem5 Developers break; 272910037SARM gem5 Developers case 1: 273010037SARM gem5 Developers switch (op2) { 273110037SARM gem5 Developers case 0: 273210037SARM gem5 Developers return MISCREG_CNTHCTL_EL2; 273310037SARM gem5 Developers } 273410037SARM gem5 Developers break; 273510037SARM gem5 Developers case 2: 273610037SARM gem5 Developers switch (op2) { 273710037SARM gem5 Developers case 0: 273810037SARM gem5 Developers return MISCREG_CNTHP_TVAL_EL2; 273910037SARM gem5 Developers case 1: 274010037SARM gem5 Developers return MISCREG_CNTHP_CTL_EL2; 274110037SARM gem5 Developers case 2: 274210037SARM gem5 Developers return MISCREG_CNTHP_CVAL_EL2; 274310037SARM gem5 Developers } 274410037SARM gem5 Developers break; 274512816Sgiacomo.travaglini@arm.com case 3: 274612816Sgiacomo.travaglini@arm.com switch (op2) { 274712816Sgiacomo.travaglini@arm.com case 0: 274812816Sgiacomo.travaglini@arm.com return MISCREG_CNTHV_TVAL_EL2; 274912816Sgiacomo.travaglini@arm.com case 1: 275012816Sgiacomo.travaglini@arm.com return MISCREG_CNTHV_CTL_EL2; 275112816Sgiacomo.travaglini@arm.com case 2: 275212816Sgiacomo.travaglini@arm.com return MISCREG_CNTHV_CVAL_EL2; 275312816Sgiacomo.travaglini@arm.com } 275412816Sgiacomo.travaglini@arm.com break; 275510037SARM gem5 Developers } 275610037SARM gem5 Developers break; 275710037SARM gem5 Developers case 7: 275810037SARM gem5 Developers switch (crm) { 275910037SARM gem5 Developers case 2: 276010037SARM gem5 Developers switch (op2) { 276110037SARM gem5 Developers case 0: 276210037SARM gem5 Developers return MISCREG_CNTPS_TVAL_EL1; 276310037SARM gem5 Developers case 1: 276410037SARM gem5 Developers return MISCREG_CNTPS_CTL_EL1; 276510037SARM gem5 Developers case 2: 276610037SARM gem5 Developers return MISCREG_CNTPS_CVAL_EL1; 276710037SARM gem5 Developers } 276810037SARM gem5 Developers break; 276910037SARM gem5 Developers } 277010037SARM gem5 Developers break; 277110037SARM gem5 Developers } 277210037SARM gem5 Developers break; 277310037SARM gem5 Developers case 15: 277410037SARM gem5 Developers switch (op1) { 277510037SARM gem5 Developers case 0: 277610037SARM gem5 Developers switch (crm) { 277710037SARM gem5 Developers case 0: 277810037SARM gem5 Developers switch (op2) { 277910037SARM gem5 Developers case 0: 278010037SARM gem5 Developers return MISCREG_IL1DATA0_EL1; 278110037SARM gem5 Developers case 1: 278210037SARM gem5 Developers return MISCREG_IL1DATA1_EL1; 278310037SARM gem5 Developers case 2: 278410037SARM gem5 Developers return MISCREG_IL1DATA2_EL1; 278510037SARM gem5 Developers case 3: 278610037SARM gem5 Developers return MISCREG_IL1DATA3_EL1; 278710037SARM gem5 Developers } 278810037SARM gem5 Developers break; 278910037SARM gem5 Developers case 1: 279010037SARM gem5 Developers switch (op2) { 279110037SARM gem5 Developers case 0: 279210037SARM gem5 Developers return MISCREG_DL1DATA0_EL1; 279310037SARM gem5 Developers case 1: 279410037SARM gem5 Developers return MISCREG_DL1DATA1_EL1; 279510037SARM gem5 Developers case 2: 279610037SARM gem5 Developers return MISCREG_DL1DATA2_EL1; 279710037SARM gem5 Developers case 3: 279810037SARM gem5 Developers return MISCREG_DL1DATA3_EL1; 279910037SARM gem5 Developers case 4: 280010037SARM gem5 Developers return MISCREG_DL1DATA4_EL1; 280110037SARM gem5 Developers } 280210037SARM gem5 Developers break; 280310037SARM gem5 Developers } 280410037SARM gem5 Developers break; 280510037SARM gem5 Developers case 1: 280610037SARM gem5 Developers switch (crm) { 280710037SARM gem5 Developers case 0: 280810037SARM gem5 Developers switch (op2) { 280910037SARM gem5 Developers case 0: 281010037SARM gem5 Developers return MISCREG_L2ACTLR_EL1; 281110037SARM gem5 Developers } 281210037SARM gem5 Developers break; 281310037SARM gem5 Developers case 2: 281410037SARM gem5 Developers switch (op2) { 281510037SARM gem5 Developers case 0: 281610037SARM gem5 Developers return MISCREG_CPUACTLR_EL1; 281710037SARM gem5 Developers case 1: 281810037SARM gem5 Developers return MISCREG_CPUECTLR_EL1; 281910037SARM gem5 Developers case 2: 282010037SARM gem5 Developers return MISCREG_CPUMERRSR_EL1; 282110037SARM gem5 Developers case 3: 282210037SARM gem5 Developers return MISCREG_L2MERRSR_EL1; 282310037SARM gem5 Developers } 282410037SARM gem5 Developers break; 282510037SARM gem5 Developers case 3: 282610037SARM gem5 Developers switch (op2) { 282710037SARM gem5 Developers case 0: 282810037SARM gem5 Developers return MISCREG_CBAR_EL1; 282910037SARM gem5 Developers 283010037SARM gem5 Developers } 283110037SARM gem5 Developers break; 283210037SARM gem5 Developers } 283310037SARM gem5 Developers break; 283410037SARM gem5 Developers } 283512711Sgiacomo.travaglini@arm.com // S3_<op1>_15_<Cm>_<op2> 283612711Sgiacomo.travaglini@arm.com return MISCREG_IMPDEF_UNIMPL; 283710037SARM gem5 Developers } 283810037SARM gem5 Developers break; 283910037SARM gem5 Developers } 284010037SARM gem5 Developers 284110037SARM gem5 Developers return MISCREG_UNKNOWN; 284210037SARM gem5 Developers} 284310037SARM gem5 Developers 284412479SCurtis.Dunham@arm.combitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS]; // initialized below 284512479SCurtis.Dunham@arm.com 284612479SCurtis.Dunham@arm.comvoid 284712479SCurtis.Dunham@arm.comISA::initializeMiscRegMetadata() 284812479SCurtis.Dunham@arm.com{ 284912479SCurtis.Dunham@arm.com // the MiscReg metadata tables are shared across all instances of the 285012479SCurtis.Dunham@arm.com // ISA object, so there's no need to initialize them multiple times. 285112479SCurtis.Dunham@arm.com static bool completed = false; 285212479SCurtis.Dunham@arm.com if (completed) 285312479SCurtis.Dunham@arm.com return; 285412479SCurtis.Dunham@arm.com 285512661Sgiacomo.travaglini@arm.com // This boolean variable specifies if the system is running in aarch32 at 285612661Sgiacomo.travaglini@arm.com // EL3 (aarch32EL3 = true). It is false if EL3 is not implemented, or it 285712661Sgiacomo.travaglini@arm.com // is running in aarch64 (aarch32EL3 = false) 285812661Sgiacomo.travaglini@arm.com bool aarch32EL3 = haveSecurity && !highestELIs64; 285912661Sgiacomo.travaglini@arm.com 286013502SCurtis.Dunham@arm.com // Set Privileged Access Never on taking an exception to EL1 (Arm 8.1+), 286113502SCurtis.Dunham@arm.com // unsupported 286213502SCurtis.Dunham@arm.com bool SPAN = false; 286313502SCurtis.Dunham@arm.com 286413502SCurtis.Dunham@arm.com // Implicit error synchronization event enable (Arm 8.2+), unsupported 286513502SCurtis.Dunham@arm.com bool IESB = false; 286613502SCurtis.Dunham@arm.com 286713502SCurtis.Dunham@arm.com // Load Multiple and Store Multiple Atomicity and Ordering (Arm 8.2+), 286813502SCurtis.Dunham@arm.com // unsupported 286913502SCurtis.Dunham@arm.com bool LSMAOE = false; 287013502SCurtis.Dunham@arm.com 287113502SCurtis.Dunham@arm.com // No Trap Load Multiple and Store Multiple (Arm 8.2+), unsupported 287213502SCurtis.Dunham@arm.com bool nTLSMD = false; 287313502SCurtis.Dunham@arm.com 287413502SCurtis.Dunham@arm.com // Pointer authentication (Arm 8.3+), unsupported 287513502SCurtis.Dunham@arm.com bool EnDA = false; // using APDAKey_EL1 key of instr addrs in ELs 0,1 287613502SCurtis.Dunham@arm.com bool EnDB = false; // using APDBKey_EL1 key of instr addrs in ELs 0,1 287713502SCurtis.Dunham@arm.com bool EnIA = false; // using APIAKey_EL1 key of instr addrs in ELs 0,1 287813502SCurtis.Dunham@arm.com bool EnIB = false; // using APIBKey_EL1 key of instr addrs in ELs 0,1 287913502SCurtis.Dunham@arm.com 288012479SCurtis.Dunham@arm.com /** 288112479SCurtis.Dunham@arm.com * Some registers alias with others, and therefore need to be translated. 288212479SCurtis.Dunham@arm.com * When two mapping registers are given, they are the 32b lower and 288312479SCurtis.Dunham@arm.com * upper halves, respectively, of the 64b register being mapped. 288412479SCurtis.Dunham@arm.com * aligned with reference documentation ARM DDI 0487A.i pp 1540-1543 288512479SCurtis.Dunham@arm.com * 288612479SCurtis.Dunham@arm.com * NAM = "not architecturally mandated", 288712479SCurtis.Dunham@arm.com * from ARM DDI 0487A.i, template text 288812479SCurtis.Dunham@arm.com * "AArch64 System register ___ can be mapped to 288912479SCurtis.Dunham@arm.com * AArch32 System register ___, but this is not 289012479SCurtis.Dunham@arm.com * architecturally mandated." 289112479SCurtis.Dunham@arm.com */ 289212479SCurtis.Dunham@arm.com 289312479SCurtis.Dunham@arm.com InitReg(MISCREG_CPSR) 289412479SCurtis.Dunham@arm.com .allPrivileges(); 289512479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR) 289612479SCurtis.Dunham@arm.com .allPrivileges(); 289712479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_FIQ) 289812479SCurtis.Dunham@arm.com .allPrivileges(); 289912479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_IRQ) 290012479SCurtis.Dunham@arm.com .allPrivileges(); 290112479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_SVC) 290212479SCurtis.Dunham@arm.com .allPrivileges(); 290312479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_MON) 290412479SCurtis.Dunham@arm.com .allPrivileges(); 290512479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_ABT) 290612479SCurtis.Dunham@arm.com .allPrivileges(); 290712479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_HYP) 290812479SCurtis.Dunham@arm.com .allPrivileges(); 290912479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_UND) 291012479SCurtis.Dunham@arm.com .allPrivileges(); 291112479SCurtis.Dunham@arm.com InitReg(MISCREG_ELR_HYP) 291212479SCurtis.Dunham@arm.com .allPrivileges(); 291312479SCurtis.Dunham@arm.com InitReg(MISCREG_FPSID) 291412479SCurtis.Dunham@arm.com .allPrivileges(); 291512479SCurtis.Dunham@arm.com InitReg(MISCREG_FPSCR) 291612479SCurtis.Dunham@arm.com .allPrivileges(); 291712479SCurtis.Dunham@arm.com InitReg(MISCREG_MVFR1) 291812479SCurtis.Dunham@arm.com .allPrivileges(); 291912479SCurtis.Dunham@arm.com InitReg(MISCREG_MVFR0) 292012479SCurtis.Dunham@arm.com .allPrivileges(); 292112479SCurtis.Dunham@arm.com InitReg(MISCREG_FPEXC) 292212479SCurtis.Dunham@arm.com .allPrivileges(); 292312479SCurtis.Dunham@arm.com 292412479SCurtis.Dunham@arm.com // Helper registers 292512479SCurtis.Dunham@arm.com InitReg(MISCREG_CPSR_MODE) 292612479SCurtis.Dunham@arm.com .allPrivileges(); 292712479SCurtis.Dunham@arm.com InitReg(MISCREG_CPSR_Q) 292812479SCurtis.Dunham@arm.com .allPrivileges(); 292912479SCurtis.Dunham@arm.com InitReg(MISCREG_FPSCR_EXC) 293012479SCurtis.Dunham@arm.com .allPrivileges(); 293112479SCurtis.Dunham@arm.com InitReg(MISCREG_FPSCR_QC) 293212479SCurtis.Dunham@arm.com .allPrivileges(); 293312479SCurtis.Dunham@arm.com InitReg(MISCREG_LOCKADDR) 293412479SCurtis.Dunham@arm.com .allPrivileges(); 293512479SCurtis.Dunham@arm.com InitReg(MISCREG_LOCKFLAG) 293612479SCurtis.Dunham@arm.com .allPrivileges(); 293712479SCurtis.Dunham@arm.com InitReg(MISCREG_PRRR_MAIR0) 293812479SCurtis.Dunham@arm.com .mutex() 293912479SCurtis.Dunham@arm.com .banked(); 294012479SCurtis.Dunham@arm.com InitReg(MISCREG_PRRR_MAIR0_NS) 294112479SCurtis.Dunham@arm.com .mutex() 294212661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 294312479SCurtis.Dunham@arm.com .bankedChild(); 294412479SCurtis.Dunham@arm.com InitReg(MISCREG_PRRR_MAIR0_S) 294512479SCurtis.Dunham@arm.com .mutex() 294612479SCurtis.Dunham@arm.com .bankedChild(); 294712479SCurtis.Dunham@arm.com InitReg(MISCREG_NMRR_MAIR1) 294812479SCurtis.Dunham@arm.com .mutex() 294912479SCurtis.Dunham@arm.com .banked(); 295012479SCurtis.Dunham@arm.com InitReg(MISCREG_NMRR_MAIR1_NS) 295112479SCurtis.Dunham@arm.com .mutex() 295212661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 295312479SCurtis.Dunham@arm.com .bankedChild(); 295412479SCurtis.Dunham@arm.com InitReg(MISCREG_NMRR_MAIR1_S) 295512479SCurtis.Dunham@arm.com .mutex() 295612479SCurtis.Dunham@arm.com .bankedChild(); 295712479SCurtis.Dunham@arm.com InitReg(MISCREG_PMXEVTYPER_PMCCFILTR) 295812479SCurtis.Dunham@arm.com .mutex(); 295912479SCurtis.Dunham@arm.com InitReg(MISCREG_SCTLR_RST) 296012479SCurtis.Dunham@arm.com .allPrivileges(); 296112479SCurtis.Dunham@arm.com InitReg(MISCREG_SEV_MAILBOX) 296212479SCurtis.Dunham@arm.com .allPrivileges(); 296312479SCurtis.Dunham@arm.com 296412479SCurtis.Dunham@arm.com // AArch32 CP14 registers 296512479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDIDR) 296612479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0); 296712479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDSCRint) 296812479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0); 296912479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDCCINT) 297012479SCurtis.Dunham@arm.com .unimplemented() 297112479SCurtis.Dunham@arm.com .allPrivileges(); 297212479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDTRTXint) 297312479SCurtis.Dunham@arm.com .unimplemented() 297412479SCurtis.Dunham@arm.com .allPrivileges(); 297512479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDTRRXint) 297612479SCurtis.Dunham@arm.com .unimplemented() 297712479SCurtis.Dunham@arm.com .allPrivileges(); 297812479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWFAR) 297912479SCurtis.Dunham@arm.com .unimplemented() 298012479SCurtis.Dunham@arm.com .allPrivileges(); 298112479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGVCR) 298212479SCurtis.Dunham@arm.com .unimplemented() 298312479SCurtis.Dunham@arm.com .allPrivileges(); 298412479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDTRRXext) 298512479SCurtis.Dunham@arm.com .unimplemented() 298612479SCurtis.Dunham@arm.com .allPrivileges(); 298712479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDSCRext) 298812479SCurtis.Dunham@arm.com .unimplemented() 298912479SCurtis.Dunham@arm.com .warnNotFail() 299012479SCurtis.Dunham@arm.com .allPrivileges(); 299112479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDTRTXext) 299212479SCurtis.Dunham@arm.com .unimplemented() 299312479SCurtis.Dunham@arm.com .allPrivileges(); 299412479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGOSECCR) 299512479SCurtis.Dunham@arm.com .unimplemented() 299612479SCurtis.Dunham@arm.com .allPrivileges(); 299712479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR0) 299812479SCurtis.Dunham@arm.com .unimplemented() 299912479SCurtis.Dunham@arm.com .allPrivileges(); 300012479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR1) 300112479SCurtis.Dunham@arm.com .unimplemented() 300212479SCurtis.Dunham@arm.com .allPrivileges(); 300312479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR2) 300412479SCurtis.Dunham@arm.com .unimplemented() 300512479SCurtis.Dunham@arm.com .allPrivileges(); 300612479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR3) 300712479SCurtis.Dunham@arm.com .unimplemented() 300812479SCurtis.Dunham@arm.com .allPrivileges(); 300912479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR4) 301012479SCurtis.Dunham@arm.com .unimplemented() 301112479SCurtis.Dunham@arm.com .allPrivileges(); 301212479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR5) 301312479SCurtis.Dunham@arm.com .unimplemented() 301412479SCurtis.Dunham@arm.com .allPrivileges(); 301512479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR0) 301612479SCurtis.Dunham@arm.com .unimplemented() 301712479SCurtis.Dunham@arm.com .allPrivileges(); 301812479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR1) 301912479SCurtis.Dunham@arm.com .unimplemented() 302012479SCurtis.Dunham@arm.com .allPrivileges(); 302112479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR2) 302212479SCurtis.Dunham@arm.com .unimplemented() 302312479SCurtis.Dunham@arm.com .allPrivileges(); 302412479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR3) 302512479SCurtis.Dunham@arm.com .unimplemented() 302612479SCurtis.Dunham@arm.com .allPrivileges(); 302712479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR4) 302812479SCurtis.Dunham@arm.com .unimplemented() 302912479SCurtis.Dunham@arm.com .allPrivileges(); 303012479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR5) 303112479SCurtis.Dunham@arm.com .unimplemented() 303212479SCurtis.Dunham@arm.com .allPrivileges(); 303312479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWVR0) 303412479SCurtis.Dunham@arm.com .unimplemented() 303512479SCurtis.Dunham@arm.com .allPrivileges(); 303612479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWVR1) 303712479SCurtis.Dunham@arm.com .unimplemented() 303812479SCurtis.Dunham@arm.com .allPrivileges(); 303912479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWVR2) 304012479SCurtis.Dunham@arm.com .unimplemented() 304112479SCurtis.Dunham@arm.com .allPrivileges(); 304212479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWVR3) 304312479SCurtis.Dunham@arm.com .unimplemented() 304412479SCurtis.Dunham@arm.com .allPrivileges(); 304512479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWCR0) 304612479SCurtis.Dunham@arm.com .unimplemented() 304712479SCurtis.Dunham@arm.com .allPrivileges(); 304812479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWCR1) 304912479SCurtis.Dunham@arm.com .unimplemented() 305012479SCurtis.Dunham@arm.com .allPrivileges(); 305112479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWCR2) 305212479SCurtis.Dunham@arm.com .unimplemented() 305312479SCurtis.Dunham@arm.com .allPrivileges(); 305412479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWCR3) 305512479SCurtis.Dunham@arm.com .unimplemented() 305612479SCurtis.Dunham@arm.com .allPrivileges(); 305712479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDRAR) 305812479SCurtis.Dunham@arm.com .unimplemented() 305912479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0); 306012479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBXVR4) 306112479SCurtis.Dunham@arm.com .unimplemented() 306212479SCurtis.Dunham@arm.com .allPrivileges(); 306312479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBXVR5) 306412479SCurtis.Dunham@arm.com .unimplemented() 306512479SCurtis.Dunham@arm.com .allPrivileges(); 306612479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGOSLAR) 306712479SCurtis.Dunham@arm.com .unimplemented() 306812479SCurtis.Dunham@arm.com .allPrivileges().monSecureRead(0).monNonSecureRead(0); 306912479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGOSLSR) 307012479SCurtis.Dunham@arm.com .unimplemented() 307112479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0); 307212479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGOSDLR) 307312479SCurtis.Dunham@arm.com .unimplemented() 307412479SCurtis.Dunham@arm.com .allPrivileges(); 307512479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGPRCR) 307612479SCurtis.Dunham@arm.com .unimplemented() 307712479SCurtis.Dunham@arm.com .allPrivileges(); 307812479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDSAR) 307912479SCurtis.Dunham@arm.com .unimplemented() 308012479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0); 308112479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGCLAIMSET) 308212479SCurtis.Dunham@arm.com .unimplemented() 308312479SCurtis.Dunham@arm.com .allPrivileges(); 308412479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGCLAIMCLR) 308512479SCurtis.Dunham@arm.com .unimplemented() 308612479SCurtis.Dunham@arm.com .allPrivileges(); 308712479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGAUTHSTATUS) 308812479SCurtis.Dunham@arm.com .unimplemented() 308912479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0); 309012479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDEVID2) 309112479SCurtis.Dunham@arm.com .unimplemented() 309212479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0); 309312479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDEVID1) 309412479SCurtis.Dunham@arm.com .unimplemented() 309512479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0); 309612479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGDEVID0) 309712479SCurtis.Dunham@arm.com .unimplemented() 309812479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0); 309912479SCurtis.Dunham@arm.com InitReg(MISCREG_TEECR) 310012479SCurtis.Dunham@arm.com .unimplemented() 310112479SCurtis.Dunham@arm.com .allPrivileges(); 310212479SCurtis.Dunham@arm.com InitReg(MISCREG_JIDR) 310312479SCurtis.Dunham@arm.com .allPrivileges(); 310412479SCurtis.Dunham@arm.com InitReg(MISCREG_TEEHBR) 310512479SCurtis.Dunham@arm.com .allPrivileges(); 310612479SCurtis.Dunham@arm.com InitReg(MISCREG_JOSCR) 310712479SCurtis.Dunham@arm.com .allPrivileges(); 310812479SCurtis.Dunham@arm.com InitReg(MISCREG_JMCR) 310912479SCurtis.Dunham@arm.com .allPrivileges(); 311012479SCurtis.Dunham@arm.com 311112479SCurtis.Dunham@arm.com // AArch32 CP15 registers 311212479SCurtis.Dunham@arm.com InitReg(MISCREG_MIDR) 311312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 311412479SCurtis.Dunham@arm.com InitReg(MISCREG_CTR) 311512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 311612479SCurtis.Dunham@arm.com InitReg(MISCREG_TCMTR) 311712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 311812479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBTR) 311912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 312012479SCurtis.Dunham@arm.com InitReg(MISCREG_MPIDR) 312112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 312212479SCurtis.Dunham@arm.com InitReg(MISCREG_REVIDR) 312312479SCurtis.Dunham@arm.com .unimplemented() 312412479SCurtis.Dunham@arm.com .warnNotFail() 312512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 312612479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_PFR0) 312712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 312812479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_PFR1) 312912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 313012479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_DFR0) 313112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 313212479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AFR0) 313312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 313412479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_MMFR0) 313512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 313612479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_MMFR1) 313712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 313812479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_MMFR2) 313912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 314012479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_MMFR3) 314112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 314212479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR0) 314312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 314412479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR1) 314512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 314612479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR2) 314712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 314812479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR3) 314912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 315012479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR4) 315112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 315212479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR5) 315312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 315412479SCurtis.Dunham@arm.com InitReg(MISCREG_CCSIDR) 315512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 315612479SCurtis.Dunham@arm.com InitReg(MISCREG_CLIDR) 315712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 315812479SCurtis.Dunham@arm.com InitReg(MISCREG_AIDR) 315912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 316012479SCurtis.Dunham@arm.com InitReg(MISCREG_CSSELR) 316112479SCurtis.Dunham@arm.com .banked(); 316212479SCurtis.Dunham@arm.com InitReg(MISCREG_CSSELR_NS) 316312479SCurtis.Dunham@arm.com .bankedChild() 316412661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 316512479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 316612479SCurtis.Dunham@arm.com InitReg(MISCREG_CSSELR_S) 316712479SCurtis.Dunham@arm.com .bankedChild() 316812479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 316912479SCurtis.Dunham@arm.com InitReg(MISCREG_VPIDR) 317012479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 317112479SCurtis.Dunham@arm.com InitReg(MISCREG_VMPIDR) 317212479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 317312479SCurtis.Dunham@arm.com InitReg(MISCREG_SCTLR) 317413502SCurtis.Dunham@arm.com .banked() 317513502SCurtis.Dunham@arm.com // readMiscRegNoEffect() uses this metadata 317613502SCurtis.Dunham@arm.com // despite using children (below) as backing store 317713502SCurtis.Dunham@arm.com .res0(0x8d22c600) 317813502SCurtis.Dunham@arm.com .res1(0x00400800 | (SPAN ? 0 : 0x800000) 317913502SCurtis.Dunham@arm.com | (LSMAOE ? 0 : 0x10) 318013502SCurtis.Dunham@arm.com | (nTLSMD ? 0 : 0x8)); 318112479SCurtis.Dunham@arm.com InitReg(MISCREG_SCTLR_NS) 318212479SCurtis.Dunham@arm.com .bankedChild() 318312661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 318412479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 318512479SCurtis.Dunham@arm.com InitReg(MISCREG_SCTLR_S) 318612479SCurtis.Dunham@arm.com .bankedChild() 318712479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 318812479SCurtis.Dunham@arm.com InitReg(MISCREG_ACTLR) 318912479SCurtis.Dunham@arm.com .banked(); 319012479SCurtis.Dunham@arm.com InitReg(MISCREG_ACTLR_NS) 319112479SCurtis.Dunham@arm.com .bankedChild() 319212661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 319312479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 319412479SCurtis.Dunham@arm.com InitReg(MISCREG_ACTLR_S) 319512479SCurtis.Dunham@arm.com .bankedChild() 319612479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 319712479SCurtis.Dunham@arm.com InitReg(MISCREG_CPACR) 319812479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 319912479SCurtis.Dunham@arm.com InitReg(MISCREG_SCR) 320012479SCurtis.Dunham@arm.com .mon().secure().exceptUserMode() 320112479SCurtis.Dunham@arm.com .res0(0xff40) // [31:16], [6] 320212479SCurtis.Dunham@arm.com .res1(0x0030); // [5:4] 320312479SCurtis.Dunham@arm.com InitReg(MISCREG_SDER) 320412479SCurtis.Dunham@arm.com .mon(); 320512479SCurtis.Dunham@arm.com InitReg(MISCREG_NSACR) 320612479SCurtis.Dunham@arm.com .allPrivileges().hypWrite(0).privNonSecureWrite(0).exceptUserMode(); 320712479SCurtis.Dunham@arm.com InitReg(MISCREG_HSCTLR) 320813502SCurtis.Dunham@arm.com .hyp().monNonSecure() 320913502SCurtis.Dunham@arm.com .res0(0x0512c7c0 | (EnDB ? 0 : 0x2000) 321013502SCurtis.Dunham@arm.com | (IESB ? 0 : 0x200000) 321113502SCurtis.Dunham@arm.com | (EnDA ? 0 : 0x8000000) 321213502SCurtis.Dunham@arm.com | (EnIB ? 0 : 0x40000000) 321313502SCurtis.Dunham@arm.com | (EnIA ? 0 : 0x80000000)) 321413502SCurtis.Dunham@arm.com .res1(0x30c50830); 321512479SCurtis.Dunham@arm.com InitReg(MISCREG_HACTLR) 321612479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 321712479SCurtis.Dunham@arm.com InitReg(MISCREG_HCR) 321812479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 321912479SCurtis.Dunham@arm.com InitReg(MISCREG_HDCR) 322012479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 322112479SCurtis.Dunham@arm.com InitReg(MISCREG_HCPTR) 322212479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 322312479SCurtis.Dunham@arm.com InitReg(MISCREG_HSTR) 322412479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 322512479SCurtis.Dunham@arm.com InitReg(MISCREG_HACR) 322612479SCurtis.Dunham@arm.com .unimplemented() 322712479SCurtis.Dunham@arm.com .warnNotFail() 322812479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 322912479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBR0) 323012479SCurtis.Dunham@arm.com .banked(); 323112479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBR0_NS) 323212479SCurtis.Dunham@arm.com .bankedChild() 323312661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 323412479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 323512479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBR0_S) 323612479SCurtis.Dunham@arm.com .bankedChild() 323712479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 323812479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBR1) 323912479SCurtis.Dunham@arm.com .banked(); 324012479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBR1_NS) 324112479SCurtis.Dunham@arm.com .bankedChild() 324212661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 324312479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 324412479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBR1_S) 324512479SCurtis.Dunham@arm.com .bankedChild() 324612479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 324712479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBCR) 324812479SCurtis.Dunham@arm.com .banked(); 324912479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBCR_NS) 325012479SCurtis.Dunham@arm.com .bankedChild() 325112661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 325212479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 325312479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBCR_S) 325412479SCurtis.Dunham@arm.com .bankedChild() 325512479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 325612479SCurtis.Dunham@arm.com InitReg(MISCREG_HTCR) 325712479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 325812479SCurtis.Dunham@arm.com InitReg(MISCREG_VTCR) 325912479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 326012479SCurtis.Dunham@arm.com InitReg(MISCREG_DACR) 326112479SCurtis.Dunham@arm.com .banked(); 326212479SCurtis.Dunham@arm.com InitReg(MISCREG_DACR_NS) 326312479SCurtis.Dunham@arm.com .bankedChild() 326412661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 326512479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 326612479SCurtis.Dunham@arm.com InitReg(MISCREG_DACR_S) 326712479SCurtis.Dunham@arm.com .bankedChild() 326812479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 326912479SCurtis.Dunham@arm.com InitReg(MISCREG_DFSR) 327012479SCurtis.Dunham@arm.com .banked(); 327112479SCurtis.Dunham@arm.com InitReg(MISCREG_DFSR_NS) 327212479SCurtis.Dunham@arm.com .bankedChild() 327312661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 327412479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 327512479SCurtis.Dunham@arm.com InitReg(MISCREG_DFSR_S) 327612479SCurtis.Dunham@arm.com .bankedChild() 327712479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 327812479SCurtis.Dunham@arm.com InitReg(MISCREG_IFSR) 327912479SCurtis.Dunham@arm.com .banked(); 328012479SCurtis.Dunham@arm.com InitReg(MISCREG_IFSR_NS) 328112479SCurtis.Dunham@arm.com .bankedChild() 328212661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 328312479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 328412479SCurtis.Dunham@arm.com InitReg(MISCREG_IFSR_S) 328512479SCurtis.Dunham@arm.com .bankedChild() 328612479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 328712479SCurtis.Dunham@arm.com InitReg(MISCREG_ADFSR) 328812479SCurtis.Dunham@arm.com .unimplemented() 328912479SCurtis.Dunham@arm.com .warnNotFail() 329012479SCurtis.Dunham@arm.com .banked(); 329112479SCurtis.Dunham@arm.com InitReg(MISCREG_ADFSR_NS) 329212479SCurtis.Dunham@arm.com .unimplemented() 329312479SCurtis.Dunham@arm.com .warnNotFail() 329412479SCurtis.Dunham@arm.com .bankedChild() 329512661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 329612479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 329712479SCurtis.Dunham@arm.com InitReg(MISCREG_ADFSR_S) 329812479SCurtis.Dunham@arm.com .unimplemented() 329912479SCurtis.Dunham@arm.com .warnNotFail() 330012479SCurtis.Dunham@arm.com .bankedChild() 330112479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 330212479SCurtis.Dunham@arm.com InitReg(MISCREG_AIFSR) 330312479SCurtis.Dunham@arm.com .unimplemented() 330412479SCurtis.Dunham@arm.com .warnNotFail() 330512479SCurtis.Dunham@arm.com .banked(); 330612479SCurtis.Dunham@arm.com InitReg(MISCREG_AIFSR_NS) 330712479SCurtis.Dunham@arm.com .unimplemented() 330812479SCurtis.Dunham@arm.com .warnNotFail() 330912479SCurtis.Dunham@arm.com .bankedChild() 331012661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 331112479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 331212479SCurtis.Dunham@arm.com InitReg(MISCREG_AIFSR_S) 331312479SCurtis.Dunham@arm.com .unimplemented() 331412479SCurtis.Dunham@arm.com .warnNotFail() 331512479SCurtis.Dunham@arm.com .bankedChild() 331612479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 331712479SCurtis.Dunham@arm.com InitReg(MISCREG_HADFSR) 331812479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 331912479SCurtis.Dunham@arm.com InitReg(MISCREG_HAIFSR) 332012479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 332112479SCurtis.Dunham@arm.com InitReg(MISCREG_HSR) 332212479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 332312479SCurtis.Dunham@arm.com InitReg(MISCREG_DFAR) 332412479SCurtis.Dunham@arm.com .banked(); 332512479SCurtis.Dunham@arm.com InitReg(MISCREG_DFAR_NS) 332612479SCurtis.Dunham@arm.com .bankedChild() 332712661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 332812479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 332912479SCurtis.Dunham@arm.com InitReg(MISCREG_DFAR_S) 333012479SCurtis.Dunham@arm.com .bankedChild() 333112479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 333212479SCurtis.Dunham@arm.com InitReg(MISCREG_IFAR) 333312479SCurtis.Dunham@arm.com .banked(); 333412479SCurtis.Dunham@arm.com InitReg(MISCREG_IFAR_NS) 333512479SCurtis.Dunham@arm.com .bankedChild() 333612661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 333712479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 333812479SCurtis.Dunham@arm.com InitReg(MISCREG_IFAR_S) 333912479SCurtis.Dunham@arm.com .bankedChild() 334012479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 334112479SCurtis.Dunham@arm.com InitReg(MISCREG_HDFAR) 334212479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 334312479SCurtis.Dunham@arm.com InitReg(MISCREG_HIFAR) 334412479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 334512479SCurtis.Dunham@arm.com InitReg(MISCREG_HPFAR) 334612479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 334712479SCurtis.Dunham@arm.com InitReg(MISCREG_ICIALLUIS) 334812479SCurtis.Dunham@arm.com .unimplemented() 334912479SCurtis.Dunham@arm.com .warnNotFail() 335012479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 335112479SCurtis.Dunham@arm.com InitReg(MISCREG_BPIALLIS) 335212479SCurtis.Dunham@arm.com .unimplemented() 335312479SCurtis.Dunham@arm.com .warnNotFail() 335412479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 335512479SCurtis.Dunham@arm.com InitReg(MISCREG_PAR) 335612479SCurtis.Dunham@arm.com .banked(); 335712479SCurtis.Dunham@arm.com InitReg(MISCREG_PAR_NS) 335812479SCurtis.Dunham@arm.com .bankedChild() 335912661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 336012479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 336112479SCurtis.Dunham@arm.com InitReg(MISCREG_PAR_S) 336212479SCurtis.Dunham@arm.com .bankedChild() 336312479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 336412479SCurtis.Dunham@arm.com InitReg(MISCREG_ICIALLU) 336512479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 336612479SCurtis.Dunham@arm.com InitReg(MISCREG_ICIMVAU) 336712479SCurtis.Dunham@arm.com .unimplemented() 336812479SCurtis.Dunham@arm.com .warnNotFail() 336912479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 337012479SCurtis.Dunham@arm.com InitReg(MISCREG_CP15ISB) 337112479SCurtis.Dunham@arm.com .writes(1); 337212479SCurtis.Dunham@arm.com InitReg(MISCREG_BPIALL) 337312479SCurtis.Dunham@arm.com .unimplemented() 337412479SCurtis.Dunham@arm.com .warnNotFail() 337512479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 337612479SCurtis.Dunham@arm.com InitReg(MISCREG_BPIMVA) 337712479SCurtis.Dunham@arm.com .unimplemented() 337812479SCurtis.Dunham@arm.com .warnNotFail() 337912479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 338012479SCurtis.Dunham@arm.com InitReg(MISCREG_DCIMVAC) 338112479SCurtis.Dunham@arm.com .unimplemented() 338212479SCurtis.Dunham@arm.com .warnNotFail() 338312479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 338412479SCurtis.Dunham@arm.com InitReg(MISCREG_DCISW) 338512479SCurtis.Dunham@arm.com .unimplemented() 338612479SCurtis.Dunham@arm.com .warnNotFail() 338712479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 338812479SCurtis.Dunham@arm.com InitReg(MISCREG_ATS1CPR) 338912479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 339012479SCurtis.Dunham@arm.com InitReg(MISCREG_ATS1CPW) 339112479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 339212479SCurtis.Dunham@arm.com InitReg(MISCREG_ATS1CUR) 339312479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 339412479SCurtis.Dunham@arm.com InitReg(MISCREG_ATS1CUW) 339512479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 339612479SCurtis.Dunham@arm.com InitReg(MISCREG_ATS12NSOPR) 339712479SCurtis.Dunham@arm.com .privSecureWrite().hypWrite().monSecureWrite().monNonSecureWrite(); 339812479SCurtis.Dunham@arm.com InitReg(MISCREG_ATS12NSOPW) 339912479SCurtis.Dunham@arm.com .privSecureWrite().hypWrite().monSecureWrite().monNonSecureWrite(); 340012479SCurtis.Dunham@arm.com InitReg(MISCREG_ATS12NSOUR) 340112479SCurtis.Dunham@arm.com .privSecureWrite().hypWrite().monSecureWrite().monNonSecureWrite(); 340212479SCurtis.Dunham@arm.com InitReg(MISCREG_ATS12NSOUW) 340312479SCurtis.Dunham@arm.com .privSecureWrite().hypWrite().monSecureWrite().monNonSecureWrite(); 340412479SCurtis.Dunham@arm.com InitReg(MISCREG_DCCMVAC) 340512479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 340612479SCurtis.Dunham@arm.com InitReg(MISCREG_DCCSW) 340712479SCurtis.Dunham@arm.com .unimplemented() 340812479SCurtis.Dunham@arm.com .warnNotFail() 340912479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 341012479SCurtis.Dunham@arm.com InitReg(MISCREG_CP15DSB) 341112479SCurtis.Dunham@arm.com .writes(1); 341212479SCurtis.Dunham@arm.com InitReg(MISCREG_CP15DMB) 341312479SCurtis.Dunham@arm.com .writes(1); 341412479SCurtis.Dunham@arm.com InitReg(MISCREG_DCCMVAU) 341512479SCurtis.Dunham@arm.com .unimplemented() 341612479SCurtis.Dunham@arm.com .warnNotFail() 341712479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 341812479SCurtis.Dunham@arm.com InitReg(MISCREG_DCCIMVAC) 341912479SCurtis.Dunham@arm.com .unimplemented() 342012479SCurtis.Dunham@arm.com .warnNotFail() 342112479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 342212479SCurtis.Dunham@arm.com InitReg(MISCREG_DCCISW) 342312479SCurtis.Dunham@arm.com .unimplemented() 342412479SCurtis.Dunham@arm.com .warnNotFail() 342512479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 342612479SCurtis.Dunham@arm.com InitReg(MISCREG_ATS1HR) 342712479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 342812479SCurtis.Dunham@arm.com InitReg(MISCREG_ATS1HW) 342912479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 343012479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIALLIS) 343112479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 343212479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVAIS) 343312479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 343412479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIASIDIS) 343512479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 343612479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVAAIS) 343712479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 343812479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVALIS) 343912479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 344012479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVAALIS) 344112479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 344212479SCurtis.Dunham@arm.com InitReg(MISCREG_ITLBIALL) 344312479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 344412479SCurtis.Dunham@arm.com InitReg(MISCREG_ITLBIMVA) 344512479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 344612479SCurtis.Dunham@arm.com InitReg(MISCREG_ITLBIASID) 344712479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 344812479SCurtis.Dunham@arm.com InitReg(MISCREG_DTLBIALL) 344912479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 345012479SCurtis.Dunham@arm.com InitReg(MISCREG_DTLBIMVA) 345112479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 345212479SCurtis.Dunham@arm.com InitReg(MISCREG_DTLBIASID) 345312479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 345412479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIALL) 345512479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 345612479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVA) 345712479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 345812479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIASID) 345912479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 346012479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVAA) 346112479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 346212479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVAL) 346312479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 346412479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVAAL) 346512479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 346612479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIIPAS2IS) 346712479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 346812479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIIPAS2LIS) 346912479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 347012479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIALLHIS) 347112479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 347212479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVAHIS) 347312479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 347412479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIALLNSNHIS) 347512479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 347612479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVALHIS) 347712479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 347812479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIIPAS2) 347912479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 348012479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIIPAS2L) 348112479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 348212479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIALLH) 348312479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 348412479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVAH) 348512479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 348612479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIALLNSNH) 348712479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 348812479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBIMVALH) 348912479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 349012479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCR) 349112479SCurtis.Dunham@arm.com .allPrivileges(); 349212479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCNTENSET) 349312479SCurtis.Dunham@arm.com .allPrivileges(); 349412479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCNTENCLR) 349512479SCurtis.Dunham@arm.com .allPrivileges(); 349612479SCurtis.Dunham@arm.com InitReg(MISCREG_PMOVSR) 349712479SCurtis.Dunham@arm.com .allPrivileges(); 349812479SCurtis.Dunham@arm.com InitReg(MISCREG_PMSWINC) 349912479SCurtis.Dunham@arm.com .allPrivileges(); 350012479SCurtis.Dunham@arm.com InitReg(MISCREG_PMSELR) 350112479SCurtis.Dunham@arm.com .allPrivileges(); 350212479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCEID0) 350312479SCurtis.Dunham@arm.com .allPrivileges(); 350412479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCEID1) 350512479SCurtis.Dunham@arm.com .allPrivileges(); 350612479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCCNTR) 350712479SCurtis.Dunham@arm.com .allPrivileges(); 350812479SCurtis.Dunham@arm.com InitReg(MISCREG_PMXEVTYPER) 350912479SCurtis.Dunham@arm.com .allPrivileges(); 351012479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCCFILTR) 351112479SCurtis.Dunham@arm.com .allPrivileges(); 351212479SCurtis.Dunham@arm.com InitReg(MISCREG_PMXEVCNTR) 351312479SCurtis.Dunham@arm.com .allPrivileges(); 351412479SCurtis.Dunham@arm.com InitReg(MISCREG_PMUSERENR) 351512479SCurtis.Dunham@arm.com .allPrivileges().userNonSecureWrite(0).userSecureWrite(0); 351612479SCurtis.Dunham@arm.com InitReg(MISCREG_PMINTENSET) 351712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 351812479SCurtis.Dunham@arm.com InitReg(MISCREG_PMINTENCLR) 351912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 352012479SCurtis.Dunham@arm.com InitReg(MISCREG_PMOVSSET) 352112479SCurtis.Dunham@arm.com .unimplemented() 352212479SCurtis.Dunham@arm.com .allPrivileges(); 352312479SCurtis.Dunham@arm.com InitReg(MISCREG_L2CTLR) 352412479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 352512479SCurtis.Dunham@arm.com InitReg(MISCREG_L2ECTLR) 352612479SCurtis.Dunham@arm.com .unimplemented() 352712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 352812479SCurtis.Dunham@arm.com InitReg(MISCREG_PRRR) 352912479SCurtis.Dunham@arm.com .banked(); 353012479SCurtis.Dunham@arm.com InitReg(MISCREG_PRRR_NS) 353112479SCurtis.Dunham@arm.com .bankedChild() 353212661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 353312479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 353412479SCurtis.Dunham@arm.com InitReg(MISCREG_PRRR_S) 353512479SCurtis.Dunham@arm.com .bankedChild() 353612479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 353712479SCurtis.Dunham@arm.com InitReg(MISCREG_MAIR0) 353812479SCurtis.Dunham@arm.com .banked(); 353912479SCurtis.Dunham@arm.com InitReg(MISCREG_MAIR0_NS) 354012479SCurtis.Dunham@arm.com .bankedChild() 354112661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 354212479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 354312479SCurtis.Dunham@arm.com InitReg(MISCREG_MAIR0_S) 354412479SCurtis.Dunham@arm.com .bankedChild() 354512479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 354612479SCurtis.Dunham@arm.com InitReg(MISCREG_NMRR) 354712479SCurtis.Dunham@arm.com .banked(); 354812479SCurtis.Dunham@arm.com InitReg(MISCREG_NMRR_NS) 354912479SCurtis.Dunham@arm.com .bankedChild() 355012661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 355112479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 355212479SCurtis.Dunham@arm.com InitReg(MISCREG_NMRR_S) 355312479SCurtis.Dunham@arm.com .bankedChild() 355412479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 355512479SCurtis.Dunham@arm.com InitReg(MISCREG_MAIR1) 355612479SCurtis.Dunham@arm.com .banked(); 355712479SCurtis.Dunham@arm.com InitReg(MISCREG_MAIR1_NS) 355812479SCurtis.Dunham@arm.com .bankedChild() 355912661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 356012479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 356112479SCurtis.Dunham@arm.com InitReg(MISCREG_MAIR1_S) 356212479SCurtis.Dunham@arm.com .bankedChild() 356312479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 356412479SCurtis.Dunham@arm.com InitReg(MISCREG_AMAIR0) 356512479SCurtis.Dunham@arm.com .banked(); 356612479SCurtis.Dunham@arm.com InitReg(MISCREG_AMAIR0_NS) 356712479SCurtis.Dunham@arm.com .bankedChild() 356812661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 356912479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 357012479SCurtis.Dunham@arm.com InitReg(MISCREG_AMAIR0_S) 357112479SCurtis.Dunham@arm.com .bankedChild() 357212479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 357312479SCurtis.Dunham@arm.com InitReg(MISCREG_AMAIR1) 357412479SCurtis.Dunham@arm.com .banked(); 357512479SCurtis.Dunham@arm.com InitReg(MISCREG_AMAIR1_NS) 357612479SCurtis.Dunham@arm.com .bankedChild() 357712661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 357812479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 357912479SCurtis.Dunham@arm.com InitReg(MISCREG_AMAIR1_S) 358012479SCurtis.Dunham@arm.com .bankedChild() 358112479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 358212479SCurtis.Dunham@arm.com InitReg(MISCREG_HMAIR0) 358312479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 358412479SCurtis.Dunham@arm.com InitReg(MISCREG_HMAIR1) 358512479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 358612479SCurtis.Dunham@arm.com InitReg(MISCREG_HAMAIR0) 358712479SCurtis.Dunham@arm.com .unimplemented() 358812479SCurtis.Dunham@arm.com .warnNotFail() 358912479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 359012479SCurtis.Dunham@arm.com InitReg(MISCREG_HAMAIR1) 359112479SCurtis.Dunham@arm.com .unimplemented() 359212479SCurtis.Dunham@arm.com .warnNotFail() 359312479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 359412479SCurtis.Dunham@arm.com InitReg(MISCREG_VBAR) 359512479SCurtis.Dunham@arm.com .banked(); 359612479SCurtis.Dunham@arm.com InitReg(MISCREG_VBAR_NS) 359712479SCurtis.Dunham@arm.com .bankedChild() 359812661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 359912479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 360012479SCurtis.Dunham@arm.com InitReg(MISCREG_VBAR_S) 360112479SCurtis.Dunham@arm.com .bankedChild() 360212479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 360312479SCurtis.Dunham@arm.com InitReg(MISCREG_MVBAR) 360413395Sgiacomo.travaglini@arm.com .mon().secure() 360513395Sgiacomo.travaglini@arm.com .hypRead(FullSystem && system->highestEL() == EL2) 360613395Sgiacomo.travaglini@arm.com .privRead(FullSystem && system->highestEL() == EL1) 360713395Sgiacomo.travaglini@arm.com .exceptUserMode(); 360812479SCurtis.Dunham@arm.com InitReg(MISCREG_RMR) 360912479SCurtis.Dunham@arm.com .unimplemented() 361012479SCurtis.Dunham@arm.com .mon().secure().exceptUserMode(); 361112479SCurtis.Dunham@arm.com InitReg(MISCREG_ISR) 361212479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 361312479SCurtis.Dunham@arm.com InitReg(MISCREG_HVBAR) 361413502SCurtis.Dunham@arm.com .hyp().monNonSecure() 361513502SCurtis.Dunham@arm.com .res0(0x1f); 361612479SCurtis.Dunham@arm.com InitReg(MISCREG_FCSEIDR) 361712479SCurtis.Dunham@arm.com .unimplemented() 361812479SCurtis.Dunham@arm.com .warnNotFail() 361912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 362012479SCurtis.Dunham@arm.com InitReg(MISCREG_CONTEXTIDR) 362112479SCurtis.Dunham@arm.com .banked(); 362212479SCurtis.Dunham@arm.com InitReg(MISCREG_CONTEXTIDR_NS) 362312479SCurtis.Dunham@arm.com .bankedChild() 362412661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 362512479SCurtis.Dunham@arm.com .nonSecure().exceptUserMode(); 362612479SCurtis.Dunham@arm.com InitReg(MISCREG_CONTEXTIDR_S) 362712479SCurtis.Dunham@arm.com .bankedChild() 362812479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 362912479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDRURW) 363012479SCurtis.Dunham@arm.com .banked(); 363112479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDRURW_NS) 363212479SCurtis.Dunham@arm.com .bankedChild() 363312661Sgiacomo.travaglini@arm.com .allPrivileges() 363412661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 363512661Sgiacomo.travaglini@arm.com .monSecure(0); 363612479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDRURW_S) 363712479SCurtis.Dunham@arm.com .bankedChild() 363812479SCurtis.Dunham@arm.com .secure(); 363912479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDRURO) 364012479SCurtis.Dunham@arm.com .banked(); 364112479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDRURO_NS) 364212479SCurtis.Dunham@arm.com .bankedChild() 364312661Sgiacomo.travaglini@arm.com .allPrivileges() 364412661Sgiacomo.travaglini@arm.com .userNonSecureWrite(0).userSecureRead(1) 364512661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 364612661Sgiacomo.travaglini@arm.com .monSecure(0); 364712479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDRURO_S) 364812479SCurtis.Dunham@arm.com .bankedChild() 364912479SCurtis.Dunham@arm.com .secure().userSecureWrite(0); 365012479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDRPRW) 365112479SCurtis.Dunham@arm.com .banked(); 365212479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDRPRW_NS) 365312479SCurtis.Dunham@arm.com .bankedChild() 365412661Sgiacomo.travaglini@arm.com .nonSecure().exceptUserMode() 365512661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3); 365612479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDRPRW_S) 365712479SCurtis.Dunham@arm.com .bankedChild() 365812479SCurtis.Dunham@arm.com .secure().exceptUserMode(); 365912479SCurtis.Dunham@arm.com InitReg(MISCREG_HTPIDR) 366012479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 366112479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTFRQ) 366212479SCurtis.Dunham@arm.com .unverifiable() 366312479SCurtis.Dunham@arm.com .reads(1).mon(); 366412479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTKCTL) 366512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 366612479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_TVAL) 366712479SCurtis.Dunham@arm.com .banked(); 366812479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_TVAL_NS) 366912479SCurtis.Dunham@arm.com .bankedChild() 367012661Sgiacomo.travaglini@arm.com .allPrivileges() 367112661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 367212661Sgiacomo.travaglini@arm.com .monSecure(0); 367312479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_TVAL_S) 367412479SCurtis.Dunham@arm.com .bankedChild() 367512479SCurtis.Dunham@arm.com .secure().user(1); 367612479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_CTL) 367712479SCurtis.Dunham@arm.com .banked(); 367812479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_CTL_NS) 367912479SCurtis.Dunham@arm.com .bankedChild() 368012661Sgiacomo.travaglini@arm.com .allPrivileges() 368112661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 368212661Sgiacomo.travaglini@arm.com .monSecure(0); 368312479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_CTL_S) 368412479SCurtis.Dunham@arm.com .bankedChild() 368512479SCurtis.Dunham@arm.com .secure().user(1); 368612479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTV_TVAL) 368712479SCurtis.Dunham@arm.com .allPrivileges(); 368812479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTV_CTL) 368912479SCurtis.Dunham@arm.com .allPrivileges(); 369012479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTHCTL) 369112479SCurtis.Dunham@arm.com .hypWrite().monNonSecureRead(); 369212479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTHP_TVAL) 369312479SCurtis.Dunham@arm.com .hypWrite().monNonSecureRead(); 369412479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTHP_CTL) 369512479SCurtis.Dunham@arm.com .hypWrite().monNonSecureRead(); 369612479SCurtis.Dunham@arm.com InitReg(MISCREG_IL1DATA0) 369712479SCurtis.Dunham@arm.com .unimplemented() 369812479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 369912479SCurtis.Dunham@arm.com InitReg(MISCREG_IL1DATA1) 370012479SCurtis.Dunham@arm.com .unimplemented() 370112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 370212479SCurtis.Dunham@arm.com InitReg(MISCREG_IL1DATA2) 370312479SCurtis.Dunham@arm.com .unimplemented() 370412479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 370512479SCurtis.Dunham@arm.com InitReg(MISCREG_IL1DATA3) 370612479SCurtis.Dunham@arm.com .unimplemented() 370712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 370812479SCurtis.Dunham@arm.com InitReg(MISCREG_DL1DATA0) 370912479SCurtis.Dunham@arm.com .unimplemented() 371012479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 371112479SCurtis.Dunham@arm.com InitReg(MISCREG_DL1DATA1) 371212479SCurtis.Dunham@arm.com .unimplemented() 371312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 371412479SCurtis.Dunham@arm.com InitReg(MISCREG_DL1DATA2) 371512479SCurtis.Dunham@arm.com .unimplemented() 371612479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 371712479SCurtis.Dunham@arm.com InitReg(MISCREG_DL1DATA3) 371812479SCurtis.Dunham@arm.com .unimplemented() 371912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 372012479SCurtis.Dunham@arm.com InitReg(MISCREG_DL1DATA4) 372112479SCurtis.Dunham@arm.com .unimplemented() 372212479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 372312479SCurtis.Dunham@arm.com InitReg(MISCREG_RAMINDEX) 372412479SCurtis.Dunham@arm.com .unimplemented() 372512479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 372612479SCurtis.Dunham@arm.com InitReg(MISCREG_L2ACTLR) 372712479SCurtis.Dunham@arm.com .unimplemented() 372812479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 372912479SCurtis.Dunham@arm.com InitReg(MISCREG_CBAR) 373012479SCurtis.Dunham@arm.com .unimplemented() 373112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 373212479SCurtis.Dunham@arm.com InitReg(MISCREG_HTTBR) 373312479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 373412479SCurtis.Dunham@arm.com InitReg(MISCREG_VTTBR) 373512479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 373612479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTPCT) 373712479SCurtis.Dunham@arm.com .reads(1); 373812479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTVCT) 373912479SCurtis.Dunham@arm.com .unverifiable() 374012479SCurtis.Dunham@arm.com .reads(1); 374112479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_CVAL) 374212479SCurtis.Dunham@arm.com .banked(); 374312479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_CVAL_NS) 374412479SCurtis.Dunham@arm.com .bankedChild() 374512661Sgiacomo.travaglini@arm.com .allPrivileges() 374612661Sgiacomo.travaglini@arm.com .privSecure(!aarch32EL3) 374712661Sgiacomo.travaglini@arm.com .monSecure(0); 374812479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_CVAL_S) 374912479SCurtis.Dunham@arm.com .bankedChild() 375012479SCurtis.Dunham@arm.com .secure().user(1); 375112479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTV_CVAL) 375212479SCurtis.Dunham@arm.com .allPrivileges(); 375312479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTVOFF) 375412479SCurtis.Dunham@arm.com .hyp().monNonSecure(); 375512479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTHP_CVAL) 375612479SCurtis.Dunham@arm.com .hypWrite().monNonSecureRead(); 375712479SCurtis.Dunham@arm.com InitReg(MISCREG_CPUMERRSR) 375812479SCurtis.Dunham@arm.com .unimplemented() 375912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 376012479SCurtis.Dunham@arm.com InitReg(MISCREG_L2MERRSR) 376112479SCurtis.Dunham@arm.com .unimplemented() 376212479SCurtis.Dunham@arm.com .warnNotFail() 376312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 376412479SCurtis.Dunham@arm.com 376512479SCurtis.Dunham@arm.com // AArch64 registers (Op0=2); 376612479SCurtis.Dunham@arm.com InitReg(MISCREG_MDCCINT_EL1) 376712479SCurtis.Dunham@arm.com .allPrivileges(); 376812479SCurtis.Dunham@arm.com InitReg(MISCREG_OSDTRRX_EL1) 376912479SCurtis.Dunham@arm.com .allPrivileges() 377012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGDTRRXext); 377112479SCurtis.Dunham@arm.com InitReg(MISCREG_MDSCR_EL1) 377212479SCurtis.Dunham@arm.com .allPrivileges() 377312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGDSCRext); 377412479SCurtis.Dunham@arm.com InitReg(MISCREG_OSDTRTX_EL1) 377512479SCurtis.Dunham@arm.com .allPrivileges() 377612479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGDTRTXext); 377712479SCurtis.Dunham@arm.com InitReg(MISCREG_OSECCR_EL1) 377812479SCurtis.Dunham@arm.com .allPrivileges() 377912479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGOSECCR); 378012479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR0_EL1) 378112479SCurtis.Dunham@arm.com .allPrivileges() 378212479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBVR0 /*, MISCREG_DBGBXVR0 */); 378312479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR1_EL1) 378412479SCurtis.Dunham@arm.com .allPrivileges() 378512479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBVR1 /*, MISCREG_DBGBXVR1 */); 378612479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR2_EL1) 378712479SCurtis.Dunham@arm.com .allPrivileges() 378812479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBVR2 /*, MISCREG_DBGBXVR2 */); 378912479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR3_EL1) 379012479SCurtis.Dunham@arm.com .allPrivileges() 379112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBVR3 /*, MISCREG_DBGBXVR3 */); 379212479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR4_EL1) 379312479SCurtis.Dunham@arm.com .allPrivileges() 379412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBVR4 /*, MISCREG_DBGBXVR4 */); 379512479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBVR5_EL1) 379612479SCurtis.Dunham@arm.com .allPrivileges() 379712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBVR5 /*, MISCREG_DBGBXVR5 */); 379812479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR0_EL1) 379912479SCurtis.Dunham@arm.com .allPrivileges() 380012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBCR0); 380112479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR1_EL1) 380212479SCurtis.Dunham@arm.com .allPrivileges() 380312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBCR1); 380412479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR2_EL1) 380512479SCurtis.Dunham@arm.com .allPrivileges() 380612479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBCR2); 380712479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR3_EL1) 380812479SCurtis.Dunham@arm.com .allPrivileges() 380912479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBCR3); 381012479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR4_EL1) 381112479SCurtis.Dunham@arm.com .allPrivileges() 381212479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBCR4); 381312479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGBCR5_EL1) 381412479SCurtis.Dunham@arm.com .allPrivileges() 381512479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGBCR5); 381612479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWVR0_EL1) 381712479SCurtis.Dunham@arm.com .allPrivileges() 381812479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGWVR0); 381912479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWVR1_EL1) 382012479SCurtis.Dunham@arm.com .allPrivileges() 382112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGWVR1); 382212479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWVR2_EL1) 382312479SCurtis.Dunham@arm.com .allPrivileges() 382412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGWVR2); 382512479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWVR3_EL1) 382612479SCurtis.Dunham@arm.com .allPrivileges() 382712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGWVR3); 382812479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWCR0_EL1) 382912479SCurtis.Dunham@arm.com .allPrivileges() 383012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGWCR0); 383112479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWCR1_EL1) 383212479SCurtis.Dunham@arm.com .allPrivileges() 383312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGWCR1); 383412479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWCR2_EL1) 383512479SCurtis.Dunham@arm.com .allPrivileges() 383612479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGWCR2); 383712479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGWCR3_EL1) 383812479SCurtis.Dunham@arm.com .allPrivileges() 383912479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGWCR3); 384012479SCurtis.Dunham@arm.com InitReg(MISCREG_MDCCSR_EL0) 384112479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0) 384212479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGDSCRint); 384312479SCurtis.Dunham@arm.com InitReg(MISCREG_MDDTR_EL0) 384412479SCurtis.Dunham@arm.com .allPrivileges(); 384512479SCurtis.Dunham@arm.com InitReg(MISCREG_MDDTRTX_EL0) 384612479SCurtis.Dunham@arm.com .allPrivileges(); 384712479SCurtis.Dunham@arm.com InitReg(MISCREG_MDDTRRX_EL0) 384812479SCurtis.Dunham@arm.com .allPrivileges(); 384912479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGVCR32_EL2) 385012479SCurtis.Dunham@arm.com .allPrivileges() 385112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGVCR); 385212479SCurtis.Dunham@arm.com InitReg(MISCREG_MDRAR_EL1) 385312479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0) 385412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGDRAR); 385512479SCurtis.Dunham@arm.com InitReg(MISCREG_OSLAR_EL1) 385612479SCurtis.Dunham@arm.com .allPrivileges().monSecureRead(0).monNonSecureRead(0) 385712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGOSLAR); 385812479SCurtis.Dunham@arm.com InitReg(MISCREG_OSLSR_EL1) 385912479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0) 386012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGOSLSR); 386112479SCurtis.Dunham@arm.com InitReg(MISCREG_OSDLR_EL1) 386212479SCurtis.Dunham@arm.com .allPrivileges() 386312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGOSDLR); 386412479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGPRCR_EL1) 386512479SCurtis.Dunham@arm.com .allPrivileges() 386612479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGPRCR); 386712479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGCLAIMSET_EL1) 386812479SCurtis.Dunham@arm.com .allPrivileges() 386912479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGCLAIMSET); 387012479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGCLAIMCLR_EL1) 387112479SCurtis.Dunham@arm.com .allPrivileges() 387212479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGCLAIMCLR); 387312479SCurtis.Dunham@arm.com InitReg(MISCREG_DBGAUTHSTATUS_EL1) 387412479SCurtis.Dunham@arm.com .allPrivileges().monSecureWrite(0).monNonSecureWrite(0) 387512479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DBGAUTHSTATUS); 387612479SCurtis.Dunham@arm.com InitReg(MISCREG_TEECR32_EL1); 387712479SCurtis.Dunham@arm.com InitReg(MISCREG_TEEHBR32_EL1); 387812479SCurtis.Dunham@arm.com 387912479SCurtis.Dunham@arm.com // AArch64 registers (Op0=1,3); 388012479SCurtis.Dunham@arm.com InitReg(MISCREG_MIDR_EL1) 388112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 388212479SCurtis.Dunham@arm.com InitReg(MISCREG_MPIDR_EL1) 388312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 388412479SCurtis.Dunham@arm.com InitReg(MISCREG_REVIDR_EL1) 388512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 388612479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_PFR0_EL1) 388712690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 388812690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_PFR0); 388912479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_PFR1_EL1) 389012690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 389112690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_PFR1); 389212479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_DFR0_EL1) 389312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0) 389412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_ID_DFR0); 389512479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AFR0_EL1) 389612690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 389712690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_AFR0); 389812479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_MMFR0_EL1) 389912690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 390012690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_MMFR0); 390112479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_MMFR1_EL1) 390212690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 390312690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_MMFR1); 390412479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_MMFR2_EL1) 390512690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 390612690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_MMFR2); 390712479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_MMFR3_EL1) 390812690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 390912690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_MMFR3); 391012479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR0_EL1) 391112690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 391212690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_ISAR0); 391312479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR1_EL1) 391412690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 391512690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_ISAR1); 391612479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR2_EL1) 391712690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 391812690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_ISAR2); 391912479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR3_EL1) 392012690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 392112690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_ISAR3); 392212479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR4_EL1) 392312690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 392412690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_ISAR4); 392512479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_ISAR5_EL1) 392612690Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0) 392712690Sgiacomo.travaglini@arm.com .mapsTo(MISCREG_ID_ISAR5); 392812479SCurtis.Dunham@arm.com InitReg(MISCREG_MVFR0_EL1) 392912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 393012479SCurtis.Dunham@arm.com InitReg(MISCREG_MVFR1_EL1) 393112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 393212479SCurtis.Dunham@arm.com InitReg(MISCREG_MVFR2_EL1) 393312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 393412479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AA64PFR0_EL1) 393512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 393612479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AA64PFR1_EL1) 393712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 393812479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AA64DFR0_EL1) 393912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 394012479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AA64DFR1_EL1) 394112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 394212479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AA64AFR0_EL1) 394312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 394412479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AA64AFR1_EL1) 394512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 394612479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AA64ISAR0_EL1) 394712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 394812479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AA64ISAR1_EL1) 394912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 395012479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AA64MMFR0_EL1) 395112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 395212479SCurtis.Dunham@arm.com InitReg(MISCREG_ID_AA64MMFR1_EL1) 395312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 395413116Sgiacomo.travaglini@arm.com InitReg(MISCREG_ID_AA64MMFR2_EL1) 395513116Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode().writes(0); 395612479SCurtis.Dunham@arm.com InitReg(MISCREG_CCSIDR_EL1) 395712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 395812479SCurtis.Dunham@arm.com InitReg(MISCREG_CLIDR_EL1) 395912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 396012479SCurtis.Dunham@arm.com InitReg(MISCREG_AIDR_EL1) 396112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 396212479SCurtis.Dunham@arm.com InitReg(MISCREG_CSSELR_EL1) 396312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 396412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CSSELR_NS); 396512479SCurtis.Dunham@arm.com InitReg(MISCREG_CTR_EL0) 396612479SCurtis.Dunham@arm.com .reads(1); 396712479SCurtis.Dunham@arm.com InitReg(MISCREG_DCZID_EL0) 396812479SCurtis.Dunham@arm.com .reads(1); 396912479SCurtis.Dunham@arm.com InitReg(MISCREG_VPIDR_EL2) 397012479SCurtis.Dunham@arm.com .hyp().mon() 397112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_VPIDR); 397212479SCurtis.Dunham@arm.com InitReg(MISCREG_VMPIDR_EL2) 397312479SCurtis.Dunham@arm.com .hyp().mon() 397412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_VMPIDR); 397512479SCurtis.Dunham@arm.com InitReg(MISCREG_SCTLR_EL1) 397612479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 397713502SCurtis.Dunham@arm.com .res0( 0x20440 | (EnDB ? 0 : 0x2000) 397813502SCurtis.Dunham@arm.com | (IESB ? 0 : 0x200000) 397913502SCurtis.Dunham@arm.com | (EnDA ? 0 : 0x8000000) 398013502SCurtis.Dunham@arm.com | (EnIB ? 0 : 0x40000000) 398113502SCurtis.Dunham@arm.com | (EnIA ? 0 : 0x80000000)) 398213502SCurtis.Dunham@arm.com .res1(0x500800 | (SPAN ? 0 : 0x800000) 398313502SCurtis.Dunham@arm.com | (nTLSMD ? 0 : 0x8000000) 398413502SCurtis.Dunham@arm.com | (LSMAOE ? 0 : 0x10000000)) 398512479SCurtis.Dunham@arm.com .mapsTo(MISCREG_SCTLR_NS); 398612479SCurtis.Dunham@arm.com InitReg(MISCREG_ACTLR_EL1) 398712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 398812479SCurtis.Dunham@arm.com .mapsTo(MISCREG_ACTLR_NS); 398912479SCurtis.Dunham@arm.com InitReg(MISCREG_CPACR_EL1) 399012479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 399112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CPACR); 399212479SCurtis.Dunham@arm.com InitReg(MISCREG_SCTLR_EL2) 399312479SCurtis.Dunham@arm.com .hyp().mon() 399413502SCurtis.Dunham@arm.com .res0(0x0512c7c0 | (EnDB ? 0 : 0x2000) 399513502SCurtis.Dunham@arm.com | (IESB ? 0 : 0x200000) 399613502SCurtis.Dunham@arm.com | (EnDA ? 0 : 0x8000000) 399713502SCurtis.Dunham@arm.com | (EnIB ? 0 : 0x40000000) 399813502SCurtis.Dunham@arm.com | (EnIA ? 0 : 0x80000000)) 399913502SCurtis.Dunham@arm.com .res1(0x30c50830) 400012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HSCTLR); 400112479SCurtis.Dunham@arm.com InitReg(MISCREG_ACTLR_EL2) 400212479SCurtis.Dunham@arm.com .hyp().mon() 400312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HACTLR); 400412479SCurtis.Dunham@arm.com InitReg(MISCREG_HCR_EL2) 400512479SCurtis.Dunham@arm.com .hyp().mon() 400612479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HCR /*, MISCREG_HCR2*/); 400712479SCurtis.Dunham@arm.com InitReg(MISCREG_MDCR_EL2) 400812479SCurtis.Dunham@arm.com .hyp().mon() 400912479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HDCR); 401012479SCurtis.Dunham@arm.com InitReg(MISCREG_CPTR_EL2) 401112479SCurtis.Dunham@arm.com .hyp().mon() 401212479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HCPTR); 401312479SCurtis.Dunham@arm.com InitReg(MISCREG_HSTR_EL2) 401412479SCurtis.Dunham@arm.com .hyp().mon() 401512479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HSTR); 401612479SCurtis.Dunham@arm.com InitReg(MISCREG_HACR_EL2) 401712479SCurtis.Dunham@arm.com .hyp().mon() 401812479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HACR); 401912479SCurtis.Dunham@arm.com InitReg(MISCREG_SCTLR_EL3) 402013502SCurtis.Dunham@arm.com .mon() 402113502SCurtis.Dunham@arm.com .res0(0x0512c7c0 | (EnDB ? 0 : 0x2000) 402213502SCurtis.Dunham@arm.com | (IESB ? 0 : 0x200000) 402313502SCurtis.Dunham@arm.com | (EnDA ? 0 : 0x8000000) 402413502SCurtis.Dunham@arm.com | (EnIB ? 0 : 0x40000000) 402513502SCurtis.Dunham@arm.com | (EnIA ? 0 : 0x80000000)) 402613502SCurtis.Dunham@arm.com .res1(0x30c50830); 402712479SCurtis.Dunham@arm.com InitReg(MISCREG_ACTLR_EL3) 402812479SCurtis.Dunham@arm.com .mon(); 402912479SCurtis.Dunham@arm.com InitReg(MISCREG_SCR_EL3) 403012479SCurtis.Dunham@arm.com .mon() 403112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_SCR); // NAM D7-2005 403212479SCurtis.Dunham@arm.com InitReg(MISCREG_SDER32_EL3) 403312479SCurtis.Dunham@arm.com .mon() 403412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_SDER); 403512479SCurtis.Dunham@arm.com InitReg(MISCREG_CPTR_EL3) 403612479SCurtis.Dunham@arm.com .mon(); 403712479SCurtis.Dunham@arm.com InitReg(MISCREG_MDCR_EL3) 403812479SCurtis.Dunham@arm.com .mon(); 403912479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBR0_EL1) 404012479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 404112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_TTBR0_NS); 404212479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBR1_EL1) 404312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 404412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_TTBR1_NS); 404512479SCurtis.Dunham@arm.com InitReg(MISCREG_TCR_EL1) 404612479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 404712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_TTBCR_NS); 404812479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBR0_EL2) 404912479SCurtis.Dunham@arm.com .hyp().mon() 405012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HTTBR); 405112675Sgiacomo.travaglini@arm.com InitReg(MISCREG_TTBR1_EL2) 405212709Sgiacomo.travaglini@arm.com .hyp().mon(); 405312479SCurtis.Dunham@arm.com InitReg(MISCREG_TCR_EL2) 405412479SCurtis.Dunham@arm.com .hyp().mon() 405512479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HTCR); 405612479SCurtis.Dunham@arm.com InitReg(MISCREG_VTTBR_EL2) 405712479SCurtis.Dunham@arm.com .hyp().mon() 405812479SCurtis.Dunham@arm.com .mapsTo(MISCREG_VTTBR); 405912479SCurtis.Dunham@arm.com InitReg(MISCREG_VTCR_EL2) 406012479SCurtis.Dunham@arm.com .hyp().mon() 406112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_VTCR); 406212479SCurtis.Dunham@arm.com InitReg(MISCREG_TTBR0_EL3) 406312479SCurtis.Dunham@arm.com .mon(); 406412479SCurtis.Dunham@arm.com InitReg(MISCREG_TCR_EL3) 406512479SCurtis.Dunham@arm.com .mon(); 406612479SCurtis.Dunham@arm.com InitReg(MISCREG_DACR32_EL2) 406712479SCurtis.Dunham@arm.com .hyp().mon() 406812479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DACR_NS); 406912479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_EL1) 407012479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 407112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_SPSR_SVC); // NAM C5.2.17 SPSR_EL1 407212479SCurtis.Dunham@arm.com InitReg(MISCREG_ELR_EL1) 407312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 407412479SCurtis.Dunham@arm.com InitReg(MISCREG_SP_EL0) 407512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 407612479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSEL) 407712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 407812479SCurtis.Dunham@arm.com InitReg(MISCREG_CURRENTEL) 407912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 408014128Sgiacomo.travaglini@arm.com InitReg(MISCREG_PAN) 408114128Sgiacomo.travaglini@arm.com .allPrivileges().exceptUserMode() 408214128Sgiacomo.travaglini@arm.com .implemented(havePAN); 408312479SCurtis.Dunham@arm.com InitReg(MISCREG_NZCV) 408412479SCurtis.Dunham@arm.com .allPrivileges(); 408512479SCurtis.Dunham@arm.com InitReg(MISCREG_DAIF) 408612479SCurtis.Dunham@arm.com .allPrivileges(); 408712479SCurtis.Dunham@arm.com InitReg(MISCREG_FPCR) 408812479SCurtis.Dunham@arm.com .allPrivileges(); 408912479SCurtis.Dunham@arm.com InitReg(MISCREG_FPSR) 409012479SCurtis.Dunham@arm.com .allPrivileges(); 409112479SCurtis.Dunham@arm.com InitReg(MISCREG_DSPSR_EL0) 409212479SCurtis.Dunham@arm.com .allPrivileges(); 409312479SCurtis.Dunham@arm.com InitReg(MISCREG_DLR_EL0) 409412479SCurtis.Dunham@arm.com .allPrivileges(); 409512479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_EL2) 409612479SCurtis.Dunham@arm.com .hyp().mon() 409712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_SPSR_HYP); // NAM C5.2.18 SPSR_EL2 409812479SCurtis.Dunham@arm.com InitReg(MISCREG_ELR_EL2) 409912479SCurtis.Dunham@arm.com .hyp().mon(); 410012479SCurtis.Dunham@arm.com InitReg(MISCREG_SP_EL1) 410112479SCurtis.Dunham@arm.com .hyp().mon(); 410212479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_IRQ_AA64) 410312479SCurtis.Dunham@arm.com .hyp().mon(); 410412479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_ABT_AA64) 410512479SCurtis.Dunham@arm.com .hyp().mon(); 410612479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_UND_AA64) 410712479SCurtis.Dunham@arm.com .hyp().mon(); 410812479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_FIQ_AA64) 410912479SCurtis.Dunham@arm.com .hyp().mon(); 411012479SCurtis.Dunham@arm.com InitReg(MISCREG_SPSR_EL3) 411112479SCurtis.Dunham@arm.com .mon() 411212479SCurtis.Dunham@arm.com .mapsTo(MISCREG_SPSR_MON); // NAM C5.2.19 SPSR_EL3 411312479SCurtis.Dunham@arm.com InitReg(MISCREG_ELR_EL3) 411412479SCurtis.Dunham@arm.com .mon(); 411512479SCurtis.Dunham@arm.com InitReg(MISCREG_SP_EL2) 411612479SCurtis.Dunham@arm.com .mon(); 411712479SCurtis.Dunham@arm.com InitReg(MISCREG_AFSR0_EL1) 411812479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 411912479SCurtis.Dunham@arm.com .mapsTo(MISCREG_ADFSR_NS); 412012479SCurtis.Dunham@arm.com InitReg(MISCREG_AFSR1_EL1) 412112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 412212479SCurtis.Dunham@arm.com .mapsTo(MISCREG_AIFSR_NS); 412312479SCurtis.Dunham@arm.com InitReg(MISCREG_ESR_EL1) 412412479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 412512479SCurtis.Dunham@arm.com InitReg(MISCREG_IFSR32_EL2) 412612479SCurtis.Dunham@arm.com .hyp().mon() 412712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_IFSR_NS); 412812479SCurtis.Dunham@arm.com InitReg(MISCREG_AFSR0_EL2) 412912479SCurtis.Dunham@arm.com .hyp().mon() 413012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HADFSR); 413112479SCurtis.Dunham@arm.com InitReg(MISCREG_AFSR1_EL2) 413212479SCurtis.Dunham@arm.com .hyp().mon() 413312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HAIFSR); 413412479SCurtis.Dunham@arm.com InitReg(MISCREG_ESR_EL2) 413512479SCurtis.Dunham@arm.com .hyp().mon() 413612479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HSR); 413712479SCurtis.Dunham@arm.com InitReg(MISCREG_FPEXC32_EL2) 413812669Schuan.zhu@arm.com .hyp().mon().mapsTo(MISCREG_FPEXC); 413912479SCurtis.Dunham@arm.com InitReg(MISCREG_AFSR0_EL3) 414012479SCurtis.Dunham@arm.com .mon(); 414112479SCurtis.Dunham@arm.com InitReg(MISCREG_AFSR1_EL3) 414212479SCurtis.Dunham@arm.com .mon(); 414312479SCurtis.Dunham@arm.com InitReg(MISCREG_ESR_EL3) 414412479SCurtis.Dunham@arm.com .mon(); 414512479SCurtis.Dunham@arm.com InitReg(MISCREG_FAR_EL1) 414612479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 414712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_DFAR_NS, MISCREG_IFAR_NS); 414812479SCurtis.Dunham@arm.com InitReg(MISCREG_FAR_EL2) 414912479SCurtis.Dunham@arm.com .hyp().mon() 415012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HDFAR, MISCREG_HIFAR); 415112479SCurtis.Dunham@arm.com InitReg(MISCREG_HPFAR_EL2) 415212479SCurtis.Dunham@arm.com .hyp().mon() 415312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HPFAR); 415412479SCurtis.Dunham@arm.com InitReg(MISCREG_FAR_EL3) 415512479SCurtis.Dunham@arm.com .mon(); 415612479SCurtis.Dunham@arm.com InitReg(MISCREG_IC_IALLUIS) 415712479SCurtis.Dunham@arm.com .warnNotFail() 415812479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 415912479SCurtis.Dunham@arm.com InitReg(MISCREG_PAR_EL1) 416012479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 416112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PAR_NS); 416212479SCurtis.Dunham@arm.com InitReg(MISCREG_IC_IALLU) 416312479SCurtis.Dunham@arm.com .warnNotFail() 416412479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 416512479SCurtis.Dunham@arm.com InitReg(MISCREG_DC_IVAC_Xt) 416612479SCurtis.Dunham@arm.com .warnNotFail() 416712502Snikos.nikoleris@arm.com .writes(1).exceptUserMode(); 416812479SCurtis.Dunham@arm.com InitReg(MISCREG_DC_ISW_Xt) 416912479SCurtis.Dunham@arm.com .warnNotFail() 417012479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 417112479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S1E1R_Xt) 417212479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 417312479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S1E1W_Xt) 417412479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 417512479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S1E0R_Xt) 417612479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 417712479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S1E0W_Xt) 417812479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 417912479SCurtis.Dunham@arm.com InitReg(MISCREG_DC_CSW_Xt) 418012479SCurtis.Dunham@arm.com .warnNotFail() 418112479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 418212479SCurtis.Dunham@arm.com InitReg(MISCREG_DC_CISW_Xt) 418312479SCurtis.Dunham@arm.com .warnNotFail() 418412479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 418512479SCurtis.Dunham@arm.com InitReg(MISCREG_DC_ZVA_Xt) 418612479SCurtis.Dunham@arm.com .warnNotFail() 418712479SCurtis.Dunham@arm.com .writes(1).userSecureWrite(0); 418812479SCurtis.Dunham@arm.com InitReg(MISCREG_IC_IVAU_Xt) 418912479SCurtis.Dunham@arm.com .writes(1); 419012479SCurtis.Dunham@arm.com InitReg(MISCREG_DC_CVAC_Xt) 419112479SCurtis.Dunham@arm.com .warnNotFail() 419212479SCurtis.Dunham@arm.com .writes(1); 419312479SCurtis.Dunham@arm.com InitReg(MISCREG_DC_CVAU_Xt) 419412479SCurtis.Dunham@arm.com .warnNotFail() 419512479SCurtis.Dunham@arm.com .writes(1); 419612479SCurtis.Dunham@arm.com InitReg(MISCREG_DC_CIVAC_Xt) 419712479SCurtis.Dunham@arm.com .warnNotFail() 419812479SCurtis.Dunham@arm.com .writes(1); 419912479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S1E2R_Xt) 420012479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 420112479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S1E2W_Xt) 420212479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 420312479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S12E1R_Xt) 420412479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 420512479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S12E1W_Xt) 420612479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 420712479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S12E0R_Xt) 420812479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 420912479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S12E0W_Xt) 421012479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 421112479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S1E3R_Xt) 421212479SCurtis.Dunham@arm.com .monSecureWrite().monNonSecureWrite(); 421312479SCurtis.Dunham@arm.com InitReg(MISCREG_AT_S1E3W_Xt) 421412479SCurtis.Dunham@arm.com .monSecureWrite().monNonSecureWrite(); 421512479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VMALLE1IS) 421612479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 421712479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VAE1IS_Xt) 421812479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 421912479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_ASIDE1IS_Xt) 422012479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 422112479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VAAE1IS_Xt) 422212479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 422312479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VALE1IS_Xt) 422412479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 422512479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VAALE1IS_Xt) 422612479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 422712479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VMALLE1) 422812479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 422912479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VAE1_Xt) 423012479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 423112479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_ASIDE1_Xt) 423212479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 423312479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VAAE1_Xt) 423412479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 423512479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VALE1_Xt) 423612479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 423712479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VAALE1_Xt) 423812479SCurtis.Dunham@arm.com .writes(1).exceptUserMode(); 423912479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_IPAS2E1IS_Xt) 424012479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 424112479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_IPAS2LE1IS_Xt) 424212479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 424312479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_ALLE2IS) 424412479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 424512479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VAE2IS_Xt) 424612479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 424712479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_ALLE1IS) 424812479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 424912479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VALE2IS_Xt) 425012479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 425112479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VMALLS12E1IS) 425212479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 425312479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_IPAS2E1_Xt) 425412479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 425512479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_IPAS2LE1_Xt) 425612479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 425712479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_ALLE2) 425812479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 425912479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VAE2_Xt) 426012479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 426112479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_ALLE1) 426212479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 426312479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VALE2_Xt) 426412479SCurtis.Dunham@arm.com .monNonSecureWrite().hypWrite(); 426512479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VMALLS12E1) 426612479SCurtis.Dunham@arm.com .hypWrite().monSecureWrite().monNonSecureWrite(); 426712479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_ALLE3IS) 426812479SCurtis.Dunham@arm.com .monSecureWrite().monNonSecureWrite(); 426912479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VAE3IS_Xt) 427012479SCurtis.Dunham@arm.com .monSecureWrite().monNonSecureWrite(); 427112479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VALE3IS_Xt) 427212479SCurtis.Dunham@arm.com .monSecureWrite().monNonSecureWrite(); 427312479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_ALLE3) 427412479SCurtis.Dunham@arm.com .monSecureWrite().monNonSecureWrite(); 427512479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VAE3_Xt) 427612479SCurtis.Dunham@arm.com .monSecureWrite().monNonSecureWrite(); 427712479SCurtis.Dunham@arm.com InitReg(MISCREG_TLBI_VALE3_Xt) 427812479SCurtis.Dunham@arm.com .monSecureWrite().monNonSecureWrite(); 427912479SCurtis.Dunham@arm.com InitReg(MISCREG_PMINTENSET_EL1) 428012479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 428112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMINTENSET); 428212479SCurtis.Dunham@arm.com InitReg(MISCREG_PMINTENCLR_EL1) 428312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 428412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMINTENCLR); 428512479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCR_EL0) 428612479SCurtis.Dunham@arm.com .allPrivileges() 428712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMCR); 428812479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCNTENSET_EL0) 428912479SCurtis.Dunham@arm.com .allPrivileges() 429012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMCNTENSET); 429112479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCNTENCLR_EL0) 429212479SCurtis.Dunham@arm.com .allPrivileges() 429312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMCNTENCLR); 429412479SCurtis.Dunham@arm.com InitReg(MISCREG_PMOVSCLR_EL0) 429512479SCurtis.Dunham@arm.com .allPrivileges(); 429612479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMOVSCLR); 429712479SCurtis.Dunham@arm.com InitReg(MISCREG_PMSWINC_EL0) 429812479SCurtis.Dunham@arm.com .writes(1).user() 429912479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMSWINC); 430012479SCurtis.Dunham@arm.com InitReg(MISCREG_PMSELR_EL0) 430112479SCurtis.Dunham@arm.com .allPrivileges() 430212479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMSELR); 430312479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCEID0_EL0) 430412479SCurtis.Dunham@arm.com .reads(1).user() 430512479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMCEID0); 430612479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCEID1_EL0) 430712479SCurtis.Dunham@arm.com .reads(1).user() 430812479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMCEID1); 430912479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCCNTR_EL0) 431012479SCurtis.Dunham@arm.com .allPrivileges() 431112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMCCNTR); 431212479SCurtis.Dunham@arm.com InitReg(MISCREG_PMXEVTYPER_EL0) 431312479SCurtis.Dunham@arm.com .allPrivileges() 431412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMXEVTYPER); 431512479SCurtis.Dunham@arm.com InitReg(MISCREG_PMCCFILTR_EL0) 431612479SCurtis.Dunham@arm.com .allPrivileges(); 431712479SCurtis.Dunham@arm.com InitReg(MISCREG_PMXEVCNTR_EL0) 431812479SCurtis.Dunham@arm.com .allPrivileges() 431912479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMXEVCNTR); 432012479SCurtis.Dunham@arm.com InitReg(MISCREG_PMUSERENR_EL0) 432112479SCurtis.Dunham@arm.com .allPrivileges().userNonSecureWrite(0).userSecureWrite(0) 432212479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMUSERENR); 432312479SCurtis.Dunham@arm.com InitReg(MISCREG_PMOVSSET_EL0) 432412479SCurtis.Dunham@arm.com .allPrivileges() 432512479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PMOVSSET); 432612479SCurtis.Dunham@arm.com InitReg(MISCREG_MAIR_EL1) 432712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 432812479SCurtis.Dunham@arm.com .mapsTo(MISCREG_PRRR_NS, MISCREG_NMRR_NS); 432912479SCurtis.Dunham@arm.com InitReg(MISCREG_AMAIR_EL1) 433012479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 433112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_AMAIR0_NS, MISCREG_AMAIR1_NS); 433212479SCurtis.Dunham@arm.com InitReg(MISCREG_MAIR_EL2) 433312479SCurtis.Dunham@arm.com .hyp().mon() 433412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HMAIR0, MISCREG_HMAIR1); 433512479SCurtis.Dunham@arm.com InitReg(MISCREG_AMAIR_EL2) 433612479SCurtis.Dunham@arm.com .hyp().mon() 433712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HAMAIR0, MISCREG_HAMAIR1); 433812479SCurtis.Dunham@arm.com InitReg(MISCREG_MAIR_EL3) 433912479SCurtis.Dunham@arm.com .mon(); 434012479SCurtis.Dunham@arm.com InitReg(MISCREG_AMAIR_EL3) 434112479SCurtis.Dunham@arm.com .mon(); 434212479SCurtis.Dunham@arm.com InitReg(MISCREG_L2CTLR_EL1) 434312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 434412479SCurtis.Dunham@arm.com InitReg(MISCREG_L2ECTLR_EL1) 434512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 434612479SCurtis.Dunham@arm.com InitReg(MISCREG_VBAR_EL1) 434712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 434812479SCurtis.Dunham@arm.com .mapsTo(MISCREG_VBAR_NS); 434912479SCurtis.Dunham@arm.com InitReg(MISCREG_RVBAR_EL1) 435012479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 435112479SCurtis.Dunham@arm.com InitReg(MISCREG_ISR_EL1) 435212479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 435312479SCurtis.Dunham@arm.com InitReg(MISCREG_VBAR_EL2) 435412479SCurtis.Dunham@arm.com .hyp().mon() 435513502SCurtis.Dunham@arm.com .res0(0x7ff) 435612479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HVBAR); 435712479SCurtis.Dunham@arm.com InitReg(MISCREG_RVBAR_EL2) 435812479SCurtis.Dunham@arm.com .mon().hyp().writes(0); 435912479SCurtis.Dunham@arm.com InitReg(MISCREG_VBAR_EL3) 436012479SCurtis.Dunham@arm.com .mon(); 436112479SCurtis.Dunham@arm.com InitReg(MISCREG_RVBAR_EL3) 436212479SCurtis.Dunham@arm.com .mon().writes(0); 436312479SCurtis.Dunham@arm.com InitReg(MISCREG_RMR_EL3) 436412479SCurtis.Dunham@arm.com .mon(); 436512479SCurtis.Dunham@arm.com InitReg(MISCREG_CONTEXTIDR_EL1) 436612479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 436712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CONTEXTIDR_NS); 436812479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDR_EL1) 436912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 437012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_TPIDRPRW_NS); 437112479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDR_EL0) 437212479SCurtis.Dunham@arm.com .allPrivileges() 437312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_TPIDRURW_NS); 437412479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDRRO_EL0) 437512479SCurtis.Dunham@arm.com .allPrivileges().userNonSecureWrite(0).userSecureWrite(0) 437612479SCurtis.Dunham@arm.com .mapsTo(MISCREG_TPIDRURO_NS); 437712479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDR_EL2) 437812479SCurtis.Dunham@arm.com .hyp().mon() 437912479SCurtis.Dunham@arm.com .mapsTo(MISCREG_HTPIDR); 438012479SCurtis.Dunham@arm.com InitReg(MISCREG_TPIDR_EL3) 438112479SCurtis.Dunham@arm.com .mon(); 438212479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTKCTL_EL1) 438312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode() 438412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTKCTL); 438512479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTFRQ_EL0) 438612479SCurtis.Dunham@arm.com .reads(1).mon() 438712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTFRQ); 438812479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTPCT_EL0) 438912479SCurtis.Dunham@arm.com .reads(1) 439012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTPCT); /* 64b */ 439112479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTVCT_EL0) 439212479SCurtis.Dunham@arm.com .unverifiable() 439312479SCurtis.Dunham@arm.com .reads(1) 439412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTVCT); /* 64b */ 439512479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_TVAL_EL0) 439612479SCurtis.Dunham@arm.com .allPrivileges() 439712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTP_TVAL_NS); 439812479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_CTL_EL0) 439912479SCurtis.Dunham@arm.com .allPrivileges() 440012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTP_CTL_NS); 440112479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTP_CVAL_EL0) 440212479SCurtis.Dunham@arm.com .allPrivileges() 440312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTP_CVAL_NS); /* 64b */ 440412479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTV_TVAL_EL0) 440512479SCurtis.Dunham@arm.com .allPrivileges() 440612479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTV_TVAL); 440712479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTV_CTL_EL0) 440812479SCurtis.Dunham@arm.com .allPrivileges() 440912479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTV_CTL); 441012479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTV_CVAL_EL0) 441112479SCurtis.Dunham@arm.com .allPrivileges() 441212479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTV_CVAL); /* 64b */ 441312479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVCNTR0_EL0) 441412479SCurtis.Dunham@arm.com .allPrivileges(); 441512479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVCNTR0); 441612479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVCNTR1_EL0) 441712479SCurtis.Dunham@arm.com .allPrivileges(); 441812479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVCNTR1); 441912479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVCNTR2_EL0) 442012479SCurtis.Dunham@arm.com .allPrivileges(); 442112479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVCNTR2); 442212479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVCNTR3_EL0) 442312479SCurtis.Dunham@arm.com .allPrivileges(); 442412479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVCNTR3); 442512479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVCNTR4_EL0) 442612479SCurtis.Dunham@arm.com .allPrivileges(); 442712479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVCNTR4); 442812479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVCNTR5_EL0) 442912479SCurtis.Dunham@arm.com .allPrivileges(); 443012479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVCNTR5); 443112479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVTYPER0_EL0) 443212479SCurtis.Dunham@arm.com .allPrivileges(); 443312479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVTYPER0); 443412479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVTYPER1_EL0) 443512479SCurtis.Dunham@arm.com .allPrivileges(); 443612479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVTYPER1); 443712479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVTYPER2_EL0) 443812479SCurtis.Dunham@arm.com .allPrivileges(); 443912479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVTYPER2); 444012479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVTYPER3_EL0) 444112479SCurtis.Dunham@arm.com .allPrivileges(); 444212479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVTYPER3); 444312479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVTYPER4_EL0) 444412479SCurtis.Dunham@arm.com .allPrivileges(); 444512479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVTYPER4); 444612479SCurtis.Dunham@arm.com InitReg(MISCREG_PMEVTYPER5_EL0) 444712479SCurtis.Dunham@arm.com .allPrivileges(); 444812479SCurtis.Dunham@arm.com// .mapsTo(MISCREG_PMEVTYPER5); 444912479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTVOFF_EL2) 445012479SCurtis.Dunham@arm.com .hyp().mon() 445112479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTVOFF); /* 64b */ 445212479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTHCTL_EL2) 445312733Sandreas.sandberg@arm.com .mon().hyp() 445412479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTHCTL); 445512479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTHP_TVAL_EL2) 445612733Sandreas.sandberg@arm.com .mon().hyp() 445712479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTHP_TVAL); 445812479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTHP_CTL_EL2) 445912733Sandreas.sandberg@arm.com .mon().hyp() 446012479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTHP_CTL); 446112479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTHP_CVAL_EL2) 446212733Sandreas.sandberg@arm.com .mon().hyp() 446312479SCurtis.Dunham@arm.com .mapsTo(MISCREG_CNTHP_CVAL); /* 64b */ 446412479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTPS_TVAL_EL1) 446512733Sandreas.sandberg@arm.com .mon().privSecure(); 446612479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTPS_CTL_EL1) 446712733Sandreas.sandberg@arm.com .mon().privSecure(); 446812479SCurtis.Dunham@arm.com InitReg(MISCREG_CNTPS_CVAL_EL1) 446912733Sandreas.sandberg@arm.com .mon().privSecure(); 447012479SCurtis.Dunham@arm.com InitReg(MISCREG_IL1DATA0_EL1) 447112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 447212479SCurtis.Dunham@arm.com InitReg(MISCREG_IL1DATA1_EL1) 447312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 447412479SCurtis.Dunham@arm.com InitReg(MISCREG_IL1DATA2_EL1) 447512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 447612479SCurtis.Dunham@arm.com InitReg(MISCREG_IL1DATA3_EL1) 447712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 447812479SCurtis.Dunham@arm.com InitReg(MISCREG_DL1DATA0_EL1) 447912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 448012479SCurtis.Dunham@arm.com InitReg(MISCREG_DL1DATA1_EL1) 448112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 448212479SCurtis.Dunham@arm.com InitReg(MISCREG_DL1DATA2_EL1) 448312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 448412479SCurtis.Dunham@arm.com InitReg(MISCREG_DL1DATA3_EL1) 448512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 448612479SCurtis.Dunham@arm.com InitReg(MISCREG_DL1DATA4_EL1) 448712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 448812479SCurtis.Dunham@arm.com InitReg(MISCREG_L2ACTLR_EL1) 448912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 449012479SCurtis.Dunham@arm.com InitReg(MISCREG_CPUACTLR_EL1) 449112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 449212479SCurtis.Dunham@arm.com InitReg(MISCREG_CPUECTLR_EL1) 449312479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 449412479SCurtis.Dunham@arm.com InitReg(MISCREG_CPUMERRSR_EL1) 449512479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 449612479SCurtis.Dunham@arm.com InitReg(MISCREG_L2MERRSR_EL1) 449712479SCurtis.Dunham@arm.com .unimplemented() 449812479SCurtis.Dunham@arm.com .warnNotFail() 449912479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode(); 450012479SCurtis.Dunham@arm.com InitReg(MISCREG_CBAR_EL1) 450112479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 450212479SCurtis.Dunham@arm.com InitReg(MISCREG_CONTEXTIDR_EL2) 450312479SCurtis.Dunham@arm.com .mon().hyp(); 450413531Sjairo.balart@metempsy.com 450513531Sjairo.balart@metempsy.com // GICv3 AArch64 450613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_PMR_EL1) 450713531Sjairo.balart@metempsy.com .res0(0xffffff00) // [31:8] 450813531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 450913531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_PMR); 451013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IAR0_EL1) 451113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().writes(0) 451213531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_IAR0); 451313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_EOIR0_EL1) 451413531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0) 451513531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_EOIR0); 451613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_HPPIR0_EL1) 451713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().writes(0) 451813531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_HPPIR0); 451913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_BPR0_EL1) 452013531Sjairo.balart@metempsy.com .res0(0xfffffff8) // [31:3] 452113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 452213531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_BPR0); 452313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP0R0_EL1) 452413531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 452513531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP0R0); 452613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP0R1_EL1) 452713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 452813531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP0R1); 452913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP0R2_EL1) 453013531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 453113531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP0R2); 453213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP0R3_EL1) 453313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 453413531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP0R3); 453513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R0_EL1) 453614246Sgiacomo.travaglini@arm.com .banked64() 453713531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R0); 453813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R0_EL1_NS) 453913531Sjairo.balart@metempsy.com .bankedChild() 454013531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 454113531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R0_NS); 454213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R0_EL1_S) 454313531Sjairo.balart@metempsy.com .bankedChild() 454413531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 454513531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R0_S); 454613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R1_EL1) 454714246Sgiacomo.travaglini@arm.com .banked64() 454813531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R1); 454913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R1_EL1_NS) 455013531Sjairo.balart@metempsy.com .bankedChild() 455113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 455213531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R1_NS); 455313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R1_EL1_S) 455413531Sjairo.balart@metempsy.com .bankedChild() 455513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 455613531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R1_S); 455713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R2_EL1) 455814246Sgiacomo.travaglini@arm.com .banked64() 455913531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R2); 456013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R2_EL1_NS) 456113531Sjairo.balart@metempsy.com .bankedChild() 456213531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 456313531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R2_NS); 456413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R2_EL1_S) 456513531Sjairo.balart@metempsy.com .bankedChild() 456613531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 456713531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R2_S); 456813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R3_EL1) 456914246Sgiacomo.travaglini@arm.com .banked64() 457013531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R3); 457113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R3_EL1_NS) 457213531Sjairo.balart@metempsy.com .bankedChild() 457313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 457413531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R3_NS); 457513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R3_EL1_S) 457613531Sjairo.balart@metempsy.com .bankedChild() 457713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 457813531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_AP1R3_S); 457913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_DIR_EL1) 458013531Sjairo.balart@metempsy.com .res0(0xFF000000) // [31:24] 458113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0) 458213531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_DIR); 458313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_RPR_EL1) 458413531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().writes(0) 458513531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_RPR); 458613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SGI1R_EL1) 458713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0) 458813531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_SGI1R); 458913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_ASGI1R_EL1) 459013531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0) 459113531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_ASGI1R); 459213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SGI0R_EL1) 459313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0) 459413531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_SGI0R); 459513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IAR1_EL1) 459613531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().writes(0) 459713531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_IAR1); 459813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_EOIR1_EL1) 459913531Sjairo.balart@metempsy.com .res0(0xFF000000) // [31:24] 460013531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0) 460113531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_EOIR1); 460213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_HPPIR1_EL1) 460313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().writes(0) 460413531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_HPPIR1); 460513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_BPR1_EL1) 460614244Sgiacomo.travaglini@arm.com .banked64() 460713531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_BPR1); 460813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_BPR1_EL1_NS) 460913531Sjairo.balart@metempsy.com .bankedChild() 461013531Sjairo.balart@metempsy.com .res0(0xfffffff8) // [31:3] 461113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 461213531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_BPR1_NS); 461313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_BPR1_EL1_S) 461413531Sjairo.balart@metempsy.com .bankedChild() 461513531Sjairo.balart@metempsy.com .res0(0xfffffff8) // [31:3] 461613531Sjairo.balart@metempsy.com .secure().exceptUserMode() 461713531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_BPR1_S); 461813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_CTLR_EL1) 461914245Sgiacomo.travaglini@arm.com .banked64() 462013531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_CTLR); 462113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_CTLR_EL1_NS) 462213531Sjairo.balart@metempsy.com .bankedChild() 462313531Sjairo.balart@metempsy.com .res0(0xFFFB00BC) // [31:19, 17:16, 7, 5:2] 462413531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 462513531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_CTLR_NS); 462613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_CTLR_EL1_S) 462713531Sjairo.balart@metempsy.com .bankedChild() 462813531Sjairo.balart@metempsy.com .res0(0xFFFB00BC) // [31:19, 17:16, 7, 5:2] 462913531Sjairo.balart@metempsy.com .secure().exceptUserMode() 463013531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_CTLR_S); 463113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SRE_EL1) 463213531Sjairo.balart@metempsy.com .banked() 463313531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_SRE); 463413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SRE_EL1_NS) 463513531Sjairo.balart@metempsy.com .bankedChild() 463613531Sjairo.balart@metempsy.com .res0(0xFFFFFFF8) // [31:3] 463713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 463813531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_SRE_NS); 463913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SRE_EL1_S) 464013531Sjairo.balart@metempsy.com .bankedChild() 464113531Sjairo.balart@metempsy.com .res0(0xFFFFFFF8) // [31:3] 464213531Sjairo.balart@metempsy.com .secure().exceptUserMode() 464313531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_SRE_S); 464413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IGRPEN0_EL1) 464513531Sjairo.balart@metempsy.com .res0(0xFFFFFFFE) // [31:1] 464613531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 464713531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_IGRPEN0); 464813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IGRPEN1_EL1) 464914247Sgiacomo.travaglini@arm.com .banked64() 465013531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_IGRPEN1); 465113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IGRPEN1_EL1_NS) 465213531Sjairo.balart@metempsy.com .bankedChild() 465313531Sjairo.balart@metempsy.com .res0(0xFFFFFFFE) // [31:1] 465413531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 465513531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_IGRPEN1_NS); 465613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IGRPEN1_EL1_S) 465713531Sjairo.balart@metempsy.com .bankedChild() 465813531Sjairo.balart@metempsy.com .res0(0xFFFFFFFE) // [31:1] 465913531Sjairo.balart@metempsy.com .secure().exceptUserMode() 466013531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_IGRPEN1_S); 466113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SRE_EL2) 466213531Sjairo.balart@metempsy.com .hyp().mon() 466313531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_HSRE); 466413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_CTLR_EL3) 466513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 466613531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_MCTLR); 466713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SRE_EL3) 466813531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 466913531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_MSRE); 467013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IGRPEN1_EL3) 467113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode() 467213531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICC_MGRPEN1); 467313531Sjairo.balart@metempsy.com 467413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP0R0_EL2) 467513531Sjairo.balart@metempsy.com .hyp().mon() 467613531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_AP0R0); 467713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP0R1_EL2) 467813531Sjairo.balart@metempsy.com .hyp().mon() 467913531Sjairo.balart@metempsy.com .unimplemented() 468013531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_AP0R1); 468113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP0R2_EL2) 468213531Sjairo.balart@metempsy.com .hyp().mon() 468313531Sjairo.balart@metempsy.com .unimplemented() 468413531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_AP0R2); 468513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP0R3_EL2) 468613531Sjairo.balart@metempsy.com .hyp().mon() 468713531Sjairo.balart@metempsy.com .unimplemented() 468813531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_AP0R3); 468913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP1R0_EL2) 469013531Sjairo.balart@metempsy.com .hyp().mon() 469113531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_AP1R0); 469213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP1R1_EL2) 469313531Sjairo.balart@metempsy.com .hyp().mon() 469413531Sjairo.balart@metempsy.com .unimplemented() 469513531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_AP1R1); 469613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP1R2_EL2) 469713531Sjairo.balart@metempsy.com .hyp().mon() 469813531Sjairo.balart@metempsy.com .unimplemented() 469913531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_AP1R2); 470013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP1R3_EL2) 470113531Sjairo.balart@metempsy.com .hyp().mon() 470213531Sjairo.balart@metempsy.com .unimplemented() 470313531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_AP1R3); 470413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_HCR_EL2) 470513531Sjairo.balart@metempsy.com .hyp().mon() 470613531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_HCR); 470713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_VTR_EL2) 470813531Sjairo.balart@metempsy.com .hyp().mon().writes(0) 470913531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_VTR); 471013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_MISR_EL2) 471113531Sjairo.balart@metempsy.com .hyp().mon().writes(0) 471213531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_MISR); 471313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_EISR_EL2) 471413531Sjairo.balart@metempsy.com .hyp().mon().writes(0) 471513531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_EISR); 471613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_ELRSR_EL2) 471713531Sjairo.balart@metempsy.com .hyp().mon().writes(0) 471813531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_ELRSR); 471913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_VMCR_EL2) 472013531Sjairo.balart@metempsy.com .hyp().mon() 472113531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_VMCR); 472213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR0_EL2) 472313531Sjairo.balart@metempsy.com .hyp().mon() 472413531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 472513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR1_EL2) 472613531Sjairo.balart@metempsy.com .hyp().mon() 472713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 472813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR2_EL2) 472913531Sjairo.balart@metempsy.com .hyp().mon() 473013531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 473113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR3_EL2) 473213531Sjairo.balart@metempsy.com .hyp().mon() 473313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 473413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR4_EL2) 473513531Sjairo.balart@metempsy.com .hyp().mon() 473613531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 473713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR5_EL2) 473813531Sjairo.balart@metempsy.com .hyp().mon() 473913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 474013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR6_EL2) 474113531Sjairo.balart@metempsy.com .hyp().mon() 474213531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 474313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR7_EL2) 474413531Sjairo.balart@metempsy.com .hyp().mon() 474513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 474613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR8_EL2) 474713531Sjairo.balart@metempsy.com .hyp().mon() 474813531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 474913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR9_EL2) 475013531Sjairo.balart@metempsy.com .hyp().mon() 475113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 475213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR10_EL2) 475313531Sjairo.balart@metempsy.com .hyp().mon() 475413531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 475513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR11_EL2) 475613531Sjairo.balart@metempsy.com .hyp().mon() 475713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 475813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR12_EL2) 475913531Sjairo.balart@metempsy.com .hyp().mon() 476013531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 476113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR13_EL2) 476213531Sjairo.balart@metempsy.com .hyp().mon() 476313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 476413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR14_EL2) 476513531Sjairo.balart@metempsy.com .hyp().mon() 476613531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 476713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR15_EL2) 476813531Sjairo.balart@metempsy.com .hyp().mon() 476913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 477013531Sjairo.balart@metempsy.com 477113531Sjairo.balart@metempsy.com // GICv3 AArch32 477213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP0R0) 477313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 477413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP0R1) 477513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 477613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP0R2) 477713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 477813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP0R3) 477913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 478013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R0) 478113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 478213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R0_NS) 478313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 478413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R0_S) 478513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 478613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R1) 478713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 478813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R1_NS) 478913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 479013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R1_S) 479113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 479213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R2) 479313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 479413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R2_NS) 479513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 479613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R2_S) 479713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 479813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R3) 479913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 480013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R3_NS) 480113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 480213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_AP1R3_S) 480313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 480413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_ASGI1R) 480513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0); 480613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_BPR0) 480713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 480813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_BPR1) 480913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 481013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_BPR1_NS) 481113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 481213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_BPR1_S) 481313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 481413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_CTLR) 481513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 481613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_CTLR_NS) 481713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 481813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_CTLR_S) 481913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 482013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_DIR) 482113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0); 482213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_EOIR0) 482313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0); 482413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_EOIR1) 482513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0); 482613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_HPPIR0) 482713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().writes(0); 482813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_HPPIR1) 482913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().writes(0); 483013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_HSRE) 483113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 483213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IAR0) 483313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().writes(0); 483413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IAR1) 483513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().writes(0); 483613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IGRPEN0) 483713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 483813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IGRPEN1) 483913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 484013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IGRPEN1_NS) 484113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 484213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_IGRPEN1_S) 484313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 484413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_MCTLR) 484513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 484613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_MGRPEN1) 484713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 484813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_MSRE) 484913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 485013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_PMR) 485113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 485213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_RPR) 485313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().writes(0); 485413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SGI0R) 485513531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0); 485613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SGI1R) 485713531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode().reads(0); 485813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SRE) 485913531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 486013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SRE_NS) 486113531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 486213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICC_SRE_S) 486313531Sjairo.balart@metempsy.com .allPrivileges().exceptUserMode(); 486413531Sjairo.balart@metempsy.com 486513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP0R0) 486613531Sjairo.balart@metempsy.com .hyp().mon(); 486713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP0R1) 486813531Sjairo.balart@metempsy.com .hyp().mon(); 486913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP0R2) 487013531Sjairo.balart@metempsy.com .hyp().mon(); 487113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP0R3) 487213531Sjairo.balart@metempsy.com .hyp().mon(); 487313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP1R0) 487413531Sjairo.balart@metempsy.com .hyp().mon(); 487513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP1R1) 487613531Sjairo.balart@metempsy.com .hyp().mon(); 487713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP1R2) 487813531Sjairo.balart@metempsy.com .hyp().mon(); 487913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_AP1R3) 488013531Sjairo.balart@metempsy.com .hyp().mon(); 488113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_HCR) 488213531Sjairo.balart@metempsy.com .hyp().mon(); 488313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_VTR) 488413531Sjairo.balart@metempsy.com .hyp().mon().writes(0); 488513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_MISR) 488613531Sjairo.balart@metempsy.com .hyp().mon().writes(0); 488713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_EISR) 488813531Sjairo.balart@metempsy.com .hyp().mon().writes(0); 488913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_ELRSR) 489013531Sjairo.balart@metempsy.com .hyp().mon().writes(0); 489113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_VMCR) 489213531Sjairo.balart@metempsy.com .hyp().mon(); 489313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR0) 489413531Sjairo.balart@metempsy.com .hyp().mon(); 489513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR1) 489613531Sjairo.balart@metempsy.com .hyp().mon(); 489713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR2) 489813531Sjairo.balart@metempsy.com .hyp().mon(); 489913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR3) 490013531Sjairo.balart@metempsy.com .hyp().mon(); 490113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR4) 490213531Sjairo.balart@metempsy.com .hyp().mon(); 490313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR5) 490413531Sjairo.balart@metempsy.com .hyp().mon(); 490513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR6) 490613531Sjairo.balart@metempsy.com .hyp().mon(); 490713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR7) 490813531Sjairo.balart@metempsy.com .hyp().mon(); 490913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR8) 491013531Sjairo.balart@metempsy.com .hyp().mon(); 491113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR9) 491213531Sjairo.balart@metempsy.com .hyp().mon(); 491313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR10) 491413531Sjairo.balart@metempsy.com .hyp().mon(); 491513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR11) 491613531Sjairo.balart@metempsy.com .hyp().mon(); 491713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR12) 491813531Sjairo.balart@metempsy.com .hyp().mon(); 491913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR13) 492013531Sjairo.balart@metempsy.com .hyp().mon(); 492113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR14) 492213531Sjairo.balart@metempsy.com .hyp().mon(); 492313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LR15) 492413531Sjairo.balart@metempsy.com .hyp().mon(); 492513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC0) 492613531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR0) 492713531Sjairo.balart@metempsy.com .hyp().mon(); 492813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC1) 492913531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR1) 493013531Sjairo.balart@metempsy.com .hyp().mon(); 493113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC2) 493213531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR2) 493313531Sjairo.balart@metempsy.com .hyp().mon(); 493413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC3) 493513531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR3) 493613531Sjairo.balart@metempsy.com .hyp().mon(); 493713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC4) 493813531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR4) 493913531Sjairo.balart@metempsy.com .hyp().mon(); 494013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC5) 494113531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR5) 494213531Sjairo.balart@metempsy.com .hyp().mon(); 494313531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC6) 494413531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR6) 494513531Sjairo.balart@metempsy.com .hyp().mon(); 494613531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC7) 494713531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR7) 494813531Sjairo.balart@metempsy.com .hyp().mon(); 494913531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC8) 495013531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR8) 495113531Sjairo.balart@metempsy.com .hyp().mon(); 495213531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC9) 495313531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR9) 495413531Sjairo.balart@metempsy.com .hyp().mon(); 495513531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC10) 495613531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR10) 495713531Sjairo.balart@metempsy.com .hyp().mon(); 495813531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC11) 495913531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR11) 496013531Sjairo.balart@metempsy.com .hyp().mon(); 496113531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC12) 496213531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR12) 496313531Sjairo.balart@metempsy.com .hyp().mon(); 496413531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC13) 496513531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR13) 496613531Sjairo.balart@metempsy.com .hyp().mon(); 496713531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC14) 496813531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR14) 496913531Sjairo.balart@metempsy.com .hyp().mon(); 497013531Sjairo.balart@metempsy.com InitReg(MISCREG_ICH_LRC15) 497113531Sjairo.balart@metempsy.com .mapsTo(MISCREG_ICH_LR15) 497213531Sjairo.balart@metempsy.com .hyp().mon(); 497313531Sjairo.balart@metempsy.com 497412816Sgiacomo.travaglini@arm.com InitReg(MISCREG_CNTHV_CTL_EL2) 497512816Sgiacomo.travaglini@arm.com .mon().hyp(); 497612816Sgiacomo.travaglini@arm.com InitReg(MISCREG_CNTHV_CVAL_EL2) 497712816Sgiacomo.travaglini@arm.com .mon().hyp(); 497812816Sgiacomo.travaglini@arm.com InitReg(MISCREG_CNTHV_TVAL_EL2) 497912816Sgiacomo.travaglini@arm.com .mon().hyp(); 498012479SCurtis.Dunham@arm.com 498113759Sgiacomo.gabrielli@arm.com // SVE 498213759Sgiacomo.gabrielli@arm.com InitReg(MISCREG_ID_AA64ZFR0_EL1) 498313759Sgiacomo.gabrielli@arm.com .allPrivileges().exceptUserMode().writes(0); 498413759Sgiacomo.gabrielli@arm.com InitReg(MISCREG_ZCR_EL3) 498513759Sgiacomo.gabrielli@arm.com .mon(); 498613759Sgiacomo.gabrielli@arm.com InitReg(MISCREG_ZCR_EL2) 498713759Sgiacomo.gabrielli@arm.com .hyp().mon(); 498813759Sgiacomo.gabrielli@arm.com InitReg(MISCREG_ZCR_EL12) 498913759Sgiacomo.gabrielli@arm.com .unimplemented().warnNotFail(); 499013759Sgiacomo.gabrielli@arm.com InitReg(MISCREG_ZCR_EL1) 499113759Sgiacomo.gabrielli@arm.com .allPrivileges().exceptUserMode(); 499213759Sgiacomo.gabrielli@arm.com 499312479SCurtis.Dunham@arm.com // Dummy registers 499412479SCurtis.Dunham@arm.com InitReg(MISCREG_NOP) 499512479SCurtis.Dunham@arm.com .allPrivileges(); 499612479SCurtis.Dunham@arm.com InitReg(MISCREG_RAZ) 499712479SCurtis.Dunham@arm.com .allPrivileges().exceptUserMode().writes(0); 499812479SCurtis.Dunham@arm.com InitReg(MISCREG_CP14_UNIMPL) 499912479SCurtis.Dunham@arm.com .unimplemented() 500012479SCurtis.Dunham@arm.com .warnNotFail(); 500112479SCurtis.Dunham@arm.com InitReg(MISCREG_CP15_UNIMPL) 500212479SCurtis.Dunham@arm.com .unimplemented() 500312479SCurtis.Dunham@arm.com .warnNotFail(); 500412479SCurtis.Dunham@arm.com InitReg(MISCREG_UNKNOWN); 500512714Sgiacomo.travaglini@arm.com InitReg(MISCREG_IMPDEF_UNIMPL) 500612714Sgiacomo.travaglini@arm.com .unimplemented() 500712714Sgiacomo.travaglini@arm.com .warnNotFail(impdefAsNop); 500812479SCurtis.Dunham@arm.com 500912815Sgiacomo.travaglini@arm.com // RAS extension (unimplemented) 501012815Sgiacomo.travaglini@arm.com InitReg(MISCREG_ERRIDR_EL1) 501112815Sgiacomo.travaglini@arm.com .unimplemented() 501212815Sgiacomo.travaglini@arm.com .warnNotFail(); 501312815Sgiacomo.travaglini@arm.com InitReg(MISCREG_ERRSELR_EL1) 501412815Sgiacomo.travaglini@arm.com .unimplemented() 501512815Sgiacomo.travaglini@arm.com .warnNotFail(); 501612815Sgiacomo.travaglini@arm.com InitReg(MISCREG_ERXFR_EL1) 501712815Sgiacomo.travaglini@arm.com .unimplemented() 501812815Sgiacomo.travaglini@arm.com .warnNotFail(); 501912815Sgiacomo.travaglini@arm.com InitReg(MISCREG_ERXCTLR_EL1) 502012815Sgiacomo.travaglini@arm.com .unimplemented() 502112815Sgiacomo.travaglini@arm.com .warnNotFail(); 502212815Sgiacomo.travaglini@arm.com InitReg(MISCREG_ERXSTATUS_EL1) 502312815Sgiacomo.travaglini@arm.com .unimplemented() 502412815Sgiacomo.travaglini@arm.com .warnNotFail(); 502512815Sgiacomo.travaglini@arm.com InitReg(MISCREG_ERXADDR_EL1) 502612815Sgiacomo.travaglini@arm.com .unimplemented() 502712815Sgiacomo.travaglini@arm.com .warnNotFail(); 502812815Sgiacomo.travaglini@arm.com InitReg(MISCREG_ERXMISC0_EL1) 502912815Sgiacomo.travaglini@arm.com .unimplemented() 503012815Sgiacomo.travaglini@arm.com .warnNotFail(); 503112815Sgiacomo.travaglini@arm.com InitReg(MISCREG_ERXMISC1_EL1) 503212815Sgiacomo.travaglini@arm.com .unimplemented() 503312815Sgiacomo.travaglini@arm.com .warnNotFail(); 503412815Sgiacomo.travaglini@arm.com InitReg(MISCREG_DISR_EL1) 503512815Sgiacomo.travaglini@arm.com .unimplemented() 503612815Sgiacomo.travaglini@arm.com .warnNotFail(); 503712815Sgiacomo.travaglini@arm.com InitReg(MISCREG_VSESR_EL2) 503812815Sgiacomo.travaglini@arm.com .unimplemented() 503912815Sgiacomo.travaglini@arm.com .warnNotFail(); 504012815Sgiacomo.travaglini@arm.com InitReg(MISCREG_VDISR_EL2) 504112815Sgiacomo.travaglini@arm.com .unimplemented() 504212815Sgiacomo.travaglini@arm.com .warnNotFail(); 504312815Sgiacomo.travaglini@arm.com 504412479SCurtis.Dunham@arm.com // Register mappings for some unimplemented registers: 504512479SCurtis.Dunham@arm.com // ESR_EL1 -> DFSR 504612479SCurtis.Dunham@arm.com // RMR_EL1 -> RMR 504712479SCurtis.Dunham@arm.com // RMR_EL2 -> HRMR 504812479SCurtis.Dunham@arm.com // DBGDTR_EL0 -> DBGDTR{R or T}Xint 504912479SCurtis.Dunham@arm.com // DBGDTRRX_EL0 -> DBGDTRRXint 505012479SCurtis.Dunham@arm.com // DBGDTRTX_EL0 -> DBGDTRRXint 505112479SCurtis.Dunham@arm.com // MDCR_EL3 -> SDCR, NAM D7-2108 (the latter is unimpl. in gem5) 505212479SCurtis.Dunham@arm.com 505312479SCurtis.Dunham@arm.com completed = true; 505412479SCurtis.Dunham@arm.com} 505512479SCurtis.Dunham@arm.com 505610037SARM gem5 Developers} // namespace ArmISA 5057