/gem5/tests/test-progs/insttest/src/riscv/ |
H A D | rv64c.h | 39 #define CROP(op, rd, rs) asm volatile(op " %0,%1" : "+r" (rd) : "r" (rs)) 111 c_mv(int64_t rs) argument 114 CROP("c.mv", rd, rs); 119 c_add(int64_t rd, int64_t rs) argument 121 CROP("c.add", rd, rs); 126 c_and(int64_t rd, int64_t rs) argument 128 CROP("c.and", rd, rs); 133 c_or(int64_t rd, int64_t rs) argument 135 CROP("c.or", rd, rs); 140 c_xor(int64_t rd, int64_t rs) argument 147 c_sub(int64_t rd, int64_t rs) argument 154 c_addw(int64_t rd, int64_t rs) argument 161 c_subw(int64_t rd, int64_t rs) argument 187 c_store(const M& rs) argument [all...] |
/gem5/src/mem/ruby/structures/ |
H A D | BankedArray.hh | 67 unsigned int startIndexBit, RubySystem *rs);
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H A D | BankedArray.cc | 38 unsigned int startIndexBit, RubySystem *rs) 39 : m_ruby_system(rs) 37 BankedArray(unsigned int banks, Cycles accessLatency, unsigned int startIndexBit, RubySystem *rs) argument
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/gem5/src/arch/power/insts/ |
H A D | integer.hh | 168 rotateValue(uint32_t rs, uint32_t shift) const argument 171 return (rs << n) | (rs >> (32 - n));
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/gem5/src/arch/power/ |
H A D | types.hh | 46 Bitfield<25, 21> rs; member in namespace:PowerISA
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/gem5/src/mem/ruby/system/ |
H A D | RubyPort.cc | 265 RubySystem *rs = ruby_port->m_ruby_system; local 267 curTick() + rs->clockPeriod()); 339 RubySystem *rs = ruby_port->m_ruby_system; local 341 rs->m_abstract_controls[id.getType()][id.getNum()]; 366 RubySystem *rs = rp->m_ruby_system; local 385 rs->getPhysMem()->functionalAccess(pkt); 392 accessSucceeded = rs->functionalRead(pkt); 394 accessSucceeded = rs->functionalWrite(pkt); 544 RubySystem *rs = ruby_port->m_ruby_system; local 546 rs [all...] |
H A D | Sequencer.cc | 509 RubySystem *rs = m_ruby_system; local 513 rs->m_cache_recorder->enqueueNextFetchRequest(); 516 rs->m_cache_recorder->enqueueNextFlushRequest();
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/gem5/src/arch/arm/insts/ |
H A D | pred_inst.cc | 58 (IntRegIndex)(uint32_t)machInst.rs, 72 (IntRegIndex)(uint32_t)machInst.rs,
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H A D | static_inst.hh | 181 IntRegIndex rs, ArmShiftType type) const; 190 IntRegIndex rs, uint32_t shiftAmt, ArmShiftType type,
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H A D | static_inst.cc | 497 IntRegIndex rs, 552 printIntReg(os, rs); 591 IntRegIndex rm, IntRegIndex rs, uint32_t shiftAmt, 616 printShiftOperand(os, rm, immShift, shiftAmt, rs, type);
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/gem5/src/mem/ruby/network/simple/ |
H A D | Throttle.cc | 51 Throttle::Throttle(int sID, RubySystem *rs, NodeID node, Cycles link_latency, argument 55 m_ruby_system(rs)
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H A D | Switch.cc | 81 RubySystem *rs = m_network_ptr->params()->ruby_system; local 82 Throttle* throttle_ptr = new Throttle(m_id, rs, m_throttles.size(),
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H A D | Throttle.hh | 55 Throttle(int sID, RubySystem *rs, NodeID node, Cycles link_latency,
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/gem5/src/dev/ |
H A D | mc146818.hh | 130 Bitfield<3, 0> rs; member in class:MC146818
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H A D | mc146818.cc | 102 stat_regA.rs = RTCA_RS_1024HZ; 167 if (stat_regA.rs != RTCA_RS_1024HZ) { 169 stat_regA.rs);
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/gem5/src/mem/ruby/profiler/ |
H A D | Profiler.hh | 67 Profiler(const RubySystemParams *params, RubySystem *rs);
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H A D | Profiler.cc | 83 Profiler::Profiler(const RubySystemParams *p, RubySystem *rs) argument 84 : m_ruby_system(rs), m_hot_lines(p->hot_lines),
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/gem5/src/mem/ruby/network/garnet2.0/ |
H A D | GarnetNetwork.cc | 401 RubySystem *rs = params()->ruby_system; 402 double time_delta = double(curCycle() - rs->getStartCycle());
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/gem5/src/arch/arm/ |
H A D | types.hh | 130 Bitfield<11, 8> rs; member in namespace:ArmISA
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H A D | miscregs_types.hh | 351 Bitfield<9, 8> rs; // Deprecated protection bits (dropped in ARMv7) member in namespace:ArmISA
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H A D | tlb.cc | 707 DPRINTF(TLB, "Access permissions 0, checking rs:%#x\n", 708 (int)sctlr.rs); 710 switch ((int)sctlr.rs) {
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/gem5/src/dev/arm/ |
H A D | gic_v3_cpu_interface.cc | 1776 uint8_t rs = bits(val, 47, 44); local 1801 if (!(aff0_i >= rs * 16 && aff0_i < (rs + 1) * 16 && 1802 ((0x1 << (aff0_i - rs * 16)) & target_list))) {
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/gem5/src/base/ |
H A D | statistics.hh | 2425 size_type rs = r->size(); 2427 return rs; 2428 } else if (rs == 1) { 2431 assert(ls == rs && "Node vector sizes are not equal");
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/gem5/src/dev/net/ |
H A D | i8254xGBe_defs.hh | 251 inline bool rs(TxDesc *d) { return bits(d->d2, 27,27); } function in namespace:iGbReg::TxdOp
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H A D | i8254xGBe.cc | 1835 if (TxdOp::rs(desc))
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