1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 *          Andrew Schultz
30 *          Miguel Serrano
31 */
32
33#ifndef __DEV_MC146818_HH__
34#define __DEV_MC146818_HH__
35
36#include "base/bitunion.hh"
37#include "base/logging.hh"
38#include "sim/eventq_impl.hh"
39
40/** Real-Time Clock (MC146818) */
41class MC146818 : public EventManager
42{
43  protected:
44    virtual void handleEvent()
45    {
46        warn("No RTC event handler defined.\n");
47    }
48
49  private:
50    /** Event for RTC periodic interrupt */
51    struct RTCEvent : public Event
52    {
53        MC146818 * parent;
54        Tick interval;
55        Tick offset;
56
57        RTCEvent(MC146818 * _parent, Tick i);
58
59        /** Schedule the RTC periodic interrupt */
60        void scheduleIntr();
61
62        /** Event process to occur at interrupt*/
63        virtual void process();
64
65        /** Event description */
66        virtual const char *description() const;
67    };
68
69    /** Event for RTC periodic interrupt */
70    struct RTCTickEvent : public Event
71    {
72        MC146818 * parent;
73        Tick offset;
74
75        RTCTickEvent(MC146818 * _parent) :
76            parent(_parent), offset(SimClock::Int::s)
77        {}
78
79        /** Event process to occur at interrupt*/
80        void process();
81
82        /** Event description */
83        const char *description() const;
84    };
85
86  private:
87    std::string _name;
88    const std::string &name() const { return _name; }
89
90    /** RTC periodic interrupt event */
91    RTCEvent event;
92
93    /** RTC tick event */
94    RTCTickEvent tickEvent;
95
96    /** Data for real-time clock function */
97    union {
98        uint8_t clock_data[10];
99
100        struct {
101            uint8_t sec;
102            uint8_t sec_alrm;
103            uint8_t min;
104            uint8_t min_alrm;
105            uint8_t hour;
106            uint8_t hour_alrm;
107            uint8_t wday;
108            uint8_t mday;
109            uint8_t mon;
110            uint8_t year;
111        };
112    };
113
114    struct tm curTime;
115
116    void setTime(const struct tm time);
117
118    BitUnion8(RtcRegA)
119        Bitfield<7> uip;    /// 1 = date and time update in progress
120        Bitfield<6, 4> dv;  /// Divider configuration
121        /** Rate selection
122            0 = Disabled
123            For 32768 Hz time bases:
124              Freq = 32768Hz / 2**(n-1) for n >= 3
125              Freq = 256Hz if n = 1
126              Freq = 128Hz if n = 2
127            Othwerise:
128              Freq = 32768Hz / 2**(n-1)
129        */
130        Bitfield<3, 0> rs;
131    EndBitUnion(RtcRegA)
132
133    /// Is the DV field in regA set to disabled?
134    static inline bool rega_dv_disabled(const RtcRegA &reg);
135
136    BitUnion8(RtcRegB)
137        Bitfield<7> set;       /// stop clock updates
138        Bitfield<6> pie;       /// 1 = enable periodic clock interrupt
139        Bitfield<5> aie;       /// 1 = enable alarm interrupt
140        Bitfield<4> uie;       /// 1 = enable update-ended interrupt
141        Bitfield<3> sqwe;      /// 1 = output sqare wave at SQW pin
142        Bitfield<2> dm;        /// 0 = BCD, 1 = Binary coded time
143        Bitfield<1> format24h; /// 0 = 12 hours, 1 = 24 hours
144        Bitfield<0> dse;       /// USA Daylight Savings Time enable
145    EndBitUnion(RtcRegB)
146
147    /** RTC status register A */
148    RtcRegA stat_regA;
149
150    /** RTC status register B */
151    RtcRegB stat_regB;
152
153  public:
154    MC146818(EventManager *em, const std::string &name, const struct tm time,
155            bool bcd, Tick frequency);
156    virtual ~MC146818();
157
158    /** Start ticking */
159    virtual void startup();
160
161    /** RTC write data */
162    void writeData(const uint8_t addr, const uint8_t data);
163
164    /** RTC read data */
165    uint8_t readData(const uint8_t addr);
166
167    void tickClock();
168
169    /**
170      * Serialize this object to the given output stream.
171      * @param base The base name of the counter object.
172      * @param os The stream to serialize to.
173      */
174    void serialize(const std::string &base, CheckpointOut &cp) const;
175
176    /**
177     * Reconstruct the state of this object from a checkpoint.
178     * @param base The base name of the counter object.
179     * @param cp The checkpoint use.
180     * @param section The section name of this object
181     */
182    void unserialize(const std::string &base, CheckpointIn &cp);
183};
184
185#endif // __DEV_MC146818_HH__
186