src/riscv/rv64c.h

39 #define CROP(op, rd, rs) asm volatile(op " %0,%1" : "+r" (rd) : "r" (rs))
111 c_mv(int64_t rs)
114     CROP("c.mv", rd, rs);
119 c_add(int64_t rd, int64_t rs)
121     CROP("c.add", rd, rs);
126 c_and(int64_t rd, int64_t rs)
128     CROP("c.and", rd, rs);
133 c_or(int64_t rd, int64_t rs)
135     CROP("c.or", rd, rs);
140 c_xor(int64_t rd, int64_t rs)
142     CROP("c.xor", rd, rs);
147 c_sub(int64_t rd, int64_t rs)
149     CROP("c.sub", rd, rs);
154 c_addw(int64_t rd, int64_t rs)
156     CROP("c.addw", rd, rs);
161 c_subw(int64_t rd, int64_t rs)
163     CROP("c.subw", rd, rs);
187 c_store(const M& rs)
193         asm volatile("c.sw %0,0(%1)" : : "r" (rs), "r" (&mem) : "memory");
197             asm volatile("c.fsd %0,0(%1)" : : "f" (rs), "r" (&mem) : "memory");
199             asm volatile("c.sd %0,0(%1)" : : "r" (rs), "r" (&mem) : "memory");