16691Stjones1@inf.ed.ac.uk/* 26691Stjones1@inf.ed.ac.uk * Copyright (c) 2009 The University of Edinburgh 36691Stjones1@inf.ed.ac.uk * All rights reserved. 46691Stjones1@inf.ed.ac.uk * 56691Stjones1@inf.ed.ac.uk * Redistribution and use in source and binary forms, with or without 66691Stjones1@inf.ed.ac.uk * modification, are permitted provided that the following conditions are 76691Stjones1@inf.ed.ac.uk * met: redistributions of source code must retain the above copyright 86691Stjones1@inf.ed.ac.uk * notice, this list of conditions and the following disclaimer; 96691Stjones1@inf.ed.ac.uk * redistributions in binary form must reproduce the above copyright 106691Stjones1@inf.ed.ac.uk * notice, this list of conditions and the following disclaimer in the 116691Stjones1@inf.ed.ac.uk * documentation and/or other materials provided with the distribution; 126691Stjones1@inf.ed.ac.uk * neither the name of the copyright holders nor the names of its 136691Stjones1@inf.ed.ac.uk * contributors may be used to endorse or promote products derived from 146691Stjones1@inf.ed.ac.uk * this software without specific prior written permission. 156691Stjones1@inf.ed.ac.uk * 166691Stjones1@inf.ed.ac.uk * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176691Stjones1@inf.ed.ac.uk * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186691Stjones1@inf.ed.ac.uk * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196691Stjones1@inf.ed.ac.uk * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206691Stjones1@inf.ed.ac.uk * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216691Stjones1@inf.ed.ac.uk * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226691Stjones1@inf.ed.ac.uk * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236691Stjones1@inf.ed.ac.uk * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246691Stjones1@inf.ed.ac.uk * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256691Stjones1@inf.ed.ac.uk * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266691Stjones1@inf.ed.ac.uk * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276691Stjones1@inf.ed.ac.uk * 286691Stjones1@inf.ed.ac.uk * Authors: Timothy M. Jones 296691Stjones1@inf.ed.ac.uk */ 306691Stjones1@inf.ed.ac.uk 316691Stjones1@inf.ed.ac.uk#ifndef __ARCH_POWER_TYPES_HH__ 326691Stjones1@inf.ed.ac.uk#define __ARCH_POWER_TYPES_HH__ 336691Stjones1@inf.ed.ac.uk 347720Sgblack@eecs.umich.edu#include "arch/generic/types.hh" 356691Stjones1@inf.ed.ac.uk#include "base/bitunion.hh" 366691Stjones1@inf.ed.ac.uk#include "base/types.hh" 376691Stjones1@inf.ed.ac.uk 386691Stjones1@inf.ed.ac.uknamespace PowerISA 396691Stjones1@inf.ed.ac.uk{ 406691Stjones1@inf.ed.ac.uk 416691Stjones1@inf.ed.ac.uktypedef uint32_t MachInst; 426691Stjones1@inf.ed.ac.uk 436691Stjones1@inf.ed.ac.ukBitUnion32(ExtMachInst) 446691Stjones1@inf.ed.ac.uk 456691Stjones1@inf.ed.ac.uk // Registers 466691Stjones1@inf.ed.ac.uk Bitfield<25, 21> rs; 476691Stjones1@inf.ed.ac.uk Bitfield<20, 16> ra; 486691Stjones1@inf.ed.ac.uk 496691Stjones1@inf.ed.ac.uk // Shifts and masks 506691Stjones1@inf.ed.ac.uk Bitfield<15, 11> sh; 516691Stjones1@inf.ed.ac.uk Bitfield<10, 6> mb; 526691Stjones1@inf.ed.ac.uk Bitfield< 5, 1> me; 536691Stjones1@inf.ed.ac.uk 546691Stjones1@inf.ed.ac.uk // Immediate fields 556691Stjones1@inf.ed.ac.uk Bitfield<15, 0> si; 566691Stjones1@inf.ed.ac.uk Bitfield<15, 0> d; 576691Stjones1@inf.ed.ac.uk 586691Stjones1@inf.ed.ac.uk // Special purpose register identifier 596691Stjones1@inf.ed.ac.uk Bitfield<20, 11> spr; 606691Stjones1@inf.ed.ac.uk Bitfield<25, 2> li; 616691Stjones1@inf.ed.ac.uk Bitfield<1> aa; 626691Stjones1@inf.ed.ac.uk Bitfield<25, 23> bf; 636691Stjones1@inf.ed.ac.uk Bitfield<15, 2> bd; 646691Stjones1@inf.ed.ac.uk Bitfield<25, 21> bo; 656691Stjones1@inf.ed.ac.uk Bitfield<20, 16> bi; 666691Stjones1@inf.ed.ac.uk Bitfield<20, 18> bfa; 676691Stjones1@inf.ed.ac.uk 686691Stjones1@inf.ed.ac.uk // Record bits 696691Stjones1@inf.ed.ac.uk Bitfield<0> rc31; 706691Stjones1@inf.ed.ac.uk Bitfield<10> oe; 716691Stjones1@inf.ed.ac.uk 726691Stjones1@inf.ed.ac.uk // Condition register fields 736691Stjones1@inf.ed.ac.uk Bitfield<25, 21> bt; 746691Stjones1@inf.ed.ac.uk Bitfield<20, 16> ba; 756691Stjones1@inf.ed.ac.uk Bitfield<15, 11> bb; 766691Stjones1@inf.ed.ac.uk 776691Stjones1@inf.ed.ac.uk // FXM field for mtcrf instruction 786691Stjones1@inf.ed.ac.uk Bitfield<19, 12> fxm; 796691Stjones1@inf.ed.ac.ukEndBitUnion(ExtMachInst) 806691Stjones1@inf.ed.ac.uk 817720Sgblack@eecs.umich.edutypedef GenericISA::SimplePCState<MachInst> PCState; 827720Sgblack@eecs.umich.edu 836691Stjones1@inf.ed.ac.uk// typedef uint64_t LargestRead; 846691Stjones1@inf.ed.ac.uk// // Need to use 64 bits to make sure that read requests get handled properly 856691Stjones1@inf.ed.ac.uk 866691Stjones1@inf.ed.ac.uk// typedef int RegContextParam; 876691Stjones1@inf.ed.ac.uk// typedef int RegContextVal; 886691Stjones1@inf.ed.ac.uk 898185Sgblack@eecs.umich.edu} // PowerISA namespace 906691Stjones1@inf.ed.ac.uk 9111168Sandreas.hansson@arm.comnamespace std { 927680Sgblack@eecs.umich.edu 937680Sgblack@eecs.umich.edutemplate<> 947680Sgblack@eecs.umich.edustruct hash<PowerISA::ExtMachInst> : public hash<uint32_t> { 957680Sgblack@eecs.umich.edu size_t operator()(const PowerISA::ExtMachInst &emi) const { 967680Sgblack@eecs.umich.edu return hash<uint32_t>::operator()((uint32_t)emi); 977680Sgblack@eecs.umich.edu }; 987680Sgblack@eecs.umich.edu}; 997680Sgblack@eecs.umich.edu 10011168Sandreas.hansson@arm.com} 1017680Sgblack@eecs.umich.edu 1026691Stjones1@inf.ed.ac.uk#endif // __ARCH_POWER_TYPES_HH__ 103