Searched refs:device (Results 1 - 25 of 29) sorted by relevance

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/gem5/src/dev/serial/
H A Duart.cc39 platform(p->platform), device(p->device),
44 // setup serial device callbacks
45 device->regInterfaceCallback(&callbackDataAvail);
H A Dsimple.cc61 if (device->dataAvailable())
62 data = device->readData();
80 device->writeData(data);
H A Duart.hh53 SerialDevice *device; member in class:Uart
H A DUart.py51 platform = Param.Platform(Parent.any, "Platform this device is part of.")
52 device = Param.SerialDevice(Parent.any, "The terminal") variable in class:Uart
57 big_endian = Param.Bool(False, "Is the device Big Endian?")
H A Duart8250.cc65 * the device until the device reports it has no more data to
109 if (device->dataAvailable())
110 pkt->setRaw(device->readData());
119 if (device->dataAvailable() && (IER & UART_IER_RDI))
155 if (device->dataAvailable())
192 device->writeData(pkt->getRaw<uint8_t>());
229 if ((UART_IER_RDI & IER) && device->dataAvailable()) {
/gem5/src/dev/x86/
H A Dintdev.hh61 Device * device; member in class:X86ISA::IntSlavePort
66 SimpleTimingPort(_name, _parent), device(dev)
73 return device->getIntAddrRange();
83 return device->recvMessage(pkt);
95 Device* device; member in class:X86ISA::IntMasterPort
103 device(dev), latency(_latency)
110 return device->recvResponse(pkt);
128 device->recvResponse(pkt);
H A DPc.py68 com_1.device = Terminal()
75 # A device to catch accesses to the non-existant floppy controller.
/gem5/src/dev/virtio/
H A Dconsole.cc50 device(*params->device), callbackDataAvail(qRecv)
58 device.regInterfaceCallback(&callbackDataAvail);
84 while (parent.device.dataAvailable() && (d = consumeDescriptor())) {
87 while (parent.device.dataAvailable() && len < d->size()) {
88 uint8_t in(parent.device.readData());
111 parent.device.writeData(data[i]);
H A DVirtIOConsole.py52 device = Param.SerialDevice("Serial device attached to this device") variable in class:VirtIOConsole
H A Dconsole.hh90 /** VirtIO device ID */
150 SerialDevice &device; member in class:VirtIOConsole
/gem5/src/dev/
H A Dio_device.hh58 * access types and roles them into one read() and write() call that the device
59 * must respond to. The device must also provide getAddrRanges() function
66 /** The device that this port serves. */
67 Device *device; member in class:PioPort
78 pkt->isRead() ? device->read(pkt) : device->write(pkt);
86 return device->getAddrRanges();
91 SimpleTimingPort(dev->name() + ".pio", dev), device(dev)
96 * This device is the base class which all devices senstive to an address range
99 * mode we are in, etc is handled by the PioPort so the device does
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H A Dintpin.hh80 Device *device = nullptr; member in class:IntSinkPin
82 void raiseOnDevice() override { device->raiseInterruptPin(number()); }
83 void lowerOnDevice() override { device->lowerInterruptPin(number()); }
87 IntSinkPinBase(_name, _id, num), device(dev) {}
H A Ddma_device.cc60 device(dev), sys(s), masterId(s->getMasterId(dev)),
97 device->schedule(state->completionEvent, curTick() + delay);
236 // device needs to send the packet, but currently the port
239 device->schedule(sendEvent, device->clockEdge(Cycles(1)));
/gem5/src/dev/pci/
H A Dhost.cc45 #include "dev/pci/device.hh"
60 PciHost::registerDevice(PciDevice *device, PciBusAddr bus_addr, PciIntPin pin) argument
62 auto map_entry = devices.emplace(bus_addr, device);
64 DPRINTF(PciHost, "%02x:%02x.%i: Registering device\n",
77 auto device = devices.find(addr); local
78 return device != devices.end() ? device->second : nullptr;
84 auto device = devices.find(addr); local
85 return device != devices.end() ? device
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H A DPciHost.py67 def pciFdtAddr(self, bus=0, device=0, function=0, register=0, space=0,
71 devicef = device & 0x1f
80 devicef != device or \
H A Dhost.hh99 * Instantiate a device interface
101 * @param host PCI host that this device belongs to.
102 * @param bus_addr The device's position on the PCI bus
158 * Register a PCI device with the host.
160 * @param device Device to register
161 * @param bus_addr The device's position on the PCI bus
163 * @return A device-specific DeviceInterface instance.
165 virtual DeviceInterface registerDevice(PciDevice *device,
179 * @param bus_addr The device's position on the PCI bus
187 * @param bus_addr The device'
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H A Dpcireg.h45 * Device register definitions for a device's PCI config space
61 uint16_t device; member in struct:PCIConfig::__anon62
206 * bitfields for a PCIe device.
237 * the a PCI/PCIe device. Both the MSI capability and the MSIX capability
238 * can be filled in if a device model supports both, but only 1 of
266 * a PCIe device.
305 * for a PCIe device.
/gem5/src/dev/arm/
H A DSMMUv3.py86 system = Param.System(Parent.any, "System this device is part of")
188 def connect(self, device, bus):
192 dma device), or to a master port (this is the case where the SMMU
201 if hasattr(device, "master"):
202 slave_interface.slave = device.master
203 elif hasattr(device, "dma"):
204 slave_interface.slave = device.dma
212 # the binding in the device DTB.
213 device._iommu = self
H A Dpl011.cc83 if (device->dataAvailable()) {
84 data = device->readData();
88 if (device->dataAvailable()) {
102 (!device->dataAvailable() ? UART_FR_RXFE : UART_FR_RXFF) |
208 device->writeData(data & 0xFF);
240 if (device->dataAvailable()) {
H A DRealView.py86 amba_id = Param.UInt32("ID of AMBA device for kernel detection")
95 "Time between action and interrupt generation by device")
105 amba_id = Param.UInt32("ID of AMBA device for kernel detection")
187 interrupts += self.pciFdtAddr(device=i, addr=0) + \
197 intmask = self.pciFdtAddr(device=int_count - 1, addr=0) + [0x0]
241 # about the site/position/dcc/device allocation.
243 position = Param.UInt8("Position in device stack")
245 device = Param.UInt8("Device ID") variable in class:RealViewOsc
254 [0x1, int(self.device)]))
273 # about the site/position/dcc/device allocatio
277 device = Param.UInt8("Device ID") variable in class:RealViewTemperatureSensor
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H A Drv_ctrl.hh171 * Handle a read to the device
224 * This device implements the temperature sensor used in the
236 p->site, p->position, p->dcc, p->device),
246 /** The system this RV device belongs to */
/gem5/util/tap/
H A Dtap.cc65 "\t%s [-b bufsize] [-d] [-f filter] [-p port] [-v] <device> <host>\n"
66 "\t%s [-b bufsize] [-d] [-f filter] [-l] [-p port] [-v] <device>\n",
215 Tap(char *device);
227 PCap(char *device, char *filter = NULL);
233 PCap::PCap(char *device, char *filter) argument
237 pcap = pcap_open_live(device, 1500, 1, -1, errbuf);
244 if (pcap_lookupnet(device, &localnet, &netmask, errbuf) == -1) {
282 Tap::Tap(char *device) argument
284 fd = open(device, O_RDWR, 0);
286 panic("could not open %s: %s\n", device, strerro
322 char *device = NULL; local
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/gem5/ext/dnet/
H A Deth.h65 eth_t *eth_open(const char *device);
/gem5/tests/test-progs/gpu-hello/bin/x86/linux/
H A Dgpu-hello-kernel.asm3 %code_size%code_in%key_arr%msg_out%chars_decodedAMD RTI$ARGSTART:__OpenCL_read_kernel_kernel$,version:3:1:1044<device:genericDL uniqueid:1024T\memory:private:0dlmemory:region:0t|memory:local:16��!value:__global_offset_0:u64:1:1:0��"value:__global_offset_1:u64:1:1:16��"value:__global_offset_2:u64:1:1:32��2pointer:__printf_buffer:u8:1:1:48:uav:7:1:RW:0:0:0��!value:__vqueue_pointer:u64:1:1:64��"value:__aqlwrap_pointer:u64:1:1:80��value:code_size:u64:1:1:96��+pointer:code_in:u8:1:1:112:uav:7:1:RW:0:0:0 ,pointer:key_arr:u32:1:1:128:uav:7:4:RW:0:0:0+pointer:msg_out:u8:1:1:144:uav:7:1:RW:0:0:0$,2pointer:chars_decoded:u32:1:1:160:uav:7:4:RW:0:0:04< function:1:0DLmemory:64bitABIT\ privateid:8dlenqueue_kernel:0t|kernel_index:0��reflection:0:size_t��reflection:1:size_t��reflection:2:size_t��reflection:3:size_t��reflection:4:size_t��reflection:5:size_t��reflection:6:size_t��reflection:7:char* reflection:8:int*reflection:9:char*$,reflection:10:int*4<"ARGEND:__OpenCL_read_kernel_kernelDL%read_kernel_lcount"@__OpenCL_read_kernel_kernel_entry// BB#0:T\hpx� ����� ������,4 HPX@BB0_2dl// BB#1:t� ����� ��� ��� (08@BB0_4DL6// BB#3: // %.preheader T\d lt| ������� �����(@BB0_50 8@HP`@BB0_7t|// BB#6:������� hsa_code  <HT```` |�������� (4@ � � � �  ( H | � � ( \ � � � 4 p � � �   , L p � � �  $ H l � � �   0X  rl Fx G�"  � G�"  � G�"  u� G�" G�" E � T  H  �  , W<" G@  T  d Gt E � T ��  �  � E   1  0  H@   +T  J`  Ux " �  �  H�  l  W� " T � �  G� " M�  I�  J�  �  g� �$ hsa_operand 0T 0` 0T 0� 0T 0� 0T 0� 0T 0� 0T 0 0T 04 0T 0T 0T 0� 0T 0� 0T 0� 0T 04 0T 0h 0T 0� 0T 0� 0T 0 0T 0@ 0T 0| 0T 0� 0T 0� 0T 0� 0T 0 0T 08 0T 0X 0T 0| 0T 0� 0T 0� 0T 0� 0T 0  0T 00 0T 0T 0T 0x 0T 0� 0T 0� 0T 0�
/gem5/src/dev/sparc/
H A DT1000.py53 platform = Param.Platform(Parent.any, "Platform this device is part of.")
125 self.hvuart.device = self.hterm
126 self.puart0.device = self.pterm

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