1/*
2 * Copyright (c) 2010,2013,2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Ali Saidi
38 */
39
40#ifndef __DEV_ARM_RV_HH__
41#define __DEV_ARM_RV_HH__
42
43#include "base/bitunion.hh"
44#include "dev/io_device.hh"
45#include "params/RealViewCtrl.hh"
46#include "params/RealViewOsc.hh"
47#include "params/RealViewTemperatureSensor.hh"
48
49/** @file
50 * This implements the simple real view registers on a PBXA9
51 */
52
53class RealViewCtrl : public BasicPioDevice
54{
55  public:
56    enum DeviceFunc {
57        FUNC_OSC      = 1,
58        FUNC_VOLT     = 2,
59        FUNC_AMP      = 3,
60        FUNC_TEMP     = 4,
61        FUNC_RESET    = 5,
62        FUNC_SCC      = 6,
63        FUNC_MUXFPGA  = 7,
64        FUNC_SHUTDOWN = 8,
65        FUNC_REBOOT   = 9,
66        FUNC_DVIMODE  = 11,
67        FUNC_POWER    = 12,
68        FUNC_ENERGY   = 13,
69    };
70
71    class Device
72    {
73      public:
74        Device(RealViewCtrl &parent, DeviceFunc func,
75               uint8_t site, uint8_t pos, uint8_t dcc, uint16_t dev)
76        {
77            parent.registerDevice(func, site, pos, dcc, dev,  this);
78        }
79
80        virtual ~Device() {}
81
82        virtual uint32_t read() const = 0;
83        virtual void write(uint32_t value) = 0;
84    };
85
86  protected:
87    enum {
88        IdReg      = 0x00,
89        SwReg      = 0x04,
90        Led        = 0x08,
91        Osc0       = 0x0C,
92        Osc1       = 0x10,
93        Osc2       = 0x14,
94        Osc3       = 0x18,
95        Osc4       = 0x1C,
96        Lock       = 0x20,
97        Clock100   = 0x24,
98        CfgData1   = 0x28,
99        CfgData2   = 0x2C,
100        Flags      = 0x30,
101        FlagsClr   = 0x34,
102        NvFlags    = 0x38,
103        NvFlagsClr = 0x3C,
104        ResetCtl   = 0x40,
105        PciCtl     = 0x44,
106        MciCtl     = 0x48,
107        Flash      = 0x4C,
108        Clcd       = 0x50,
109        ClcdSer    = 0x54,
110        Bootcs     = 0x58,
111        Clock24    = 0x5C,
112        Misc       = 0x60,
113        IoSel      = 0x70,
114        ProcId0    = 0x84,
115        ProcId1    = 0x88,
116        CfgData    = 0xA0,
117        CfgCtrl    = 0xA4,
118        CfgStat    = 0xA8,
119        TestOsc0   = 0xC0,
120        TestOsc1   = 0xC4,
121        TestOsc2   = 0xC8,
122        TestOsc3   = 0xCC,
123        TestOsc4   = 0xD0
124    };
125
126    // system lock value
127    BitUnion32(SysLockReg)
128        Bitfield<15,0> lockVal;
129        Bitfield<16> locked;
130    EndBitUnion(SysLockReg)
131
132    BitUnion32(CfgCtrlReg)
133        Bitfield<11, 0> dev;
134        Bitfield<15, 12> pos;
135        Bitfield<17, 16> site;
136        Bitfield<25, 20> func;
137        Bitfield<29, 26> dcc;
138        Bitfield<30> wr;
139        Bitfield<31> start;
140    EndBitUnion(CfgCtrlReg)
141
142    static const uint32_t CFG_CTRL_ADDR_MASK = 0x3fffffffUL;
143
144    SysLockReg sysLock;
145
146    /** This register is used for smp booting.
147     * The primary cpu writes the secondary start address here before
148     * sends it a soft interrupt. The secondary cpu reads this register and if
149     * it's non-zero it jumps to the address
150     */
151    uint32_t flags;
152
153    /** This register contains the result from a system control reg access
154     */
155    uint32_t scData;
156
157  public:
158    typedef RealViewCtrlParams Params;
159    const Params *
160    params() const
161    {
162        return dynamic_cast<const Params *>(_params);
163    }
164    /**
165      * The constructor for RealView just registers itself with the MMU.
166      * @param p params structure
167      */
168    RealViewCtrl(Params *p);
169
170    /**
171     * Handle a read to the device
172     * @param pkt The memory request.
173     * @param data Where to put the data.
174     */
175    Tick read(PacketPtr pkt) override;
176
177    /**
178     * All writes are simply ignored.
179     * @param pkt The memory request.
180     * @param data the data
181     */
182    Tick write(PacketPtr pkt) override;
183
184    void serialize(CheckpointOut &cp) const override;
185    void unserialize(CheckpointIn &cp) override;
186
187  public:
188    void registerDevice(DeviceFunc func, uint8_t site, uint8_t pos,
189                        uint8_t dcc, uint16_t dev,
190                        Device *handler);
191
192  protected:
193    std::map<uint32_t, Device *> devices;
194};
195
196/**
197 * This is an implementation of a programmable oscillator on the that
198 * can be configured through the RealView/Versatile Express
199 * configuration interface.
200 *
201 * See ARM DUI 0447J (ARM  Motherboard Express uATX -- V2M-P1).
202 */
203class RealViewOsc
204    : public ClockDomain, RealViewCtrl::Device
205{
206  public:
207    RealViewOsc(RealViewOscParams *p);
208    virtual ~RealViewOsc() {};
209
210    void startup() override;
211
212    void serialize(CheckpointOut &cp) const override;
213    void unserialize(CheckpointIn &cp) override;
214
215  public: // RealViewCtrl::Device interface
216    uint32_t read() const override;
217    void write(uint32_t freq) override;
218
219  protected:
220    void clockPeriod(Tick clock_period);
221};
222
223/**
224 * This device implements the temperature sensor used in the
225 * RealView/Versatile Express platform.
226 *
227 * See ARM DUI 0447J (ARM  Motherboard Express uATX -- V2M-P1).
228 */
229class RealViewTemperatureSensor
230    : public SimObject, RealViewCtrl::Device
231{
232  public:
233    RealViewTemperatureSensor(RealViewTemperatureSensorParams *p)
234    : SimObject(p),
235      RealViewCtrl::Device(*p->parent, RealViewCtrl::FUNC_TEMP,
236                           p->site, p->position, p->dcc, p->device),
237      system(p->system)
238    {}
239    virtual ~RealViewTemperatureSensor() {};
240
241  public: // RealViewCtrl::Device interface
242    uint32_t read() const override;
243    void write(uint32_t temp) override {}
244
245  protected:
246    /** The system this RV device belongs to */
247    System * system;
248};
249
250
251#endif // __DEV_ARM_RV_HH__
252