Searched refs:Addr (Results 201 - 225 of 767) sorted by relevance

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/gem5/src/arch/alpha/
H A Dsystem.hh73 void setAlphaAccess(Addr access);
124 Addr fixFuncEventAddr(Addr addr) override;
/gem5/src/cpu/testers/rubytest/
H A DCheckTable.hh49 Check* getCheck(Addr address);
59 void addCheck(Addr address);
66 std::unordered_map<Addr, Check*> m_lookup_map;
/gem5/src/cpu/simple/probes/
H A Dsimpoint.hh61 typedef std::pair<Addr, Addr> BasicBlockRange;
70 return hash<Addr>()(bb.first + bb.second);
/gem5/src/arch/riscv/insts/
H A Dstandard.hh54 Addr pc, const SymbolTable *symtab) const override;
80 generateDisassembly(Addr pc, const SymbolTable *symtab) const override
102 Addr pc, const SymbolTable *symtab) const override;
H A Dmem.hh61 Addr pc, const SymbolTable *symtab) const override;
70 Addr pc, const SymbolTable *symtab) const override;
H A Dstandard.cc47 RegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
57 CSROp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
/gem5/src/arch/arm/insts/
H A Dbranch.cc47 BranchReg::generateDisassembly(Addr pc, const SymbolTable *symtab) const
56 BranchImm::generateDisassembly(Addr pc, const SymbolTable *symtab) const
65 BranchRegReg::generateDisassembly(Addr pc, const SymbolTable *symtab) const
/gem5/src/cpu/pred/
H A Dltage.hh70 void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history,
72 Addr corrTarget = MaxAddr) override;
112 ThreadID tid, Addr branch_pc, bool cond_branch, void* &b) override;
H A Dindirect.hh51 virtual bool lookup(Addr br_addr, TheISA::PCState& br_target,
53 virtual void recordIndirect(Addr br_addr, Addr tgt_addr,
/gem5/src/mem/cache/prefetch/
H A Ddelta_correlating_prediction_tables.hh65 Addr lastAddress;
72 std::vector<Addr> deltas;
91 void addAddress(Addr address, unsigned int delta_num_bits);
H A Dspatio_temporal_memory_streaming.hh69 Addr paddress;
71 Addr pc;
152 Addr srAddress;
157 Addr pstAddress;
180 void addToRMOB(Addr sr_addr, Addr pst_addr, unsigned int delta);
/gem5/src/arch/x86/bios/
H A De820.cc50 void writeVal(T val, PortProxy& proxy, Addr &addr)
57 void X86ISA::E820Table::writeTo(PortProxy& proxy, Addr countAddr, Addr addr)
/gem5/src/mem/
H A Dse_translating_port_proxy.hh90 bool tryReadBlob(Addr addr, void *p, int size) const override;
91 bool tryWriteBlob(Addr addr, const void *p, int size) const override;
92 bool tryMemsetBlob(Addr addr, uint8_t val, int size) const override;
H A Dport_proxy.cc45 PortProxy::readBlobPhys(Addr addr, Request::Flags flags,
62 PortProxy::writeBlobPhys(Addr addr, Request::Flags flags,
79 PortProxy::memsetBlobPhys(Addr addr, Request::Flags flags,
92 PortProxy::tryWriteString(Addr addr, const char *str) const
102 PortProxy::tryReadString(std::string &str, Addr addr) const
115 PortProxy::tryReadString(char *str, Addr addr, size_t maxlen) const
H A Dfs_translating_port_proxy.cc76 FSTranslatingPortProxy::tryReadBlob(Addr addr, void *p, int size) const
78 Addr paddr;
95 Addr addr, const void *p, int size) const
97 Addr paddr;
113 FSTranslatingPortProxy::tryMemsetBlob(Addr address, uint8_t v, int size) const
115 Addr paddr;
/gem5/src/base/filters/
H A Dperfect_bloom_filter.cc60 Perfect::set(Addr addr)
66 Perfect::unset(Addr addr)
72 Perfect::getCount(Addr addr) const
/gem5/src/arch/sparc/
H A Dvtophys.cc47 Addr
48 vtophys(Addr vaddr)
60 Addr
61 vtophys(ThreadContext *tc, Addr addr)
90 Addr tsbs[4];
91 Addr va_tag;
/gem5/src/arch/mips/
H A Dtlb.hh60 typedef std::multimap<Addr, int> PageTable;
68 MipsISA::PTE *lookup(Addr vpn, uint8_t asn) const;
86 int probeEntry(Addr vpn,uint8_t) const;
96 void insert(Addr vaddr, MipsISA::PTE &pte);
99 void demapPage(Addr vaddr, uint64_t asn) override
105 static bool validVirtualAddress(Addr vaddr);
/gem5/src/arch/riscv/
H A Dtlb.hh59 typedef std::multimap<Addr, int> PageTable;
67 RiscvISA::PTE *lookup(Addr vpn, uint8_t asn) const;
85 int probeEntry(Addr vpn,uint8_t) const;
95 void insert(Addr vaddr, RiscvISA::PTE &pte);
98 void demapPage(Addr vaddr, uint64_t asn) override
104 static bool validVirtualAddress(Addr vaddr);
/gem5/src/dev/alpha/
H A Dtsunami_pchip.hh91 Addr dmaAddr(const PciBusAddr &addr, Addr pci_addr) const override;
/gem5/src/arch/power/insts/
H A Dmem.cc38 MemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
44 MemDispOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
H A Dmem.hh57 Addr pc, const SymbolTable *symtab) const override;
77 Addr pc, const SymbolTable *symtab) const override;
/gem5/src/sim/probe/
H A Dmem.hh56 Addr addr;
59 Addr pc;
/gem5/src/sim/
H A Demul_driver.hh95 virtual Addr mmap(ThreadContext *tc, Addr start, uint64_t length,
H A Dsystem.hh214 Addr pagePtr;
232 Addr kernelStart;
235 Addr kernelEnd;
238 Addr kernelEntry;
246 Addr loadAddrMask;
253 Addr loadAddrOffset;
271 Addr freeMemSize() const;
274 Addr memSize() const;
283 bool isMemAddr(Addr addr) const;
293 Addr getPageByte
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