111426Smitch.hayenga@arm.com/* 211426Smitch.hayenga@arm.com * Copyright (c) 2014 ARM Limited 311426Smitch.hayenga@arm.com * All rights reserved. 411426Smitch.hayenga@arm.com * 511426Smitch.hayenga@arm.com * Redistribution and use in source and binary forms, with or without 611426Smitch.hayenga@arm.com * modification, are permitted provided that the following conditions are 711426Smitch.hayenga@arm.com * met: redistributions of source code must retain the above copyright 811426Smitch.hayenga@arm.com * notice, this list of conditions and the following disclaimer; 911426Smitch.hayenga@arm.com * redistributions in binary form must reproduce the above copyright 1011426Smitch.hayenga@arm.com * notice, this list of conditions and the following disclaimer in the 1111426Smitch.hayenga@arm.com * documentation and/or other materials provided with the distribution; 1211426Smitch.hayenga@arm.com * neither the name of the copyright holders nor the names of its 1311426Smitch.hayenga@arm.com * contributors may be used to endorse or promote products derived from 1411426Smitch.hayenga@arm.com * this software without specific prior written permission. 1511426Smitch.hayenga@arm.com * 1611426Smitch.hayenga@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1711426Smitch.hayenga@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1811426Smitch.hayenga@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1911426Smitch.hayenga@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2011426Smitch.hayenga@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2111426Smitch.hayenga@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2211426Smitch.hayenga@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2311426Smitch.hayenga@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2411426Smitch.hayenga@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2511426Smitch.hayenga@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2611426Smitch.hayenga@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2711426Smitch.hayenga@arm.com * 2811426Smitch.hayenga@arm.com * Authors: Mitch Hayenga 2911426Smitch.hayenga@arm.com */ 3011426Smitch.hayenga@arm.com 3113957Sjairo.balart@metempsy.com#ifndef __CPU_PRED_INDIRECT_BASE_HH__ 3213957Sjairo.balart@metempsy.com#define __CPU_PRED_INDIRECT_BASE_HH__ 3311426Smitch.hayenga@arm.com 3411426Smitch.hayenga@arm.com#include "arch/isa_traits.hh" 3511426Smitch.hayenga@arm.com#include "config/the_isa.hh" 3611426Smitch.hayenga@arm.com#include "cpu/inst_seq.hh" 3713957Sjairo.balart@metempsy.com#include "params/IndirectPredictor.hh" 3813957Sjairo.balart@metempsy.com#include "sim/sim_object.hh" 3911426Smitch.hayenga@arm.com 4013957Sjairo.balart@metempsy.comclass IndirectPredictor : public SimObject 4111426Smitch.hayenga@arm.com{ 4211426Smitch.hayenga@arm.com public: 4311426Smitch.hayenga@arm.com 4413957Sjairo.balart@metempsy.com typedef IndirectPredictorParams Params; 4511426Smitch.hayenga@arm.com 4613957Sjairo.balart@metempsy.com IndirectPredictor(const Params *params) 4713957Sjairo.balart@metempsy.com : SimObject(params) 4811426Smitch.hayenga@arm.com { 4913957Sjairo.balart@metempsy.com } 5011426Smitch.hayenga@arm.com 5113957Sjairo.balart@metempsy.com virtual bool lookup(Addr br_addr, TheISA::PCState& br_target, 5213957Sjairo.balart@metempsy.com ThreadID tid) = 0; 5313957Sjairo.balart@metempsy.com virtual void recordIndirect(Addr br_addr, Addr tgt_addr, 5413957Sjairo.balart@metempsy.com InstSeqNum seq_num, ThreadID tid) = 0; 5513957Sjairo.balart@metempsy.com virtual void commit(InstSeqNum seq_num, ThreadID tid, 5613957Sjairo.balart@metempsy.com void * indirect_history) = 0; 5713957Sjairo.balart@metempsy.com virtual void squash(InstSeqNum seq_num, ThreadID tid) = 0; 5813957Sjairo.balart@metempsy.com virtual void recordTarget(InstSeqNum seq_num, void * indirect_history, 5913957Sjairo.balart@metempsy.com const TheISA::PCState& target, ThreadID tid) = 0; 6013957Sjairo.balart@metempsy.com virtual void genIndirectInfo(ThreadID tid, void* & indirect_history) = 0; 6113957Sjairo.balart@metempsy.com virtual void updateDirectionInfo(ThreadID tid, bool actually_taken) = 0; 6213957Sjairo.balart@metempsy.com virtual void deleteIndirectInfo(ThreadID tid, void * indirect_history) = 0; 6313957Sjairo.balart@metempsy.com virtual void changeDirectionPrediction(ThreadID tid, 6413957Sjairo.balart@metempsy.com void * indirect_history, 6513957Sjairo.balart@metempsy.com bool actually_taken) = 0; 6611426Smitch.hayenga@arm.com}; 6711426Smitch.hayenga@arm.com 6813957Sjairo.balart@metempsy.com#endif // __CPU_PRED_INDIRECT_BASE_HH__ 69