1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Timothy M. Jones
29 */
30
31#include "arch/power/insts/mem.hh"
32
33#include "base/loader/symtab.hh"
34
35using namespace PowerISA;
36
37std::string
38MemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
39{
40    return csprintf("%-10s", mnemonic);
41}
42
43std::string
44MemDispOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
45{
46    std::stringstream ss;
47
48    ccprintf(ss, "%-10s ", mnemonic);
49
50    // Print the destination only for a load
51    if (!flags[IsStore]) {
52        if (_numDestRegs > 0) {
53
54            // If the instruction updates the source register with the
55            // EA, then this source register is placed in position 0,
56            // therefore we print the last destination register.
57            printReg(ss, _destRegIdx[_numDestRegs-1]);
58        }
59    }
60
61    // Print the data register for a store
62    else {
63        printReg(ss, _srcRegIdx[1]);
64    }
65
66    // Print the displacement
67    ss << ", " << (int32_t)disp;
68
69    // Print the address register
70    ss << "(";
71    printReg(ss, _srcRegIdx[0]);
72    ss << ")";
73
74    return ss.str();
75}
76