| /gem5/src/cpu/testers/memtest/ |
| H A D | memtest.cc | 137 const RequestPtr &req = pkt->req; local
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| /gem5/src/gpu-compute/ |
| H A D | cl_driver.cc | 106 ClDriver::ioctl(ThreadContext *tc, unsigned req) argument
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| H A D | shader.cc | 229 Shader::doFunctionalAccess(const RequestPtr &req, MemCmd cmd, void *data, argument
342 RequestPtr req = std::make_shared<Request>( local
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| H A D | gpu_dyn_inst.hh | 397 setRequestFlags(RequestPtr req, bool setMemOrder=true) argument
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| /gem5/src/mem/ |
| H A D | port.cc | 101 auto req = std::make_shared<Request>( local
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| H A D | abstract_mem.cc | 212 const RequestPtr &req = pkt->req; local
243 const RequestPtr &req = pkt->req; local
[all...] |
| H A D | bridge.cc | 251 DeferredPacket req = transmitList.front(); local
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| H A D | serial_link.cc | 277 DeferredPacket req = transmitList.front(); local
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| H A D | abstract_mem.hh | 91 LockedAddr(const RequestPtr &req) : addr(mask(req->getPaddr())), argument
150 const RequestPtr &req = pkt->req; local
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| /gem5/src/kern/freebsd/ |
| H A D | freebsd.hh | 80 isTtyReq(unsigned req) argument
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| /gem5/src/arch/arm/ |
| H A D | stage2_lookup.hh | 71 RequestPtr req; member in class:ArmISA::Stage2LookUp
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| /gem5/src/arch/x86/ |
| H A D | intmessage.hh | 82 RequestPtr req = std::make_shared<Request>( local
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| H A D | tlb.cc | 173 TLB::translateInt(const RequestPtr &req, ThreadContext *tc) argument
227 finalizePhysical(const RequestPtr &req, ThreadContext *tc, Mode mode) const argument
269 translate(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode, bool &delayedResponse, bool timing) argument
430 translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode) argument
437 translateTiming(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode) argument
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| /gem5/src/cpu/testers/rubytest/ |
| H A D | Check.cc | 110 RequestPtr req = std::make_shared<Request>(m_address, 0, flags, local
148 RequestPtr req = std::make_shared<Request>(m_address, CHECK_SIZE, flags, local
181 RequestPtr req = std::make_shared<Request>( local
245 RequestPtr req = std::make_shared<Request>(m_address, CHECK_SIZE, flags, local
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| /gem5/src/cpu/ |
| H A D | translation.hh | 252 finish(const Fault &fault, const RequestPtr &req, ThreadContext *tc, argument
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| /gem5/src/mem/ruby/system/ |
| H A D | CacheRecorder.cc | 88 auto req = std::make_shared<Request>(rec->m_data_address, local
115 RequestPtr req; local
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| /gem5/src/dev/arm/ |
| H A D | smmu_v3_proc.cc | 80 RequestPtr req = std::make_shared<Request>( local
112 RequestPtr req = std::make_shared<Request>( local
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| /gem5/src/cpu/testers/garnet_synthetic_traffic/ |
| H A D | GarnetSyntheticTraffic.cc | 278 RequestPtr req = nullptr; local
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| /gem5/src/mem/cache/prefetch/ |
| H A D | queued.hh | 116 void setTranslationRequest(const RequestPtr &req) argument
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| /gem5/src/arch/alpha/ |
| H A D | tlb.cc | 206 TLB::checkCacheability(const RequestPtr &req, bool itb) argument
375 TLB::translateInst(const RequestPtr &req, ThreadContext *tc) argument
452 translateData(const RequestPtr &req, ThreadContext *tc, bool write) argument
602 translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode) argument
611 translateTiming(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode) argument
615 translation->finish(translateAtomic(req, tc, mode), req, tc, mode); local
619 finalizePhysical(const RequestPtr &req, ThreadContext *tc, Mode mode) const argument
[all...] |
| /gem5/util/tlm/src/ |
| H A D | sc_master_port.cc | 50 auto req = std::make_shared<Request>( local
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| /gem5/src/cpu/simple/ |
| H A D | base.cc | 469 BaseSimpleCPU::setupFetchRequest(const RequestPtr &req) argument
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| /gem5/src/dev/ |
| H A D | dma_device.cc | 166 RequestPtr req = NULL; local
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| /gem5/src/arch/arm/tracers/ |
| H A D | tarmac_parser.cc | 1053 const RequestPtr &req = memReq; local
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| /gem5/src/mem/cache/ |
| H A D | cache_blk.hh | 158 Lock(const RequestPtr &req) argument
329 clearLoadLocks(const RequestPtr &req) argument
402 const RequestPtr &req = pkt->req; local
[all...] |