1/*
2 * Copyright (c) 2012, 2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2001-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ron Dreslinski
41 *          Andreas Hansson
42 */
43
44/**
45 * @file
46 * AbstractMemory declaration
47 */
48
49#ifndef __MEM_ABSTRACT_MEMORY_HH__
50#define __MEM_ABSTRACT_MEMORY_HH__
51
52#include "mem/backdoor.hh"
53#include "mem/port.hh"
54#include "params/AbstractMemory.hh"
55#include "sim/clocked_object.hh"
56#include "sim/stats.hh"
57
58
59class System;
60
61/**
62 * Locked address class that represents a physical address and a
63 * context id.
64 */
65class LockedAddr {
66
67  private:
68
69    // on alpha, minimum LL/SC granularity is 16 bytes, so lower
70    // bits need to masked off.
71    static const Addr Addr_Mask = 0xf;
72
73  public:
74
75    // locked address
76    Addr addr;
77
78    // locking hw context
79    const ContextID contextId;
80
81    static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); }
82
83    // check for matching execution context
84    bool matchesContext(const RequestPtr &req) const
85    {
86        assert(contextId != InvalidContextID);
87        assert(req->hasContextId());
88        return (contextId == req->contextId());
89    }
90
91    LockedAddr(const RequestPtr &req) : addr(mask(req->getPaddr())),
92                                        contextId(req->contextId())
93    {}
94
95    // constructor for unserialization use
96    LockedAddr(Addr _addr, int _cid) : addr(_addr), contextId(_cid)
97    {}
98};
99
100/**
101 * An abstract memory represents a contiguous block of physical
102 * memory, with an associated address range, and also provides basic
103 * functionality for reading and writing this memory without any
104 * timing information. It is a ClockedObject since subclasses may need timing
105 * information.
106 */
107class AbstractMemory : public ClockedObject
108{
109  protected:
110
111    // Address range of this memory
112    AddrRange range;
113
114    // Pointer to host memory used to implement this memory
115    uint8_t* pmemAddr;
116
117    // Backdoor to access this memory.
118    MemBackdoor backdoor;
119
120    // Enable specific memories to be reported to the configuration table
121    const bool confTableReported;
122
123    // Should the memory appear in the global address map
124    const bool inAddrMap;
125
126    // Should KVM map this memory for the guest
127    const bool kvmMap;
128
129    std::list<LockedAddr> lockedAddrList;
130
131    // helper function for checkLockedAddrs(): we really want to
132    // inline a quick check for an empty locked addr list (hopefully
133    // the common case), and do the full list search (if necessary) in
134    // this out-of-line function
135    bool checkLockedAddrList(PacketPtr pkt);
136
137    // Record the address of a load-locked operation so that we can
138    // clear the execution context's lock flag if a matching store is
139    // performed
140    void trackLoadLocked(PacketPtr pkt);
141
142    // Compare a store address with any locked addresses so we can
143    // clear the lock flag appropriately.  Return value set to 'false'
144    // if store operation should be suppressed (because it was a
145    // conditional store and the address was no longer locked by the
146    // requesting execution context), 'true' otherwise.  Note that
147    // this method must be called on *all* stores since even
148    // non-conditional stores must clear any matching lock addresses.
149    bool writeOK(PacketPtr pkt) {
150        const RequestPtr &req = pkt->req;
151        if (lockedAddrList.empty()) {
152            // no locked addrs: nothing to check, store_conditional fails
153            bool isLLSC = pkt->isLLSC();
154            if (isLLSC) {
155                req->setExtraData(0);
156            }
157            return !isLLSC; // only do write if not an sc
158        } else {
159            // iterate over list...
160            return checkLockedAddrList(pkt);
161        }
162    }
163
164    /** Number of total bytes read from this memory */
165    Stats::Vector bytesRead;
166    /** Number of instruction bytes read from this memory */
167    Stats::Vector bytesInstRead;
168    /** Number of bytes written to this memory */
169    Stats::Vector bytesWritten;
170    /** Number of read requests */
171    Stats::Vector numReads;
172    /** Number of write requests */
173    Stats::Vector numWrites;
174    /** Number of other requests */
175    Stats::Vector numOther;
176    /** Read bandwidth from this memory */
177    Stats::Formula bwRead;
178    /** Read bandwidth from this memory */
179    Stats::Formula bwInstRead;
180    /** Write bandwidth from this memory */
181    Stats::Formula bwWrite;
182    /** Total bandwidth from this memory */
183    Stats::Formula bwTotal;
184
185    /** Pointor to the System object.
186     * This is used for getting the number of masters in the system which is
187     * needed when registering stats
188     */
189    System *_system;
190
191
192  private:
193
194    // Prevent copying
195    AbstractMemory(const AbstractMemory&);
196
197    // Prevent assignment
198    AbstractMemory& operator=(const AbstractMemory&);
199
200  public:
201
202    typedef AbstractMemoryParams Params;
203
204    AbstractMemory(const Params* p);
205    virtual ~AbstractMemory() {}
206
207    /**
208     * Initialise this memory.
209     */
210    void init() override;
211
212    /**
213     * See if this is a null memory that should never store data and
214     * always return zero.
215     *
216     * @return true if null
217     */
218    bool isNull() const { return params()->null; }
219
220    /**
221     * Set the host memory backing store to be used by this memory
222     * controller.
223     *
224     * @param pmem_addr Pointer to a segment of host memory
225     */
226    void setBackingStore(uint8_t* pmem_addr);
227
228    /**
229     * Get the list of locked addresses to allow checkpointing.
230     */
231    const std::list<LockedAddr>& getLockedAddrList() const
232    { return lockedAddrList; }
233
234    /**
235     * Add a locked address to allow for checkpointing.
236     */
237    void addLockedAddr(LockedAddr addr) { lockedAddrList.push_back(addr); }
238
239    /** read the system pointer
240     * Implemented for completeness with the setter
241     * @return pointer to the system object */
242    System* system() const { return _system; }
243
244    /** Set the system pointer on this memory
245     * This can't be done via a python parameter because the system needs
246     * pointers to all the memories and the reverse would create a cycle in the
247     * object graph. An init() this is set.
248     * @param sys system pointer to set
249     */
250    void system(System *sys) { _system = sys; }
251
252    const Params *
253    params() const
254    {
255        return dynamic_cast<const Params *>(_params);
256    }
257
258    /**
259     * Get the address range
260     *
261     * @return a single contigous address range
262     */
263    AddrRange getAddrRange() const;
264
265    /**
266     * Get the memory size.
267     *
268     * @return the size of the memory
269     */
270    uint64_t size() const { return range.size(); }
271
272    /**
273     * Get the start address.
274     *
275     * @return the start address of the memory
276     */
277    Addr start() const { return range.start(); }
278
279    /**
280     *  Should this memory be passed to the kernel and part of the OS
281     *  physical memory layout.
282     *
283     * @return if this memory is reported
284     */
285    bool isConfReported() const { return confTableReported; }
286
287    /**
288     * Some memories are used as shadow memories or should for other
289     * reasons not be part of the global address map.
290     *
291     * @return if this memory is part of the address map
292     */
293    bool isInAddrMap() const { return inAddrMap; }
294
295    /**
296     * When shadow memories are in use, KVM may want to make one or the other,
297     * but cannot map both into the guest address space.
298     *
299     * @return if this memory should be mapped into the KVM guest address space
300     */
301    bool isKvmMap() const { return kvmMap; }
302
303    /**
304     * Perform an untimed memory access and update all the state
305     * (e.g. locked addresses) and statistics accordingly. The packet
306     * is turned into a response if required.
307     *
308     * @param pkt Packet performing the access
309     */
310    void access(PacketPtr pkt);
311
312    /**
313     * Perform an untimed memory read or write without changing
314     * anything but the memory itself. No stats are affected by this
315     * access. In addition to normal accesses this also facilitates
316     * print requests.
317     *
318     * @param pkt Packet performing the access
319     */
320    void functionalAccess(PacketPtr pkt);
321
322    /**
323     * Register Statistics
324     */
325    void regStats() override;
326
327};
328
329#endif //__MEM_ABSTRACT_MEMORY_HH__
330