/gem5/src/cpu/pred/ |
H A D | ltage.cc | 107 tage->squash(tid, taken, bi->tageBranchInfo, corrTarget); 138 LTAGE::squash(ThreadID tid, void *bp_history) function in class:LTAGE 143 loopPredictor->squash(tid, bi->lpBranchInfo); 146 TAGE::squash(tid, bp_history);
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H A D | ltage.hh | 69 void squash(ThreadID tid, void *bp_history) override;
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H A D | tage.hh | 92 virtual void squash(ThreadID tid, void *bp_history) override;
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H A D | 2bit_local.hh | 97 void squash(ThreadID tid, void *bp_history) function in class:LocalBP
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H A D | indirect.hh | 57 virtual void squash(InstSeqNum seq_num, ThreadID tid) = 0;
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H A D | bi_mode.hh | 61 void squash(ThreadID tid, void *bp_history);
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H A D | bpred_unit.hh | 110 * @param squashed_sn The sequence number to squash any younger updates up 114 void squash(const InstSeqNum &squashed_sn, ThreadID tid); 119 * @param squashed_sn The sequence number to squash any younger updates up 125 void squash(const InstSeqNum &squashed_sn, 133 virtual void squash(ThreadID tid, void *bp_history) = 0; 177 * squash operation. 278 * a squash.
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H A D | tage.cc | 69 tage->squash(tid, taken, tage_bi, corrTarget); 89 TAGE::squash(ThreadID tid, void *bp_history) function in class:TAGE
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H A D | tournament.hh | 74 * BPHistory object to store any state it will need on squash/update. 102 * @param squashed is set when this function is called during a squash 112 * Restores the global branch history on a squash. 116 void squash(ThreadID tid, void *bp_history);
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H A D | simple_indirect.hh | 51 void squash(InstSeqNum seq_num, ThreadID tid);
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H A D | bpred_unit.cc | 368 BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid) function in class:BPredUnit 373 iPred->squash(squashed_sn, tid); 379 DPRINTF(Branch, "[tid:%i] [squash sn:%llu]" 388 DPRINTF(Branch, "[tid:%i] [squash sn:%llu] Squashing" 395 squash(tid, pred_hist.front().bpHistory); 400 DPRINTF(Branch, "[tid:%i] [squash sn:%llu] " 407 DPRINTF(Branch, "[tid:%i] [squash sn:%llu] predHist.size(): %i\n", 413 BPredUnit::squash(const InstSeqNum &squashed_sn, function in class:BPredUnit 423 // the fetch stage to squash history after the mispredict 426 // to the fetch stage is sent to squash histor [all...] |
H A D | loop_predictor.hh | 234 void squash(ThreadID tid, BranchInfo *bi);
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H A D | bi_mode.cc | 85 BiModeBP::squash(ThreadID tid, void *bpHistory) function in class:BiModeBP 161 // We do not update the counters speculatively on a squash.
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H A D | tage_sc_l.hh | 111 void squash(ThreadID tid, bool taken, TAGEBase::BranchInfo *bi,
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/gem5/src/cpu/o3/ |
H A D | comm.hh | 101 bool squash[Impl::MaxThreads]; member in struct:DefaultIEWDefaultCommit 128 bool squash; member in struct:TimeBufStruct::decodeComm 181 /// Instruction that caused the a non-mispredict squash 200 bool squash; // *F, D, R, I member in struct:TimeBufStruct::commitComm
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H A D | decode.hh | 199 * incorrectly. Sends squash information back to fetch. 201 void squash(const DynInstPtr &inst, ThreadID tid); 204 /** Squashes due to commit signalling a squash. Changes status to 207 unsigned squash(ThreadID tid); 295 * to rename. If there is, then wait squash after the next
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H A D | store_set.hh | 103 void squash(InstSeqNum squashed_num, ThreadID tid);
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H A D | decode_impl.hh | 306 DefaultDecode<Impl>::squash(const DynInstPtr &inst, ThreadID tid) function in class:DefaultDecode 315 toFetch->decodeInfo[tid].squash = true; 358 DefaultDecode<Impl>::squash(ThreadID tid) function in class:DefaultDecode 367 // In syscall emulation, we can have both a block and a squash due 381 // Go through incoming instructions from fetch and squash them. 511 // Check if there's a squash signal, squash if there is. 522 // Check squash signals from commit. 523 if (fromCommit->commitInfo[tid].squash) { 525 DPRINTF(Decode, "[tid:%i] Squashing instructions due to squash " [all...] |
H A D | iew_impl.hh | 463 DefaultIEW<Impl>::squash(ThreadID tid) function in class:DefaultIEW 468 instQueue.squash(tid); 471 ldstQueue.squash(fromCommit->commitInfo[tid].doneSeqNum, tid); 505 if (!toCommit->squash[tid] || 507 toCommit->squash[tid] = true; 534 // the squash. 535 if (!toCommit->squash[tid] || 537 toCommit->squash[tid] = true; 543 // Must include the memory violator in the squash. 784 // Check if there's a squash signa [all...] |
H A D | mem_dep_unit.hh | 155 void squash(const InstSeqNum &squashed_num, ThreadID tid);
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H A D | rob.hh | 195 /** Executes the squash, marking squashed instructions. */ 201 void squash(InstSeqNum squash_num, ThreadID tid); 307 * and after a squash.
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H A D | fetch_impl.hh | 667 DPRINTF(Fetch, "[tid:%i] Ignoring itlb completed after squash\n", 677 // If we have, just wait around for commit to squash something and put 734 // wake up is if a squash comes along and changes the PC. 883 DefaultFetch<Impl>::squash(const TheISA::PCState &newPC, function in class:DefaultFetch 1012 // Check squash signals from commit. 1013 if (fromCommit->commitInfo[tid].squash) { 1015 DPRINTF(Fetch, "[tid:%i] Squashing instructions due to squash " 1017 // In any case, squash. 1018 squash(fromCommit->commitInfo[tid].pc, 1027 branchPred->squash(fromCommi [all...] |
/gem5/src/python/pybind11/ |
H A D | event.cc | 161 .def("squash", &Event::squash)
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/gem5/src/cpu/minor/ |
H A D | fetch2.cc | 154 branchPredictor.squash(inst->id.fetchSeqNum, 170 branchPredictor.squash(inst->id.fetchSeqNum, 181 branchPredictor.squash(inst->id.fetchSeqNum,
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/gem5/src/arch/x86/ |
H A D | pagetable_walker.hh | 135 void squash();
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