History log of /gem5/src/cpu/pred/bi_mode.hh
Revision Date Author Comments
# 13960:e1ab93677110 10-Apr-2019 Daniel <odanrc@yahoo.com.br>

base: Move SatCounter to base directory

Saturating counters are used by many objects, not only
the cpu predictors. Therefore, move the class to the
base folder so that it can be more easily used.

Change-Id: I26f799324bdd8720ab8834c72a2002149cee777c
Signed-off-by: Daniel <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17993
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>


# 13959:ea907b02c800 05-Apr-2019 Daniel <odanrc@yahoo.com.br>

cpu: Revamp saturating counters

Revamp the SatCounter class, improving comments, implementing
increment, decrement and read operators to solve an old todo,
and adding missing error checking.

Change-Id: Ia057c423c90652ebd966b6b91a3471b17800f933
Signed-off-by: Daniel <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17992
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>


# 13654:dc3878f03a0c 06-Jan-2019 Jairo Balart <jairo.balart@metempsy.com>

cpu: Proposal for changing the indirect branch predictor interface

Now the indirect branch predictor handles its own GHR instead of getting
the one from the direction predictor.

Also, now the commit method of the indirect predictor is called for every
pending branch on an update, as the indirect predictors may want to update
their interal structures/histories with the information of each branch.

Change-Id: I7053fbea42a53960a3bc1ba32912cc99c160511e
Reviewed-on: https://gem5-review.googlesource.com/c/15318
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>


# 13626:d6a6358aa6db 05-Jan-2019 Jairo Balart <jairo.balart@metempsy.com>

cpu: Made TAGE a SimObject that can be used by other predictors

The TAGE implementation is now a SimObject so that other branch predictors
can easily use it. It has also been updated with the latest available TAGE
implementation from Andre Seznec:

http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar

Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e
Reviewed-on: https://gem5-review.googlesource.com/c/15317
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>


# 11783:f94c14fd6561 21-Dec-2016 Arthur Perais <arthur.perais@inria.fr>

cpu: disallow speculative update of branch predictor tables (o3)

The Minor and o3 cpu models share the branch prediction
code. Minor relies on the BPredUnit::squash() function
to update the branch predictor tables on a branch mispre-
diction. This is fine because Minor executes in-order, so
the update is on the correct path. However, this causes the
branch predictor to be updated on out-of-order branch
mispredictions when using the o3 model, which should not
be the case.

This patch guards against speculative update of the branch
prediction tables. On a branch misprediction, BPredUnit::squash()
calls BpredUnit::update(..., squashed = true). The underlying
branch predictor tests against the value of squashed. If it is
true, it restores any speculatively updated internal state
it might have (e.g., global/local branch history), then returns.
If false, it updates its prediction tables. Previously, exist-
ing predictors did not test against the "squashed" parameter.

To accomodate for this change, the Minor model must now call
BPredUnit::squash() then BPredUnit::update(..., squashed = false)
on branch mispredictions. Before, calling BpredUnit::squash()
performed the prediction tables update.

The effect is a slight MPKI improvement when using the o3
model. A further patch should perform the same modifications
for the indirect target predictor and BTB (less critical).

Signed-off-by: Jason Lowe-Power <jason@lowepower.com>


# 11434:b5aed9d2d54e 05-Apr-2016 Mitch Hayenga <mitch.hayenga@arm.com>

cpu: Implement per-thread GHRs

Branch predictors that use GHRs should index them on a
per-thread basis. This makes that so.

This is a re-spin of fb51231 after the revert (bd1c6789).


# 11433:72b075cdc336 05-Apr-2016 Mitch Hayenga <mitch.hayenga@arm.com>

cpu: Add an indirect branch target predictor

This patch adds a configurable indirect branch predictor that can be indexed
by a combination of GHR and path history hashes. Implements the functionality
described in:

"Target prediction for indirect jumps" by Chang, Hao, and Patt
http://dl.acm.org/citation.cfm?id=264209

This is a re-spin of fb9d142 after the revert (bd1c6789).


# 11429:cf5af0cc3be4 06-Apr-2016 Andreas Sandberg <andreas.sandberg@arm.com>

Revert power patch sets with unexpected interactions

The following patches had unexpected interactions with the current
upstream code and have been reverted for now:

e07fd01651f3: power: Add support for power models
831c7f2f9e39: power: Low-power idle power state for idle CPUs
4f749e00b667: power: Add power states to ClockedObject

Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>


# 11427:fb512311295e 05-Apr-2016 Curtis Dunham <Curtis.Dunham@arm.com>

cpu: Implement per-thread GHRs

Branch predictors that use GHRs should index them on a
per-thread basis. This makes that so.


# 11426:fb9d14204674 05-Apr-2016 Mitch Hayenga <mitch.hayenga@arm.com>

cpu: Add an indirect branch target predictor

This patch adds a configurable indirect branch predictor that can be indexed
by a combination of GHR and path history hashes. Implements the functionality
described in:

"Target prediction for indirect jumps" by Chang, Hao, and Patt
http://dl.acm.org/citation.cfm?id=264209


# 10785:f56c10663a01 13-Apr-2015 Dibakar Gope <gope@wisc.edu>

cpu: re-organizes the branch predictor structure.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>


# 10244:d2deb51a4abf 30-Jun-2014 Anthony Gutierrez <atgutier@umich.edu>

cpu: implement a bi-mode branch predictor