111784Sarthur.perais@inria.fr/* 211784Sarthur.perais@inria.fr * Copyright (c) 2014 The University of Wisconsin 311784Sarthur.perais@inria.fr * 411784Sarthur.perais@inria.fr * Copyright (c) 2006 INRIA (Institut National de Recherche en 511784Sarthur.perais@inria.fr * Informatique et en Automatique / French National Research Institute 611784Sarthur.perais@inria.fr * for Computer Science and Applied Mathematics) 711784Sarthur.perais@inria.fr * 811784Sarthur.perais@inria.fr * All rights reserved. 911784Sarthur.perais@inria.fr * 1011784Sarthur.perais@inria.fr * Redistribution and use in source and binary forms, with or without 1111784Sarthur.perais@inria.fr * modification, are permitted provided that the following conditions are 1211784Sarthur.perais@inria.fr * met: redistributions of source code must retain the above copyright 1311784Sarthur.perais@inria.fr * notice, this list of conditions and the following disclaimer; 1411784Sarthur.perais@inria.fr * redistributions in binary form must reproduce the above copyright 1511784Sarthur.perais@inria.fr * notice, this list of conditions and the following disclaimer in the 1611784Sarthur.perais@inria.fr * documentation and/or other materials provided with the distribution; 1711784Sarthur.perais@inria.fr * neither the name of the copyright holders nor the names of its 1811784Sarthur.perais@inria.fr * contributors may be used to endorse or promote products derived from 1911784Sarthur.perais@inria.fr * this software without specific prior written permission. 2011784Sarthur.perais@inria.fr * 2111784Sarthur.perais@inria.fr * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2211784Sarthur.perais@inria.fr * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2311784Sarthur.perais@inria.fr * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2411784Sarthur.perais@inria.fr * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2511784Sarthur.perais@inria.fr * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2611784Sarthur.perais@inria.fr * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2711784Sarthur.perais@inria.fr * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2811784Sarthur.perais@inria.fr * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2911784Sarthur.perais@inria.fr * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3011784Sarthur.perais@inria.fr * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3111784Sarthur.perais@inria.fr * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3211784Sarthur.perais@inria.fr * 3311784Sarthur.perais@inria.fr * Authors: Vignyan Reddy, Dibakar Gope and Arthur Perais, 3411784Sarthur.perais@inria.fr * from André Seznec's code. 3511784Sarthur.perais@inria.fr */ 3611784Sarthur.perais@inria.fr 3711784Sarthur.perais@inria.fr/* @file 3811784Sarthur.perais@inria.fr * Implementation of a L-TAGE branch predictor. TAGE is a global-history based 3911784Sarthur.perais@inria.fr * branch predictor. It features a PC-indexed bimodal predictor and N 4011784Sarthur.perais@inria.fr * partially tagged tables, indexed with a hash of the PC and the global 4111784Sarthur.perais@inria.fr * branch history. The different lengths of global branch history used to 4211784Sarthur.perais@inria.fr * index the partially tagged tables grow geometrically. A small path history 4311784Sarthur.perais@inria.fr * is also used in the hash. L-TAGE also features a loop predictor that records 4411784Sarthur.perais@inria.fr * iteration count of loops and predicts accordingly. 4511784Sarthur.perais@inria.fr * 4611784Sarthur.perais@inria.fr * All TAGE tables are accessed in parallel, and the one using the longest 4711784Sarthur.perais@inria.fr * history that matches provides the prediction (some exceptions apply). 4811784Sarthur.perais@inria.fr * Entries are allocated in components using a longer history than the 4911784Sarthur.perais@inria.fr * one that predicted when the prediction is incorrect. 5011784Sarthur.perais@inria.fr */ 5111784Sarthur.perais@inria.fr 5211784Sarthur.perais@inria.fr#ifndef __CPU_PRED_LTAGE 5311784Sarthur.perais@inria.fr#define __CPU_PRED_LTAGE 5411784Sarthur.perais@inria.fr 5513454Spau.cabre@metempsy.com 5611784Sarthur.perais@inria.fr#include <vector> 5711784Sarthur.perais@inria.fr 5811784Sarthur.perais@inria.fr#include "base/types.hh" 5913627Sjavier.bueno@metempsy.com#include "cpu/pred/loop_predictor.hh" 6013454Spau.cabre@metempsy.com#include "cpu/pred/tage.hh" 6111784Sarthur.perais@inria.fr#include "params/LTAGE.hh" 6211784Sarthur.perais@inria.fr 6313627Sjavier.bueno@metempsy.comclass LTAGE : public TAGE 6411784Sarthur.perais@inria.fr{ 6511784Sarthur.perais@inria.fr public: 6611784Sarthur.perais@inria.fr LTAGE(const LTAGEParams *params); 6711784Sarthur.perais@inria.fr 6811784Sarthur.perais@inria.fr // Base class methods. 6911784Sarthur.perais@inria.fr void squash(ThreadID tid, void *bp_history) override; 7013626Sjairo.balart@metempsy.com void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, 7113626Sjairo.balart@metempsy.com bool squashed, const StaticInstPtr & inst, 7213627Sjavier.bueno@metempsy.com Addr corrTarget = MaxAddr) override; 7313685Sjavier.bueno@metempsy.com 7413685Sjavier.bueno@metempsy.com void init() override; 7513627Sjavier.bueno@metempsy.com virtual void regStats() override; 7611784Sarthur.perais@inria.fr 7713627Sjavier.bueno@metempsy.com protected: 7813627Sjavier.bueno@metempsy.com /** The loop predictor object */ 7913627Sjavier.bueno@metempsy.com LoopPredictor *loopPredictor; 8011784Sarthur.perais@inria.fr 8113455Spau.cabre@metempsy.com // more provider types 8213455Spau.cabre@metempsy.com enum { 8313627Sjavier.bueno@metempsy.com LOOP = TAGEBase::LAST_TAGE_PROVIDER_TYPE + 1, 8413627Sjavier.bueno@metempsy.com LAST_LTAGE_PROVIDER_TYPE = LOOP 8513455Spau.cabre@metempsy.com }; 8613455Spau.cabre@metempsy.com 8713454Spau.cabre@metempsy.com // Primary branch history entry 8813454Spau.cabre@metempsy.com struct LTageBranchInfo : public TageBranchInfo 8911784Sarthur.perais@inria.fr { 9013627Sjavier.bueno@metempsy.com LoopPredictor::BranchInfo *lpBranchInfo; 9113627Sjavier.bueno@metempsy.com LTageBranchInfo(TAGEBase &tage, LoopPredictor &lp) 9213627Sjavier.bueno@metempsy.com : TageBranchInfo(tage), lpBranchInfo(lp.makeBranchInfo()) 9313454Spau.cabre@metempsy.com {} 9413626Sjairo.balart@metempsy.com 9513626Sjairo.balart@metempsy.com virtual ~LTageBranchInfo() 9613627Sjavier.bueno@metempsy.com { 9713627Sjavier.bueno@metempsy.com delete lpBranchInfo; 9813627Sjavier.bueno@metempsy.com } 9911784Sarthur.perais@inria.fr }; 10011784Sarthur.perais@inria.fr 10111784Sarthur.perais@inria.fr /** 10213454Spau.cabre@metempsy.com * Get a branch prediction from LTAGE. *NOT* an override of 10313454Spau.cabre@metempsy.com * BpredUnit::predict(). 10413454Spau.cabre@metempsy.com * @param tid The thread ID to select the global 10513454Spau.cabre@metempsy.com * histories to use. 10613454Spau.cabre@metempsy.com * @param branch_pc The unshifted branch PC. 10713454Spau.cabre@metempsy.com * @param cond_branch True if the branch is conditional. 10813454Spau.cabre@metempsy.com * @param b Reference to wrapping pointer to allow storing 10913454Spau.cabre@metempsy.com * derived class prediction information in the base class. 11013454Spau.cabre@metempsy.com */ 11113454Spau.cabre@metempsy.com bool predict( 11213454Spau.cabre@metempsy.com ThreadID tid, Addr branch_pc, bool cond_branch, void* &b) override; 11311784Sarthur.perais@inria.fr}; 11411784Sarthur.perais@inria.fr 11511784Sarthur.perais@inria.fr#endif // __CPU_PRED_LTAGE 116