1/*
2 * Copyright (c) 2014 The University of Wisconsin
3 *
4 * Copyright (c) 2006 INRIA (Institut National de Recherche en
5 * Informatique et en Automatique  / French National Research Institute
6 * for Computer Science and Applied Mathematics)
7 *
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are
12 * met: redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer;
14 * redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution;
17 * neither the name of the copyright holders nor the names of its
18 * contributors may be used to endorse or promote products derived from
19 * this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * Authors: Vignyan Reddy, Dibakar Gope and Arthur Perais,
34 * from André Seznec's code.
35 */
36
37/* @file
38 * Implementation of a TAGE branch predictor. TAGE is a global-history based
39 * branch predictor. It features a PC-indexed bimodal predictor and N
40 * partially tagged tables, indexed with a hash of the PC and the global
41 * branch history. The different lengths of global branch history used to
42 * index the partially tagged tables grow geometrically. A small path history
43 * is also used in the hash.
44 *
45 * All TAGE tables are accessed in parallel, and the one using the longest
46 * history that matches provides the prediction (some exceptions apply).
47 * Entries are allocated in components using a longer history than the
48 * one that predicted when the prediction is incorrect.
49 */
50
51#ifndef __CPU_PRED_TAGE
52#define __CPU_PRED_TAGE
53
54#include <vector>
55
56#include "base/types.hh"
57#include "cpu/pred/bpred_unit.hh"
58#include "cpu/pred/tage_base.hh"
59#include "params/TAGE.hh"
60
61class TAGE: public BPredUnit
62{
63  protected:
64    TAGEBase *tage;
65
66    struct TageBranchInfo {
67        TAGEBase::BranchInfo *tageBranchInfo;
68
69        TageBranchInfo(TAGEBase &tage) : tageBranchInfo(tage.makeBranchInfo())
70        {}
71
72        virtual ~TageBranchInfo()
73        {
74            delete tageBranchInfo;
75        }
76    };
77
78    virtual bool predict(ThreadID tid, Addr branch_pc, bool cond_branch,
79                         void* &b);
80
81  public:
82
83    TAGE(const TAGEParams *params);
84
85    // Base class methods.
86    void uncondBranch(ThreadID tid, Addr br_pc, void* &bp_history) override;
87    bool lookup(ThreadID tid, Addr branch_addr, void* &bp_history) override;
88    void btbUpdate(ThreadID tid, Addr branch_addr, void* &bp_history) override;
89    void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history,
90                bool squashed, const StaticInstPtr & inst,
91                Addr corrTarget = MaxAddr) override;
92    virtual void squash(ThreadID tid, void *bp_history) override;
93};
94
95#endif // __CPU_PRED_TAGE
96