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13957:25e9c77a8a99 |
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06-Jan-2019 |
Jairo Balart <jairo.balart@metempsy.com> |
cpu: Make the indirect predictor into a SimObject
Change-Id: Ice6549773def7d3e944fae450d4a079bc351e2ba Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/15319 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
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13654:dc3878f03a0c |
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06-Jan-2019 |
Jairo Balart <jairo.balart@metempsy.com> |
cpu: Proposal for changing the indirect branch predictor interface
Now the indirect branch predictor handles its own GHR instead of getting the one from the direction predictor.
Also, now the commit method of the indirect predictor is called for every pending branch on an update, as the indirect predictors may want to update their interal structures/histories with the information of each branch.
Change-Id: I7053fbea42a53960a3bc1ba32912cc99c160511e Reviewed-on: https://gem5-review.googlesource.com/c/15318 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
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13626:d6a6358aa6db |
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05-Jan-2019 |
Jairo Balart <jairo.balart@metempsy.com> |
cpu: Made TAGE a SimObject that can be used by other predictors
The TAGE implementation is now a SimObject so that other branch predictors can easily use it. It has also been updated with the latest available TAGE implementation from Andre Seznec:
http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar
Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e Reviewed-on: https://gem5-review.googlesource.com/c/15317 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
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11783:f94c14fd6561 |
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21-Dec-2016 |
Arthur Perais <arthur.perais@inria.fr> |
cpu: disallow speculative update of branch predictor tables (o3)
The Minor and o3 cpu models share the branch prediction code. Minor relies on the BPredUnit::squash() function to update the branch predictor tables on a branch mispre- diction. This is fine because Minor executes in-order, so the update is on the correct path. However, this causes the branch predictor to be updated on out-of-order branch mispredictions when using the o3 model, which should not be the case.
This patch guards against speculative update of the branch prediction tables. On a branch misprediction, BPredUnit::squash() calls BpredUnit::update(..., squashed = true). The underlying branch predictor tests against the value of squashed. If it is true, it restores any speculatively updated internal state it might have (e.g., global/local branch history), then returns. If false, it updates its prediction tables. Previously, exist- ing predictors did not test against the "squashed" parameter.
To accomodate for this change, the Minor model must now call BPredUnit::squash() then BPredUnit::update(..., squashed = false) on branch mispredictions. Before, calling BpredUnit::squash() performed the prediction tables update.
The effect is a slight MPKI improvement when using the o3 model. A further patch should perform the same modifications for the indirect target predictor and BTB (less critical).
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
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11721:b0853929e223 |
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30-Nov-2016 |
Jason Lowe-Power <jason@lowepower.com> |
cpu: Remove branch predictor function predictInOrder
This function was used by the now-defunct InOrderCPU model. Since this model is no longer in gem5, this function was not called from anywhere in the code.
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11434:b5aed9d2d54e |
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05-Apr-2016 |
Mitch Hayenga <mitch.hayenga@arm.com> |
cpu: Implement per-thread GHRs
Branch predictors that use GHRs should index them on a per-thread basis. This makes that so.
This is a re-spin of fb51231 after the revert (bd1c6789).
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11433:72b075cdc336 |
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05-Apr-2016 |
Mitch Hayenga <mitch.hayenga@arm.com> |
cpu: Add an indirect branch target predictor
This patch adds a configurable indirect branch predictor that can be indexed by a combination of GHR and path history hashes. Implements the functionality described in:
"Target prediction for indirect jumps" by Chang, Hao, and Patt http://dl.acm.org/citation.cfm?id=264209
This is a re-spin of fb9d142 after the revert (bd1c6789).
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11429:cf5af0cc3be4 |
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06-Apr-2016 |
Andreas Sandberg <andreas.sandberg@arm.com> |
Revert power patch sets with unexpected interactions
The following patches had unexpected interactions with the current upstream code and have been reverted for now:
e07fd01651f3: power: Add support for power models 831c7f2f9e39: power: Low-power idle power state for idle CPUs 4f749e00b667: power: Add power states to ClockedObject
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
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11427:fb512311295e |
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05-Apr-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
cpu: Implement per-thread GHRs
Branch predictors that use GHRs should index them on a per-thread basis. This makes that so.
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11426:fb9d14204674 |
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05-Apr-2016 |
Mitch Hayenga <mitch.hayenga@arm.com> |
cpu: Add an indirect branch target predictor
This patch adds a configurable indirect branch predictor that can be indexed by a combination of GHR and path history hashes. Implements the functionality described in:
"Target prediction for indirect jumps" by Chang, Hao, and Patt http://dl.acm.org/citation.cfm?id=264209
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11169:44b5c183c3cd |
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12-Oct-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
misc: Add explicit overrides and fix other clang >= 3.5 issues
This patch adds explicit overrides as this is now required when using "-Wall" with clang >= 3.5, the latter now part of the most recent XCode. The patch consequently removes "virtual" for those methods where "override" is added. The latter should be enough of an indication.
As part of this patch, a few minor issues that clang >= 3.5 complains about are also resolved (unused methods and variables).
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11168:f98eb2da15a4 |
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12-Oct-2015 |
Andreas Hansson <andreas.hansson@arm.com> |
misc: Remove redundant compiler-specific defines
This patch moves away from using M5_ATTR_OVERRIDE and the m5::hashmap (and similar) abstractions, as these are no longer needed with gcc 4.7 and clang 3.1 as minimum compiler versions.
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10785:f56c10663a01 |
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13-Apr-2015 |
Dibakar Gope <gope@wisc.edu> |
cpu: re-organizes the branch predictor structure.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
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10462:e975e8afba8b |
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16-Oct-2014 |
Andreas Sandberg <Andreas.Sandberg@ARM.com> |
cpu: Add branch predictor PMU probe points
This changeset adds probe points that can be used to implement PMU counters for branch predictor stats. The following probes are supported:
* BPRedUnit::ppBranches / Branches * BPRedUnit::ppMisses / Misses
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10417:710ee116eb68 |
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27-Sep-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
arch: Use const StaticInstPtr references where possible
This patch optimises the passing of StaticInstPtr by avoiding copying the reference-counting pointer. This avoids first incrementing and then decrementing the reference-counting pointer.
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10330:f54586c894e3 |
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03-Sep-2014 |
Mitch Hayenga <mitch.hayenga@arm.com> |
cpu: Fix incorrect speculative branch predictor behavior
When a branch mispredicted gem5 would squash all history after and including the mispredicted branch. However, the mispredicted branch is still speculative and its history is required to rollback state if another, older, branch mispredicts. This leads to things like RAS corruption.
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10273:6e6557085eb7 |
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13-Aug-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
cpu: Modernise the branch predictor (STL and C++11)
This patch does some minor house keeping of the branch predictor by adopting STL containers, and shifting some iterator to use range-based for loops.
The predictor history is also changed from a list to a deque as we never to insertion/deletion other than at the front and back.
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10244:d2deb51a4abf |
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30-Jun-2014 |
Anthony Gutierrez <atgutier@umich.edu> |
cpu: implement a bi-mode branch predictor
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9480:d059f8a95a42 |
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24-Jan-2013 |
Nilay Vaish <nilay@cs.wisc.edu>, Timothy Jones <timothy.jones@cl.cam.ac.uk> |
branch predictor: move out of o3 and inorder cpus This patch moves the branch predictor files in the o3 and inorder directories to src/cpu/pred. This allows sharing the branch predictor across different cpu models.
This patch was originally posted by Timothy Jones in July 2010 but never made it to the repository.
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