Searched refs:schedTimingResp (Results 1 - 18 of 18) sorted by relevance

/gem5/src/mem/
H A Dtport.cc79 schedTimingResp(pkt, curTick() + latency);
H A Dqport.hh92 void schedTimingResp(PacketPtr pkt, Tick when) function in class:QueuedSlavePort
H A Dbridge.hh185 void schedTimingResp(PacketPtr pkt, Tick when);
H A Dserial_link.hh177 void schedTimingResp(PacketPtr pkt, Tick when);
H A Dbridge.cc139 slavePort.schedTimingResp(pkt, bridge.clockEdge(delay) +
233 Bridge::BridgeSlavePort::schedTimingResp(PacketPtr pkt, Tick when) function in class:Bridge::BridgeSlavePort
H A Dserial_link.cc159 slavePort.schedTimingResp(pkt, t);
259 SerialLink::SerialLinkSlavePort::schedTimingResp(PacketPtr pkt, Tick when) function in class:SerialLink::SerialLinkSlavePort
H A Dmem_delay.cc94 parent.slavePort.schedTimingResp(pkt, when);
H A Dnoncoherent_xbar.cc221 slavePorts[slave_port_id]->schedTimingResp(pkt, curTick() + latency);
H A Dcoherent_xbar.cc433 slavePorts[rsp_port_id]->schedTimingResp(rsp_pkt, response_time);
486 slavePorts[slave_port_id]->schedTimingResp(pkt, curTick() + latency);
670 slavePorts[dest_port_id]->schedTimingResp(pkt, curTick() + latency);
H A Ddram_ctrl.cc941 port.schedTimingResp(pkt, response_time);
/gem5/src/dev/arm/
H A Dsmmu_v3_slaveifc.hh101 void schedTimingResp(PacketPtr pkt);
H A Dsmmu_v3_slaveifc.cc107 SMMUv3SlaveInterface::schedTimingResp(PacketPtr pkt) function in class:SMMUv3SlaveInterface
109 slavePort->schedTimingResp(pkt, nextCycle());
115 atsSlavePort.schedTimingResp(pkt, nextCycle());
H A Dsmmu_v3.cc334 action.ifc->schedTimingResp(action.pkt);
/gem5/src/mem/ruby/system/
H A DRubyPort.cc163 rp->pioSlavePort.schedTimingResp(
187 port->schedTimingResp(pkt, curTick() + rp->m_ruby_system->clockPeriod());
249 schedTimingResp(pkt, curTick());
557 schedTimingResp(pkt, curTick());
/gem5/src/mem/cache/
H A Dnoncoherent_cache.cc290 cpuSidePort.schedTimingResp(tgt_pkt, completion_time);
H A Dcache.cc395 cpuSidePort.schedTimingResp(pkt, request_time);
837 cpuSidePort.schedTimingResp(tgt_pkt, completion_time);
H A Dbase.cc227 cpuSidePort.schedTimingResp(pkt, request_time);
400 cpuSidePort.schedTimingResp(pkt, completion_time);
/gem5/src/mem/qos/
H A Dmem_sink.cc292 port.schedTimingResp(pkt, curTick() + responseLatency);

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