Searched refs:read_misses (Results 1 - 10 of 10) sorted by relevance

/gem5/ext/mcpat/
H A Dcacheunit.h120 // read_misses and write_misses are still required for this method for
131 double read_misses; member in class:CacheStatistics
H A Dcacheunit.cc169 cache_stats.write_accesses + cache_stats.read_misses;
173 cache_stats.read_misses + cache_stats.write_misses;
269 cache_stats.read_misses + cache_stats.write_misses;
271 cache_stats.read_misses + cache_stats.write_misses;
324 cache_stats.read_misses + cache_stats.write_misses;
326 cache_stats.read_misses + cache_stats.write_misses;
379 arrayPtr->rtp_stats.readAc.access = cache_stats.read_misses;
380 arrayPtr->rtp_stats.writeAc.access = cache_stats.read_misses;
613 ASSIGN_FP_IF("read_misses", cache_stats.read_misses);
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/gem5/src/arch/mips/
H A Dtlb.hh71 mutable Stats::Scalar read_misses; member in class:MipsISA::TLB
H A Dtlb.cc237 read_misses
238 .name(name() + ".read_misses")
280 misses = read_misses + write_misses;
/gem5/src/arch/riscv/
H A Dtlb.hh70 mutable Stats::Scalar read_misses; member in class:RiscvISA::TLB
H A Dtlb.cc239 read_misses
240 .name(name() + ".read_misses")
282 misses = read_misses + write_misses;
/gem5/src/arch/alpha/
H A Dtlb.hh61 mutable Stats::Scalar read_misses; member in class:AlphaISA::TLB
H A Dtlb.cc101 read_misses
102 .name(name() + ".read_misses")
157 data_misses = read_misses + write_misses;
524 if (write) { write_misses++; } else { read_misses++; }
/gem5/src/arch/power/
H A Dtlb.hh120 mutable Stats::Scalar read_misses; member in class:PowerISA::TLB
H A Dtlb.cc234 read_misses
235 .name(name() + ".read_misses")
277 misses = read_misses + write_misses;

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