Searched refs:cchip (Results 1 - 11 of 11) sorted by relevance

/gem5/src/dev/alpha/
H A Dtsunami.cc82 cchip->postDRIR(line);
88 cchip->clearDRIR(line);
H A Dtsunami.hh72 TsunamiCChip *cchip; member in class:Tsunami
H A Dtsunami_io.hh67 tsunami->cchip->postRTC();
H A Dtsunami_io.cc170 tsunami->cchip->postDRIR(55);
171 DPRINTF(Tsunami, "posting pic interrupt to cchip\n");
175 tsunami->cchip->clearDRIR(55);
187 tsunami->cchip->clearDRIR(55);
240 tsunami->cchip->postDRIR(55);
241 DPRINTF(Tsunami, "posting pic interrupt to cchip\n");
251 tsunami->cchip->clearDRIR(55);
252 DPRINTF(Tsunami, "clearing pic interrupt to cchip\n");
H A DTsunami.py73 cchip = TsunamiCChip(pio_addr=0x801a0000000) variable in class:Tsunami
109 self.cchip.pio = bus.master
H A Dtsunami_cchip.cc74 tsunami->cchip = this;
176 panic("default in cchip read reached, accessing 0x%x\n");
371 panic("default in cchip read reached, accessing 0x%x\n");
/gem5/src/dev/mips/
H A DMalta.py56 cchip = MaltaCChip(pio_addr=0x801a0000000) variable in class:Malta
64 self.cchip.pio = bus.master
H A Dmalta_io.hh66 malta->cchip->postRTC();
H A Dmalta.hh72 MaltaCChip *cchip; member in class:Malta
H A Dmalta_io.cc101 malta->cchip->postIntr(interrupt);
102 DPRINTF(Malta, "posting pic interrupt to cchip\n");
108 malta->cchip->clearIntr(interrupt);
109 DPRINTF(Malta, "clear pic interrupt to cchip\n");
H A Dmalta_cchip.cc62 malta->cchip = this;

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