History log of /gem5/src/dev/mips/Malta.py
Revision Date Author Comments
# 13665:9c7fe3811b88 25-Jan-2019 Andreas Sandberg <andreas.sandberg@arm.com>

python: Don't assume SimObjects live in the global namespace

The importer in Python 3 doesn't like the way we import SimObjects
from the global namespace. Convert the existing SimObject declarations
to import from m5.objects. As a side-effect, this makes these files
consistent with configuration files.

Change-Id: I11153502b430822130722839e1fa767b82a027aa
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15981
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>


# 11233:18e411ee6c04 03-Dec-2015 Andreas Sandberg <andreas.sandberg@arm.com>

dev, mips: Remove the unused MaltaPChip class

The MaltaPChip class is currently unused and identical (except for the
class name) to the TsunamiPChip. If someone decides to implement PCI
for Malta, they should make sure to share code with the Tsunami
implementation if they are similar.


# 9338:97b4a2be1e5b 02-Nov-2012 Andreas Sandberg <Andreas.Sandberg@arm.com>

sim: Include object header files in SWIG interfaces

When casting objects in the generated SWIG interfaces, SWIG uses
classical C-style casts ( (Foo *)bar; ). In some cases, this can
degenerate into the equivalent of a reinterpret_cast (mainly if only a
forward declaration of the type is available). This usually works for
most compilers, but it is known to break if multiple inheritance is
used anywhere in the object hierarchy.

This patch introduces the cxx_header attribute to Python SimObject
definitions, which should be used to specify a header to include in
the SWIG interface. The header should include the declaration of the
wrapped object. We currently don't enforce header the use of the
header attribute, but a warning will be generated for objects that do
not use it.


# 8847:ef8630054b5e 14-Feb-2012 Andreas Hansson <andreas.hansson@arm.com>

MEM: Fix residual bus ports and make them master/slave

This patch cleans up a number of remaining uses of bus.port which
is now split into bus.master and bus.slave. The only non-trivial change
is the memtest where the level building now has to be aware of the role
of the ports used in the previous level.


# 7709:fc12f4d657f0 18-Oct-2010 Gabe Black <gblack@eecs.umich.edu>

MIPS: Get rid of the backdoor device copy/pasted from and only used in Alpha.


# 6379:75d4aaf7dd54 21-Jul-2009 Gabe Black <gblack@eecs.umich.edu>

MIPS: Get MIPS_FS to compile, more style fixes.
Some breakage was from my BitUnion change, some was much older.


# 5481:5afd4f01c824 17-Jun-2008 Nathan Binkert <nate@binkert.org>

rename MipsConsole to MipsBackdoor


# 5222:bb733a878f85 13-Nov-2007 Korey Sewell <ksewell@umich.edu>

Add in files from merge-bare-iron, get them compiling in FS and SE mode