Malta.py revision 5222:bb733a878f85
1# Copyright (c) 2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Korey Sewell
28
29from m5.params import *
30from m5.proxy import *
31from Device import BasicPioDevice
32from Platform import Platform
33from MipsConsole import MipsConsole
34from Uart import Uart8250
35from Pci import PciConfigAll
36from BadDevice import BadDevice
37
38class MaltaCChip(BasicPioDevice):
39    type = 'MaltaCChip'
40    malta = Param.Malta(Parent.any, "Malta")
41
42class MaltaIO(BasicPioDevice):
43    type = 'MaltaIO'
44    time = Param.UInt64(1136073600,
45        "System time to use (0 for actual time, default is 1/1/06)")
46    malta = Param.Malta(Parent.any, "Malta")
47    frequency = Param.Frequency('1050Hz', "frequency of interrupts")
48
49class MaltaPChip(BasicPioDevice):
50    type = 'MaltaPChip'
51    malta = Param.Malta(Parent.any, "Malta")
52
53class Malta(Platform):
54    type = 'Malta'
55    system = Param.System(Parent.any, "system")
56    cchip = MaltaCChip(pio_addr=0x801a0000000)
57    io = MaltaIO(pio_addr=0x801fc000000)
58    uart = Uart8250(pio_addr=0xBFD003F8)
59    console = MipsConsole(pio_addr=0xBFD00F00, disk=Parent.simple_disk)
60
61    # Attach I/O devices to specified bus object.  Can't do this
62    # earlier, since the bus object itself is typically defined at the
63    # System level.
64    def attachIO(self, bus):
65        self.cchip.pio = bus.port
66        self.io.pio = bus.port
67        self.uart.pio = bus.port
68        self.console.pio = bus.port
69