1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 * Rick Strong 30 */ 31 32/** 33 * @file 34 * Declaration of top level class for the Malta chipset. This class just 35 * retains pointers to all its children so the children can communicate. 36 */ 37 38#ifndef __DEV_MALTA_HH__ 39#define __DEV_MALTA_HH__ 40 41#include "dev/platform.hh" 42#include "params/Malta.hh" 43 44class IdeController; 45class MaltaCChip; 46class MaltaIO; 47class System; 48 49/** 50 * Top level class for Malta Chipset emulation. 51 * This structure just contains pointers to all the 52 * children so the children can commnicate to do the 53 * read work 54 */ 55 56class Malta : public Platform 57{ 58 public: 59 /** Max number of CPUs in a Malta */ 60 static const int Max_CPUs = 64; 61 62 /** Pointer to the system */ 63 System *system; 64 65 /** Pointer to the MaltaIO device which has the RTC */ 66 MaltaIO *io; 67 68 /** Pointer to the Malta CChip. 69 * The chip contains some configuration information and 70 * all the interrupt mask and status registers 71 */ 72 MaltaCChip *cchip; 73 74 int intr_sum_type[Malta::Max_CPUs]; 75 int ipi_pending[Malta::Max_CPUs]; 76 77 public: 78 /** 79 * Constructor for the Malta Class. 80 * @param name name of the object 81 * @param s system the object belongs to 82 * @param intctrl pointer to the interrupt controller 83 */ 84 typedef MaltaParams Params; 85 Malta(const Params *p); 86 87 /** 88 * Cause the cpu to post a serial interrupt to the CPU. 89 */ 90 void postConsoleInt() override; 91 92 /** 93 * Clear a posted CPU interrupt (id=55) 94 */ 95 void clearConsoleInt() override; 96 97 /** 98 * Cause the chipset to post a cpi interrupt to the CPU. 99 */ 100 void postPciInt(int line) override; 101 102 /** 103 * Clear a posted PCI->CPU interrupt 104 */ 105 void clearPciInt(int line) override; 106 107 108 virtual Addr pciToDma(Addr pciAddr) const; 109 110 Addr 111 calcPciConfigAddr(int bus, int dev, int func) 112 { 113 panic("Need implementation\n"); 114 M5_DUMMY_RETURN 115 } 116 117 Addr 118 calcPciIOAddr(Addr addr) 119 { 120 panic("Need implementation\n"); 121 M5_DUMMY_RETURN 122 } 123 124 Addr 125 calcPciMemAddr(Addr addr) 126 { 127 panic("Need implementation\n"); 128 M5_DUMMY_RETURN 129 } 130 131 void serialize(CheckpointOut &cp) const override; 132 void unserialize(CheckpointIn &cp) override; 133}; 134 135#endif // __DEV_MALTA_HH__ 136