15222Sksewell@umich.edu/*
25222Sksewell@umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan
35222Sksewell@umich.edu * All rights reserved.
45222Sksewell@umich.edu *
55222Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without
65222Sksewell@umich.edu * modification, are permitted provided that the following conditions are
75222Sksewell@umich.edu * met: redistributions of source code must retain the above copyright
85222Sksewell@umich.edu * notice, this list of conditions and the following disclaimer;
95222Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright
105222Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the
115222Sksewell@umich.edu * documentation and/or other materials provided with the distribution;
125222Sksewell@umich.edu * neither the name of the copyright holders nor the names of its
135222Sksewell@umich.edu * contributors may be used to endorse or promote products derived from
145222Sksewell@umich.edu * this software without specific prior written permission.
155222Sksewell@umich.edu *
165222Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
175222Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
185222Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
195222Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
205222Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
215222Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
225222Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
235222Sksewell@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
245222Sksewell@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
255222Sksewell@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
265222Sksewell@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
275222Sksewell@umich.edu *
285222Sksewell@umich.edu * Authors: Ali Saidi
295222Sksewell@umich.edu *          Andrew Schultz
305222Sksewell@umich.edu *          Miguel Serrano
315222Sksewell@umich.edu */
325222Sksewell@umich.edu
335222Sksewell@umich.edu/** @file
345222Sksewell@umich.edu * Malta I/O including PIC, PIT, RTC, DMA
355222Sksewell@umich.edu */
365222Sksewell@umich.edu
3711793Sbrandon.potter@amd.com#include "dev/mips/malta_io.hh"
3811793Sbrandon.potter@amd.com
395222Sksewell@umich.edu#include <sys/time.h>
405222Sksewell@umich.edu
415222Sksewell@umich.edu#include <deque>
425222Sksewell@umich.edu#include <string>
435222Sksewell@umich.edu#include <vector>
445222Sksewell@umich.edu
456379Sgblack@eecs.umich.edu#include "base/time.hh"
465222Sksewell@umich.edu#include "base/trace.hh"
478739Sgblack@eecs.umich.edu#include "debug/Malta.hh"
488229Snate@binkert.org#include "dev/mips/malta.hh"
495222Sksewell@umich.edu#include "dev/mips/malta_cchip.hh"
505222Sksewell@umich.edu#include "dev/mips/maltareg.h"
518229Snate@binkert.org#include "dev/rtcreg.h"
525222Sksewell@umich.edu#include "mem/packet.hh"
535222Sksewell@umich.edu#include "mem/packet_access.hh"
545222Sksewell@umich.edu#include "mem/port.hh"
555222Sksewell@umich.edu#include "params/MaltaIO.hh"
565222Sksewell@umich.edu#include "sim/system.hh"
575222Sksewell@umich.edu
585222Sksewell@umich.eduusing namespace std;
595222Sksewell@umich.edu
606379Sgblack@eecs.umich.eduMaltaIO::RTC::RTC(const string &name, const MaltaIOParams *p)
616379Sgblack@eecs.umich.edu    : MC146818(p->malta, name, p->time, p->year_is_bcd, p->frequency),
626379Sgblack@eecs.umich.edu      malta(p->malta)
635222Sksewell@umich.edu{
645222Sksewell@umich.edu}
655222Sksewell@umich.edu
666379Sgblack@eecs.umich.eduMaltaIO::MaltaIO(const Params *p)
679808Sstever@gmail.com    : BasicPioDevice(p, 0x100), malta(p->malta),
686379Sgblack@eecs.umich.edu      pitimer(this, p->name + "pitimer"), rtc(p->name + ".rtc", p)
695222Sksewell@umich.edu{
705222Sksewell@umich.edu    // set the back pointer from malta to myself
715222Sksewell@umich.edu    malta->io = this;
725222Sksewell@umich.edu
735222Sksewell@umich.edu    timerData = 0;
745222Sksewell@umich.edu    picr = 0;
755222Sksewell@umich.edu    picInterrupting = false;
765222Sksewell@umich.edu}
775222Sksewell@umich.edu
785222Sksewell@umich.eduTick
795222Sksewell@umich.eduMaltaIO::frequency() const
805222Sksewell@umich.edu{
817064Snate@binkert.org    return SimClock::Frequency / params()->frequency;
825222Sksewell@umich.edu}
835222Sksewell@umich.edu
845222Sksewell@umich.eduTick
855222Sksewell@umich.eduMaltaIO::read(PacketPtr pkt)
865222Sksewell@umich.edu{
876379Sgblack@eecs.umich.edu    panic("MaltaIO::read(...) not implemented inside malta_io.cc");
885222Sksewell@umich.edu    return pioDelay;
895222Sksewell@umich.edu}
905222Sksewell@umich.edu
915222Sksewell@umich.eduTick
925222Sksewell@umich.eduMaltaIO::write(PacketPtr pkt)
935222Sksewell@umich.edu{
946379Sgblack@eecs.umich.edu    panic("MaltaIO::write(...) not implemented inside malta_io.cc");
955222Sksewell@umich.edu    return pioDelay;
965222Sksewell@umich.edu}
975222Sksewell@umich.edu
985222Sksewell@umich.eduvoid
995222Sksewell@umich.eduMaltaIO::postIntr(uint8_t interrupt)
1005222Sksewell@umich.edu{
1015222Sksewell@umich.edu    malta->cchip->postIntr(interrupt);
1025222Sksewell@umich.edu    DPRINTF(Malta, "posting pic interrupt to cchip\n");
1035222Sksewell@umich.edu}
1045222Sksewell@umich.edu
1055222Sksewell@umich.eduvoid
1065222Sksewell@umich.eduMaltaIO::clearIntr(uint8_t interrupt)
1075222Sksewell@umich.edu{
1085222Sksewell@umich.edu    malta->cchip->clearIntr(interrupt);
1096379Sgblack@eecs.umich.edu    DPRINTF(Malta, "clear pic interrupt to cchip\n");
1105222Sksewell@umich.edu}
1115222Sksewell@umich.edu
1125222Sksewell@umich.eduvoid
11310905Sandreas.sandberg@arm.comMaltaIO::serialize(CheckpointOut &cp) const
1145222Sksewell@umich.edu{
1155222Sksewell@umich.edu    SERIALIZE_SCALAR(timerData);
1165222Sksewell@umich.edu    SERIALIZE_SCALAR(mask1);
1175222Sksewell@umich.edu    SERIALIZE_SCALAR(mask2);
1185222Sksewell@umich.edu    SERIALIZE_SCALAR(mode1);
1195222Sksewell@umich.edu    SERIALIZE_SCALAR(mode2);
1205222Sksewell@umich.edu    SERIALIZE_SCALAR(picr);
1215222Sksewell@umich.edu    SERIALIZE_SCALAR(picInterrupting);
1225222Sksewell@umich.edu
1235222Sksewell@umich.edu    // Serialize the timers
12410905Sandreas.sandberg@arm.com    pitimer.serialize("pitimer", cp);
12510905Sandreas.sandberg@arm.com    rtc.serialize("rtc", cp);
1265222Sksewell@umich.edu}
1275222Sksewell@umich.edu
1285222Sksewell@umich.eduvoid
12910905Sandreas.sandberg@arm.comMaltaIO::unserialize(CheckpointIn &cp)
1305222Sksewell@umich.edu{
1315222Sksewell@umich.edu    UNSERIALIZE_SCALAR(timerData);
1325222Sksewell@umich.edu    UNSERIALIZE_SCALAR(mask1);
1335222Sksewell@umich.edu    UNSERIALIZE_SCALAR(mask2);
1345222Sksewell@umich.edu    UNSERIALIZE_SCALAR(mode1);
1355222Sksewell@umich.edu    UNSERIALIZE_SCALAR(mode2);
1365222Sksewell@umich.edu    UNSERIALIZE_SCALAR(picr);
1375222Sksewell@umich.edu    UNSERIALIZE_SCALAR(picInterrupting);
1385222Sksewell@umich.edu
1395222Sksewell@umich.edu    // Unserialize the timers
14010905Sandreas.sandberg@arm.com    pitimer.unserialize("pitimer", cp);
14110905Sandreas.sandberg@arm.com    rtc.unserialize("rtc", cp);
1425222Sksewell@umich.edu}
1435222Sksewell@umich.edu
14410631Scdirik@micron.comvoid
14510631Scdirik@micron.comMaltaIO::startup()
14610631Scdirik@micron.com{
14710631Scdirik@micron.com    rtc.startup();
14810642Scdirik@micron.com    pitimer.startup();
14910631Scdirik@micron.com}
15010631Scdirik@micron.com
1515222Sksewell@umich.eduMaltaIO *
1525222Sksewell@umich.eduMaltaIOParams::create()
1535222Sksewell@umich.edu{
1545222Sksewell@umich.edu    return new MaltaIO(this);
1555222Sksewell@umich.edu}
156