Searched refs:Tick (Results 126 - 150 of 407) sorted by relevance

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/gem5/src/sim/
H A Ddvfs_handler.hh103 Tick transLatency() const { return _transLatency; }
135 Tick clkPeriodAtPerfLevel(DomainID domain_id, PerfLevel perf_level) const
145 return Tick(0);
218 const Tick _transLatency;
/gem5/src/cpu/simple/
H A Dnoncaching.cc56 Tick
/gem5/src/cpu/
H A Dthread_state.hh82 Tick readLastActivate() const { return lastActivate; }
84 Tick readLastSuspend() const { return lastSuspend; }
176 Tick lastActivate;
179 Tick lastSuspend;
/gem5/src/dev/x86/
H A Dintdev.hh76 Tick
96 Tick latency;
100 Device* dev, Tick _latency) :
141 IntDevice(SimObject * parent, Tick latency = 0) :
H A Di8259.hh50 Tick latency;
106 Tick read(PacketPtr pkt) override;
107 Tick write(PacketPtr pkt) override;
H A Di8254.hh45 Tick latency;
96 Tick read(PacketPtr pkt) override;
98 Tick write(PacketPtr pkt) override;
/gem5/src/gpu-compute/
H A Ddispatcher.hh68 Tick pioDelay;
134 virtual Tick recvAtomic(PacketPtr pkt) { return 0; }
147 Tick read(PacketPtr pkt) override;
148 Tick write(PacketPtr pkt) override;
H A Dgpu_tlb.hh83 Tick frequency() const { return SimClock::Frequency / clock; }
85 Tick
88 return (Tick)clock * numCycles;
91 Tick curCycle() const { return curTick() / clock; }
92 Tick tickToCycles(Tick val) const { return val / clock;}
232 Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
233 Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);
271 virtual Tick recvAtomic(PacketPtr pkt) { return 0; }
300 virtual Tick recvAtomi
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/gem5/src/arch/arm/kvm/
H A Darm_cpu.hh92 Tick kvmRun(Tick ticks);
97 Tick onKvmExitHypercall();
/gem5/src/dev/arm/
H A Dtimer_a9global.hh126 uint64_t getTimeCounterFromTicks(Tick ticks);
165 Tick read(PacketPtr pkt) override;
172 Tick write(PacketPtr pkt) override;
/gem5/src/dev/serial/
H A Duart8250.hh74 Tick lastTxInt;
91 Tick read(PacketPtr pkt) override;
92 Tick write(PacketPtr pkt) override;
/gem5/src/mem/
H A Ddramsim2.hh77 Tick recvAtomic(PacketPtr pkt);
109 Tick startTick;
202 Tick recvAtomic(PacketPtr pkt);
H A Dqport.hh92 void schedTimingResp(PacketPtr pkt, Tick when)
148 void schedTimingReq(PacketPtr pkt, Tick when)
157 void schedTimingSnoopResp(PacketPtr pkt, Tick when)
H A Dpacket_queue.hh71 Tick tick; ///< The tick when the packet is ready to transmit
73 DeferredPacket(Tick t, PacketPtr p)
171 Tick deferredPacketReadyTime() const
197 void schedSendEvent(Tick when);
205 void schedSendTiming(PacketPtr pkt, Tick when);
H A Dmem_checker.cc46 MemChecker::WriteCluster::startWrite(MemChecker::Serial serial, Tick _start,
73 MemChecker::WriteCluster::completeWrite(MemChecker::Serial serial, Tick _complete)
123 MemChecker::ByteTracker::startRead(MemChecker::Serial serial, Tick start)
130 MemChecker::ByteTracker::inExpectedData(Tick start, Tick complete, uint8_t data)
224 Tick complete, uint8_t data)
235 Tick start = it->second.start;
258 MemChecker::ByteTracker::startWrite(MemChecker::Serial serial, Tick start,
265 MemChecker::ByteTracker::completeWrite(MemChecker::Serial serial, Tick complete)
283 const Tick befor
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H A Dport.hh136 Tick sendAtomic(PacketPtr pkt);
148 Tick sendAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &backdoor);
223 Tick
320 Tick
411 Tick recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &backdoor) override;
426 inline Tick
432 inline Tick
H A Dhmc_controller.cc71 Tick old_header_delay = pkt->headerDelay;
74 Tick xbar_delay = (frontendLatency + forwardLatency) * clockPeriod();
80 Tick packetFinishTime = clockEdge(Cycles(1)) + pkt->payloadDelay;
/gem5/src/dev/net/
H A Ddist_iface.cc69 DistIface::Sync::init(Tick start_tick, Tick repeat_tick)
106 nextAt = std::numeric_limits<Tick>::max();
107 nextRepeat = std::numeric_limits<Tick>::max();
120 nextAt = std::numeric_limits<Tick>::max();
121 nextRepeat = std::numeric_limits<Tick>::max();
201 DistIface::SyncSwitch::progress(Tick send_tick,
202 Tick sync_repeat,
242 DistIface::SyncNode::progress(Tick max_send_tick,
243 Tick next_repea
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H A Ddist_etherlink.hh115 Tick delayVar;
125 double invBW, Tick delay_var, EtherDump *d) :
154 Tick linkDelay;
165 Tick delay, EtherDump *d) :
213 Tick linkDelay;
H A Dsinic.hh56 Tick intrDelay;
57 Tick intrTick;
60 void cpuIntrPost(Tick when);
196 Tick rxKickTick;
199 Tick txKickTick;
246 Tick dmaReadDelay;
247 Tick dmaReadFactor;
248 Tick dmaWriteDelay;
249 Tick dmaWriteFactor;
263 Tick rea
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H A Ddist_etherlink.cc83 Tick sync_repeat;
197 Tick delay = (Tick)ceil(((double)pkt->simLength * ticksPerByte) + 1.0);
199 delay += random_mt.random<Tick>(0, delayVar);
222 Tick event_time = event->when();
240 Tick event_time;
/gem5/src/systemc/core/
H A Dscheduler.hh162 typedef std::map<Tick, TimeSlot *> TimeSlots;
230 Tick getCurTick() { return eq ? eq->getCurTick() : 0; }
232 Tick
242 Tick tick = delayed(delay);
323 Tick
339 void start(Tick max_tick, bool run_to_time);
394 schedule(::Event *event, Tick tick)
451 Tick maxTick;
452 Tick lastReadyTick;
490 std::map<::Event *, Tick> eventsToSchedul
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/gem5/src/dev/pci/
H A Dcopy_engine.hh79 Tick latBeforeBegin;
80 Tick latAfterCompletion;
101 virtual Tick read(PacketPtr pkt)
103 virtual Tick write(PacketPtr pkt)
199 Tick read(PacketPtr pkt) override;
200 Tick write(PacketPtr pkt) override;
/gem5/src/dev/mips/
H A Dmalta_io.cc78 Tick
84 Tick
91 Tick
/gem5/src/mem/ruby/system/
H A DWeightedLRUPolicy.cc69 WeightedLRUPolicy::touch(int64_t set, int64_t index, Tick time)
78 WeightedLRUPolicy::touch(int64_t set, int64_t index, Tick time, int occupancy)
90 Tick time, smallest_time;

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