1/*
2 * Copyright (c) 2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31/** @file
32 * Defines a 8250 UART
33 */
34
35#ifndef __DEV_UART8250_HH__
36#define __DEV_UART8250_HH__
37
38#include "dev/io_device.hh"
39#include "dev/serial/uart.hh"
40#include "params/Uart8250.hh"
41
42/* UART8250 Interrupt ID Register
43 *  bit 0    Interrupt Pending 0 = true, 1 = false
44 *  bit 2:1  ID of highest priority interrupt
45 *  bit 7:3  zeroes
46 */
47const uint8_t IIR_NOPEND = 0x1;
48
49// Interrupt IDs
50const uint8_t IIR_MODEM = 0x00; /* Modem Status (lowest priority) */
51const uint8_t IIR_TXID  = 0x02; /* Tx Data */
52const uint8_t IIR_RXID  = 0x04; /* Rx Data */
53const uint8_t IIR_LINE  = 0x06; /* Rx Line Status (highest priority)*/
54
55const uint8_t UART_IER_RDI  = 0x01;
56const uint8_t UART_IER_THRI = 0x02;
57const uint8_t UART_IER_RLSI = 0x04;
58
59
60const uint8_t UART_LSR_TEMT = 0x40;
61const uint8_t UART_LSR_THRE = 0x20;
62const uint8_t UART_LSR_DR   = 0x01;
63
64const uint8_t UART_MCR_LOOP = 0x10;
65
66
67class Terminal;
68class Platform;
69
70class Uart8250 : public Uart
71{
72  protected:
73    uint8_t IER, DLAB, LCR, MCR;
74    Tick lastTxInt;
75
76    void processIntrEvent(int intrBit);
77    void scheduleIntr(Event *event);
78
79    EventFunctionWrapper txIntrEvent;
80    EventFunctionWrapper rxIntrEvent;
81
82  public:
83    typedef Uart8250Params Params;
84    const Params *
85    params() const
86    {
87        return dynamic_cast<const Params *>(_params);
88    }
89    Uart8250(const Params *p);
90
91    Tick read(PacketPtr pkt) override;
92    Tick write(PacketPtr pkt) override;
93    AddrRangeList getAddrRanges() const override;
94
95    /**
96     * Inform the uart that there is data available.
97     */
98    void dataAvailable() override;
99
100
101    /**
102     * Return if we have an interrupt pending
103     * @return interrupt status
104     */
105    virtual bool intStatus() { return status ? true : false; }
106
107    void serialize(CheckpointOut &cp) const override;
108    void unserialize(CheckpointIn &cp) override;
109};
110
111#endif // __TSUNAMI_UART_HH__
112