| /gem5/src/arch/mips/ |
| H A D | mt.hh | 80 setRegOtherThread(ThreadContext *tc, const RegId& reg, RegVal val, argument
111 setRegOtherThread(ExecContext *xc, const RegId& reg, RegVal val, argument
|
| H A D | isa.cc | 448 ISA::setMiscRegNoEffect(int misc_reg, RegVal val, ThreadID tid) argument
461 ISA::setRegMask(int misc_reg, RegVal val, ThreadID tid) argument
476 ISA::setMiscReg(int misc_reg, RegVal val, ThreadContext *tc, ThreadID tid) argument
499 ISA::filterCP0Write(int misc_reg, int reg_sel, RegVal val) argument
[all...] |
| /gem5/src/cpu/o3/ |
| H A D | thread_context_impl.hh | 265 O3ThreadContext<Impl>::setIntRegFlat(RegIndex reg_idx, RegVal val) argument
274 O3ThreadContext<Impl>::setFloatRegFlat(RegIndex reg_idx, RegVal val) argument
283 setVecRegFlat( RegIndex reg_idx, const VecRegContainer& val) argument
293 setVecElemFlat(RegIndex idx, const ElemIndex& elemIndex, const VecElem& val) argument
302 setVecPredRegFlat(RegIndex reg_idx, const VecPredRegContainer& val) argument
312 setCCRegFlat(RegIndex reg_idx, RegVal val) argument
321 pcState(const TheISA::PCState &val) argument
330 pcStateNoRecord(const TheISA::PCState &val) argument
346 setMiscRegNoEffect(RegIndex misc_reg, RegVal val) argument
355 setMiscReg(RegIndex misc_reg, RegVal val) argument
[all...] |
| H A D | regfile.hh | 247 setVecLane(PhysRegIdPtr phys_reg, const LD& val) argument
264 const VecElem& val = ret[phys_reg->elemIndex()]; local
305 setIntReg(PhysRegIdPtr phys_reg, RegVal val) argument
317 setFloatReg(PhysRegIdPtr phys_reg, RegVal val) argument
330 setVecReg(PhysRegIdPtr phys_reg, const VecRegContainer& val) argument
342 setVecElem(PhysRegIdPtr phys_reg, const VecElem val) argument
354 setVecPredReg(PhysRegIdPtr phys_reg, const VecPredRegContainer& val) argument
366 setCCReg(PhysRegIdPtr phys_reg, RegVal val) argument
[all...] |
| /gem5/src/arch/arm/ |
| H A D | pmu.cc | 194 PMU::setMiscReg(int misc_reg, RegVal val) argument
402 setControlReg(PMCR_t val) argument
456 increment(const uint64_t val) argument
474 notify(const uint64_t &val) argument
559 setValue(uint64_t val) argument
603 setCounterValue(CounterId id, uint64_t val) argument
630 setCounterTypeRegister(CounterId id, PMEVTYPER_t val) argument
805 write(uint64_t val) argument
[all...] |
| /gem5/src/cpu/minor/ |
| H A D | dyn_inst.hh | 281 void setPredicate(bool val) { predicate = val; } argument
285 void setMemAccPredicate(bool val) { memAccPredicate = val; } argument
|
| /gem5/src/base/stats/ |
| H A D | text.cc | 209 stringstream val; local
243 ScalarPrint::update(Result val, Resul argument
[all...] |
| /gem5/src/dev/arm/ |
| H A D | gic_v3_distributor.cc | 141 uint64_t val = 0x0; local
162 uint64_t val = 0x0; local
183 uint64_t val = 0x0; local
204 uint64_t val local
228 uint64_t val = 0x0; local
258 uint64_t val = 0x0; local
283 uint64_t val = 0x0; local
301 uint64_t val = 0x0; local
341 uint64_t val = 0x0; local
373 uint64_t val = 0x0; local
396 uint64_t val = 0x0; local
[all...] |
| /gem5/src/arch/x86/ |
| H A D | interrupts.cc | 198 uint32_t val = htog(readReg(reg)); local
215 uint32_t val = regs[reg]; local
395 uint64_t val = apicTimerEvent.when() - curTick(); local
410 setReg(ApicRegIndex reg, uint32_t val) argument
[all...] |
| H A D | interrupts.hh | 240 setRegNoEffect(ApicRegIndex reg, uint32_t val) argument
|
| /gem5/src/base/ |
| H A D | types.hh | 171 floatToBits32(float val) argument
183 floatToBits64(double val) argument
194 static inline uint64_t floatToBits(double val) { return floatToBits64(val); } argument
195 static inline uint32_t floatToBits(float val) { return floatToBits32(val); } argument
198 bitsToFloat32(uint32_t val) argument
210 bitsToFloat64(uint64_t val) argument
221 bitsToFloat(uint64_t val) argument
222 bitsToFloat(uint32_t val) argument
[all...] |
| H A D | circular_queue.hh | 546 void push_back(typename Base::value_type val) argument
|
| /gem5/src/cpu/simple/ |
| H A D | exec_context.hh | 288 setVecLaneOperandT(const StaticInst *si, int idx, const LD& val) argument
[all...] |
| /gem5/ext/pybind11/tests/ |
| H A D | test_sequences_and_iterators.cpp | 232 void set(std::string key, std::string val) { map[key] = val; } argument
|
| /gem5/ext/libfdt/ |
| H A D | fdt_ro.c | 450 const void *val; local
|
| H A D | fdt_rw.c | 253 fdt_setprop(void *fdt, int nodeoffset, const char *name, const void *val, int len) argument
271 fdt_appendprop(void *fdt, int nodeoffset, const char *name, const void *val, int len) argument
|
| H A D | libfdt.h | 866 fdt_setprop_inplace_u32(void *fdt, int nodeoffset, const char *name, uint32_t val) argument
901 fdt_setprop_inplace_u64(void *fdt, int nodeoffset, const char *name, uint64_t val) argument
913 fdt_setprop_inplace_cell(void *fdt, int nodeoffset, const char *name, uint32_t val) argument
978 fdt_property_u32(void *fdt, const char *name, uint32_t val) argument
983 fdt_property_u64(void *fdt, const char *name, uint64_t val) argument
988 fdt_property_cell(void *fdt, const char *name, uint32_t val) argument
1138 fdt_setprop_u32(void *fdt, int nodeoffset, const char *name, uint32_t val) argument
1173 fdt_setprop_u64(void *fdt, int nodeoffset, const char *name, uint64_t val) argument
1185 fdt_setprop_cell(void *fdt, int nodeoffset, const char *name, uint32_t val) argument
1280 fdt_appendprop_u32(void *fdt, int nodeoffset, const char *name, uint32_t val) argument
1315 fdt_appendprop_u64(void *fdt, int nodeoffset, const char *name, uint64_t val) argument
1327 fdt_appendprop_cell(void *fdt, int nodeoffset, const char *name, uint32_t val) argument
[all...] |
| /gem5/ext/mcpat/cacti/ |
| H A D | Ucache.cc | 58 void min_values_t::update_min_values(const min_values_t * val) { argument
[all...] |
| /gem5/src/arch/hsail/ |
| H A D | operand.hh | 202 SRegOperand::set(Wavefront *w, int lane, OperandType &val) argument
215 SRegOperand::set(Wavefront *w, int lane, uint64_t &val) argument
273 set(Wavefront *w, int lane, OperandType &val) argument
334 set(Wavefront *w, int lane, OperandType &val) argument
778 set(Wavefront *w, int lane, OperandType val) argument
[all...] |
| /gem5/src/dev/net/ |
| H A D | dist_iface.cc | 925 uint64_t val; local
938 uint64_t val; local
|
| /gem5/src/sim/ |
| H A D | insttracer.hh | 222 void setPredicate(bool val) { predicate = val; } argument
|
| H A D | pseudo_inst.cc | 420 uint64_t val; local
|
| /gem5/src/arch/sparc/ |
| H A D | process.cc | 513 Sparc32Process::setSyscallArg(ThreadContext *tc, int i, RegVal val) argument
527 Sparc64Process::setSyscallArg(ThreadContext *tc, int i, RegVal val) argument
544 RegVal val = sysret.returnValue(); local
552 RegVal val = sysret.errnoValue(); local
[all...] |
| /gem5/src/cpu/pred/ |
| H A D | tage_base.cc | 706 unsigned val = 0; local
|
| /gem5/src/cpu/checker/ |
| H A D | cpu.hh | 270 setVecLaneOperandT(const StaticInst *si, int idx, const LD& val) argument
371 setScalarResult(val); variable
380 setScalarResult(val); variable
399 setVecResult(val); variable
409 setVecElemResult(val); variable
418 setVecPredResult(val); variable
467 setMiscRegNoEffect(int misc_reg, RegVal val) argument
503 recordPCChange(const TheISA::PCState &val) argument
[all...] |