History log of /gem5/tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt
Revision Date Author Comments
# 11960:c7bf1b698ccd 29-Mar-2017 Gabe Black <gabeblack@google.com>

stats: Update some stats after simulated program exit behavior was changed.

The following CL delayed program exit and changed the stats for many if not
most of the SE mode regressions.

commit 2c1286865fc2542a0586ca4ff40b00765d17b348
Author: Brandon Potter <Brandon.Potter@amd.com>
Date: Wed Mar 1 14:52:23 2017 -0600

syscall-emul: Rewrite system call exit code

Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16
Reviewed-on: https://gem5-review.googlesource.com/2656
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>


# 11955:1170d039b31e 03-Apr-2017 Gabe Black <gabeblack@google.com>

stats: Rename num_syscalls to numSyscalls in the reference stats.

The name of the stat was changed in the following change which broke all the
reference outputs.

commit 2367198921765848a4f5b3d020a7cc5776209f80
Author: Brandon Potter <brandon.potter@amd.com>
Date: Mon Feb 27 14:10:15 2017 -0500

syscall_emul: [PATCH 15/22] add clone/execve for threading and
multiprocess simulations

Change-Id: Id98b085ccae098c50c434ad81a72beee46084f40
Reviewed-on: https://gem5-review.googlesource.com/2651
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>


# 11860:67dee11badea 19-Feb-2017 Andreas Hansson <andreas.hansson@arm.com>

stats: Get all stats updated to reflect current behaviour

Line everything up again.


# 11754:c209cb86278a 05-Dec-2016 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats to reflect cache changes


# 11687:b3d5f0e9e258 19-Oct-2016 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats to reflect recent changes to floats

Mostly just splitting out the floats ops and corresponding
reads/writes.


# 11680:b4d943429dc6 13-Oct-2016 Curtis Dunham <Curtis.Dunham@arm.com>

stats: update references


# 11606:6b749761c398 12-Aug-2016 Andreas Sandberg <andreas.sandberg@arm.com>

stats: Update to match classic memory changes


# 11570:4aac82f10951 21-Jul-2016 Curtis Dunham <Curtis.Dunham@arm.com>

stats: update references


# 11530:6e143fd2cabf 06-Jun-2016 Andreas Sandberg <andreas.sandberg@arm.com>

stats: Add power stats to test references

Change-Id: Ic827213134b199446822f128b81d4a480e777fee


# 11507:be6065c1d8d2 31-May-2016 Curtis Dunham <Curtis.Dunham@arm.com>

stats: update and fix e273e86a873d


# 11502:e273e86a873d 31-May-2016 Curtis Dunham <Curtis.Dunham@arm.com>

stats: update for snoop filter tweak


# 11456:c0fb4435b80f 21-Apr-2016 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats to reflect cache changes

Removed unused stats, now counting WriteLineReq, and changed how
uncacheable writes are handled while responses are outstanding.


# 11441:0edcf757b6a2 09-Apr-2016 Andreas Hansson <andreas.hansson@arm.com>

stats: Match current behaviour

Small changes to the branch predictor and BTB caused stats changes
throughout.


# 11388:bd4125134e77 17-Mar-2016 Steve Reinhardt <steve.reinhardt@amd.com>

stats: update stats for mmap changes


# 11384:e3cbd2823210 17-Mar-2016 Steve Reinhardt <steve.reinhardt@amd.com>

stats: update stats for mmap() change.

SE O3 runs see an additional reg read per mmap() call.


# 11336:b318499f676c 10-Feb-2016 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats to reflect changes to cache and crossbar


# 11214:966091379ded 16-Nov-2015 Nilay Vaish <nilay@cs.wisc.edu>

stats: remove wb_penalized and wb_penalized_rate


# 11201:b1bd4afb6b16 06-Nov-2015 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats to match cache changes


# 11138:a611a23c8cc2 25-Sep-2015 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats to reflect snoop-filter changes


# 11103:38f6188421e0 15-Sep-2015 Nilay Vaish <nilay@cs.wisc.edu>

stats: updates due to recent changesets including d0934b57735a


# 10892:bd37e25fb3b7 03-Jul-2015 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats for cache, crossbar and DRAM changes

This update includes the changes to whole-line writes, the refinement
of Read to ReadClean and ReadShared, the introduction of CleanEvict
for snoop-filter tracking, and updates to the DRAM command scheduler
for bank-group-aware scheduling.

Needless to say, almost every regression is affected.


# 10827:7f5467f2f8b8 05-May-2015 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats to reflect cache changes


# 10811:e6b20e6b5cf9 29-Apr-2015 Nilay Vaish <nilay@cs.wisc.edu>

stats: x86: updates due to change in div latency


# 10798:74e3c7359393 22-Apr-2015 Steve Reinhardt <steve.reinhardt@amd.com>

stats: update for previous changeset

Very small differences in IQ-specific O3 stats.


# 10736:4433fb00fa7d 09-Mar-2015 Nilay Vaish <nilay@cs.wisc.edu>

stats: changes to due to recent set of patches


# 10726:8a20e2a1562d 02-Mar-2015 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats to reflect cache and interconnect changes

This is a bulk update of stats to match the changes to cache timing,
interconnect timing, and a few minor changes to the o3 CPU.


# 10628:c9b7e0c69f88 23-Dec-2014 Andreas Hansson <andreas.hansson@arm.com>

stats: Bump stats for decoder, TLB, prefetcher and DRAM changes

Changes due to speculative execution of an unaligned PC, introduction
of TLB stats, changes and re-work of the prefetcher, and the
introduction of rank-wise refresh in the DRAM controller.


# 10488:7c27480a5031 20-Oct-2014 Nilay Vaish <nilay@cs.wisc.edu>

stats: updates due to previous mmap and exit_group patches.


# 10433:821cbe4a183b 09-Oct-2014 Andreas Hansson <andreas.hansson@arm.com>

stats: Add DRAM power statistics to reference output


# 10409:8c80b91944c5 20-Sep-2014 Andreas Hansson <andreas.hansson@arm.com>

stats: Bump stats for filter, crossbar and config changes

This patch bumps the stats to reflect the addition of the snoop filter
and snoop stats, the change from bus to crossbar, and the updates to
the ARM regressions that are now using a different CPU and cache
configuration. Lastly, some minor changes are expected due to the
activation cleanup of the CPUs.


# 10352:5f1f92bf76ee 03-Sep-2014 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats for CPU and cache changes

This patch updates the stats to reflect the fixes and changes to the
CPU (mainly the o3), and the caches.


# 10242:cb4e86c17767 22-Jun-2014 Steve Reinhardt <steve.reinhardt@amd.com>

stats: update for O3 changes

Mostly small differences in total ticks, but O3 stall causes
shifted significantly.

30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex
by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8%
slower.


# 10230:a2bb75a474fd 24-May-2014 Nilay Vaish <nilay@cs.wisc.edu>

stats: changes due to recent o3 patch.


# 10220:9eab5efc02e8 09-May-2014 Andreas Hansson <andreas.hansson@arm.com>

stats: Bump stats for the fixes, and mostly DRAM controller changes


# 10148:4574d5882066 23-Mar-2014 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats for DRAM changes

This patch updates the stats to reflect the changes to the DRAM
controller.


# 10036:80e84beef3bb 24-Jan-2014 Ali Saidi <Ali.Saidi@ARM.com>

stats: update stats for cache occupancy and clock domain changes


# 9988:0b2e590c85be 26-Nov-2013 Nilay Vaish <nilay@cs.wisc.edu>

stats: updates due to changes to ticksToCycles()


# 9978:81d7551dd3be 01-Nov-2013 Andreas Hansson <andreas.hansson@arm.com>

stats: Bump stats to match DRAM controller changes

This patch encompasses all the stats updates needed to reflect the
changes to the DRAM controller.


# 9924:31ef410b6843 16-Oct-2013 Steve Reinhardt <steve.reinhardt@amd.com>

test: update stats

Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.


# 9838:43d22d746e7a 19-Aug-2013 Andreas Hansson <andreas.hansson@arm.com>

stats: Cumulative stats update

This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.

The main reason for bundling them up is to minimise the changeset
size.


# 9797:9cd5f91e7a79 27-Jun-2013 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats for monitor, cache and bus changes

This patch removes the sparse histogram total from the CommMonitor
stats. It also bumps the stats after the unit fixes in the atomic
cache access. Lastly, it updates the stats to match the new port
ordering. All numbers are the same, and the only thing that changes is
which master corresponds to what port index.


# 9729:e2fafd224f43 30-May-2013 Andreas Hansson <andreas.hansson@arm.com>

stats: Update the stats to reflect bus and memory changes

This patch updates the stats to reflect the addition of the bus stats,
and changes to the bus layers. In addition it updates the stats to
match the addition of the static pipeline latency of the memory
conotroller and the addition of a stat tracking the bytes per
activate.


# 9702:094d0280e481 21-May-2013 Nilay Vaish <nilay@cs.wisc.edu>

x86, regressions: updates stats
This is due to op class, function call, walker patches.


# 9620:89aa34e10625 27-Mar-2013 Nilay Vaish <nilay@cs.wisc.edu>

regressions: update due to cache latency fix


# 9583:c1a5a20cc1fa 11-Mar-2013 Nilay Vaish <nilay@cs.wisc.edu>

regressions: x86: stats updates due to new x87 insts


# 9568:cd1351d4d850 01-Mar-2013 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats to reflect SimpleDRAM changes

This patch bumps the stats to reflect the slight change in how the
retry is handled, and also the pruning of some redundant stats.


# 9490:e6a09d97bdc9 31-Jan-2013 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats for regressions using SimpleDDR3

This patch updates the regression stats to reflect that they are using
the SimpleDDR3 controller by default.


# 9481:b0fa6b872f40 24-Jan-2013 Nilay Vaish <nilay@cs.wisc.edu>

regressions: update stats due to branch predictor changes
The actual statistical values are being updated for only two tests belonging
to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others
the patch updates config.ini and name changes to statistical variables.


# 9463:13e68ad8db54 14-Jan-2013 Andreas Hansson <andreas.hansson@arm.com>

stats: Bump failing x86 regression stats

This patch bumps the stats of mcf and twolf for the o3 CPU such that
the regressions pass.


# 9459:8ca90cef0183 08-Jan-2013 Ali Saidi <saidi@eecs.umich.edu>

stats: update stats for previous six changes


# 9449:56610ab73040 07-Jan-2013 Ali Saidi <Ali.Saidi@ARM.com>

stats: update stats for previous changes.


# 9373:26ba525347fe 30-Dec-2012 Nilay Vaish <nilay@cs.wisc.edu>

x86 regressions: stats update due to new x87 instructions


# 9348:44d31345e360 02-Nov-2012 Ali Saidi <Ali.Saidi@ARM.com>

update stats for preceeding changes


# 9322:01c8c5ff2c3b 30-Oct-2012 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats for unified cache configuration

This patch updates the stats to reflect the changes in the L2 MSHRs,
as the latter are now uniform across the regressions.


# 9312:e05e1b69ebf2 25-Oct-2012 Andreas Hansson <andreas.hansson@arm.com>

stats: Update stats to reflect use of SimpleDRAM

This patch bumps the stats to match the use of SimpleDRAM instead of
SimpleMemory in all inorder and O3 regressions, and also all
full-system regressions. A number of performance-related stats change,
and a whole bunch of stats are added for the memory controller.


# 9285:9901180cd573 15-Oct-2012 Andreas Hansson <andreas.hansson@arm.com>

Stats: Update stats for new default L1-to-L2 bus clock and width

This patch updates the stats to reflect the changes in the clock speed
and width for the bus connecting the L1 and L2 caches.


# 9229:65f927bda74d 18-Sep-2012 Andreas Hansson <andreas.hansson@arm.com>

Stats: Update stats to reflect SimpleMemory bandwidth

This patch simply bumps the stats to reflect the introduction of a
bandwidth limit of 12.8GB/s for SimpleMemory.


# 9223:be1c1059438b 13-Sep-2012 Andreas Hansson <andreas.hansson@arm.com>

Stats: Remove the reference stats that are no longer present

This patch simply removes the commitCommittedInsts and
commitCommittedOps from the reference statistics, following their
removal from the CPU.


# 9213:5cab5448909c 11-Sep-2012 Nilay Vaish <nilay@cs.wisc.edu>

x86 Regressions: Update stats due to register predication


# 9150:a2370fa5c793 15-Aug-2012 Ali Saidi <Ali.Saidi@ARM.com>

stats: Update stats for syscall emulation Linux kernel changes.


# 9096:8971a998190a 09-Jul-2012 Andreas Hansson <andreas.hansson@arm.com>

Stats: Updates due to bus changes

This patch bumps all the stats to reflect the bus changes, i.e. the
introduction of the state variable, the division into a request and
response layer, and the new default bus width of 8 bytes.


# 9079:9a244ebdc3c9 29-Jun-2012 Ali Saidi <Ali.Saidi@ARM.com>

Stats: Update stats for RAS and LRU fixes.


# 9055:38f1926fb599 05-Jun-2012 Ali Saidi <saidi@eecs.umich.edu>

all: Update stats for memory per master and total fix.


# 9039:9a22621c741c 04-Jun-2012 Gabe Black <gblack@eecs.umich.edu>

X86: Update stats for the CPUID change.


# 9013:afa278317136 22-May-2012 Nilay Vaish <nilay@cs.wisc.edu>

X86 Regression: update stats due to cc register split


# 8983:8800b05e1cb3 09-May-2012 Nathan Binkert <nate@binkert.org>

stats: update stats for no_value -> nan
Lots of accumulated older changes too.


# 8844:a451e4eda591 13-Feb-2012 Ali Saidi <Ali.Saidi@ARM.com>

bp: fix up stats for changes to branch predictor


# 8835:7c68f84d7c4e 12-Feb-2012 Ali Saidi <Ali.Saidi@ARM.com>

stats: update stats for insts/ops and master id changes


# 8825:23b349d77ac1 10-Feb-2012 Nilay Vaish <nilay@cs.wisc.edu>

Regressions: Update stats due to O3 CPU changes


# 8807:35e77c938919 29-Jan-2012 Gabe Black <gblack@eecs.umich.edu>

Yet another merge with the main repository.


# 8802:ef66a9083bc4 28-Jan-2012 Gabe Black <gblack@eecs.umich.edu>

SE/FS: Make both SE and FS tests available all the time.