Searched refs:EL3 (Results 1 - 17 of 17) sorted by relevance
/gem5/src/arch/arm/ |
H A D | interrupts.cc | 125 if (el == EL3) 130 if (el == EL3) 140 if (el == EL3 || el == EL2) 145 if (el == EL3) 155 if (el == EL3)
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H A D | utility.cc | 208 return ArmSystem::haveEL(tc, EL3) && scr.ns == 0; 246 case EL3: 317 panic_if(el == EL3 && !have_el3, "Asking for EL3 when it doesn't exist"); 346 aarch32 = (aarch32_below_el3 && el != EL3) 358 case EL3: 402 case EL3: 435 case EL3: 822 case EL3:
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H A D | system.hh | 233 return EL3;
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H A D | types.hh | 589 EL3 enumerator in enum:ArmISA::ExceptionLevel 706 return EL3;
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H A D | isa.cc | 275 case EL3: 374 // EL3 499 if (scr.ns && (cpsr.mode != MODE_MON) && ELIs32(tc, EL3)) { 724 (haveSecurity ? 0x0000000000002000 : 0) | // EL3 842 if (scr.ns && (cpsr.mode != MODE_MON) && ELIs32(tc, EL3)) { 1387 // AArch64 TLB Invalidate All, EL3 1392 TLBIALL tlbiOp(EL3, true); 1396 // AArch64 TLB Invalidate All, EL3, Inner Shareable 1401 TLBIALL tlbiOp(EL3, true); 1446 // AArch64 TLB Invalidate by VA, EL3 [all...] |
H A D | system.cc | 242 case EL3:
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H A D | pagetable.hh | 224 if (target_el == EL2 || target_el == EL3) {
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H A D | faults.cc | 332 case EL3: 358 case EL3: 374 case EL3: 438 toEL = EL3; 633 case EL3: 962 if (toEL == EL3) {
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H A D | tlb.cc | 963 case EL3: 1335 case EL3: 1438 return EL3;
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H A D | pmu.cc | 515 case EL3:
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H A D | table_walker.hh | 558 if (currState->el == EL2 || currState->el == EL3) { 560 // in AArch64 EL2 and EL3
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H A D | isa.hh | 487 case EL3:
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H A D | table_walker.cc | 282 case EL3: 841 case EL3: 1404 case EL3:
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H A D | miscregs.cc | 1127 if (highest_el == EL2 || highest_el == EL3) 1132 if (highest_el == EL3) 1147 case EL3: 1191 case EL3: 2856 // EL3 (aarch32EL3 = true). It is false if EL3 is not implemented, or it
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/gem5/src/arch/arm/insts/ |
H A D | static_inst.cc | 657 case EL3: 679 return advSIMDFPAccessTrap64(EL3); 714 if (have_security && !ELIs64(tc, EL3) && !is_secure) { 743 if (have_security && !ELIs64(tc, EL3) && !is_secure) { 765 if (have_security && ELIs64(tc, EL3)) { 768 return advSIMDFPAccessTrap64(EL3); 791 case EL3: 830 case EL3: 862 case EL3: 893 ArmSystem::haveEL(tc, EL3) [all...] |
H A D | misc64.cc | 109 if ((ArmSystem::haveSecurity(tc) && el <= EL3) &&
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/gem5/src/dev/arm/ |
H A D | gic_v3_cpu_interface.cc | 202 // Interrupt Group 1 Enable register EL3 226 if (haveEL(EL3) && !inSecureState() && 362 if (haveEL(EL3) && !inSecureState() && 535 // System Register Enable Register EL3 540 * (EL1 accesses to ICC_SRE_EL1 do not trap to EL3. 541 * EL2 accesses to ICC_SRE_EL1 and ICC_SRE_EL2 do not trap to EL3. 883 !(!inSecureState() or (currEL() == EL3))) { 972 case EL3: 1069 if (haveEL(EL3) && !isEL3OrMon() && icc_ctlr_el1_s.CBPR) { 1081 if (haveEL(EL3) [all...] |
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