Searched refs:imm (Results 26 - 48 of 48) sorted by relevance

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/gem5/src/arch/arm/insts/
H A Dbranch.cc60 printTarget(ss, pc + imm, symtab);
H A Dmacromem.hh116 uint32_t imm; member in class:ArmISA::MicroNeonMemOp
122 dest(_dest), ura(_ura), imm(_imm),
296 int32_t imm; member in class:ArmISA::MicroIntImmOp
301 ura(_ura), urb(_urb), imm(_imm)
313 int64_t imm; member in class:ArmISA::MicroIntImmXOp
318 ura(_ura), urb(_urb), imm(_imm)
410 int32_t imm; member in class:ArmISA::MicroMemPairOp
417 dest(_dreg1), dest2(_dreg2), urb(_base), up(_up), imm(_imm),
452 bool exclusive, bool acrel, int64_t imm, AddrMode mode,
460 bool load, IntRegIndex dest, IntRegIndex base, int64_t imm);
[all...]
H A Dmisc.cc133 ccprintf(ss, ", #%#x", imm);
178 ccprintf(ss, "#%d", imm);
188 ccprintf(ss, ", #%d", imm);
213 ccprintf(ss, ", #%d", imm);
253 ccprintf(ss, ", #%d", imm);
307 ccprintf(ss, ", #%d, ", imm);
318 ccprintf(ss, ", #%d, ", imm);
H A Ddata64.cc50 INTREG_ZERO, INTREG_ZERO, 0, LSL, imm);
60 ccprintf(ss, ", #%d", imm);
101 ccprintf(ss, ", #%d", imm);
140 ccprintf(ss, ", #%d", imm);
166 ccprintf(ss, ", #%d, #%d", imm, defCc);
H A Dsve_macromem.hh201 int64_t imm; member in class:ArmISA::SveLdStructSI
209 dest(_dest), gp(_gp), base(_base), imm(_imm), numregs(_numregs)
256 if (imm != 0) {
257 ccprintf(ss, ", #%d, MUL VL", imm);
273 int64_t imm; member in class:ArmISA::SveStStructSI
281 dest(_dest), gp(_gp), base(_base), imm(_imm), numregs(_numregs)
329 if (imm != 0) {
330 ccprintf(ss, ", #%d, MUL VL", imm);
346 uint64_t imm; member in class:ArmISA::SveIndexedMemVI
353 dest(_dest), gp(_gp), base(_base), imm(_im
[all...]
H A Dpred_inst.hh237 uint32_t imm; member in class:ArmISA::PredImmOp
245 imm(machInst.imm), rotated_imm(0), rotated_carry(0),
248 rotated_imm = rotate_imm(imm, rotate);
282 uint32_t imm; member in class:ArmISA::DataImmOp
290 dest(_dest), op1(_op1), imm(_imm), rotC(_rotC)
H A Dmisc64.cc49 ccprintf(ss, "#0x%x", imm);
76 ccprintf(ss, ", #%d", imm);
329 return imm & 0x1;
331 return (imm & 0x1) << 22;
344 ccprintf(ss, "#0x%x", imm);
380 Fault fault = trap(tc, miscReg, el, imm);
H A Dmem64.hh53 uint64_t imm; member in class:ArmISA::SysDC64
58 base(_base), dest(_dest), imm(_imm)
135 int64_t imm; member in class:ArmISA::MemoryImm64
139 : Memory64(mnem, _machInst, __opClass, _dest, _base), imm(_imm)
253 int64_t imm; member in class:ArmISA::MemoryLiteral64
257 : Memory64(mnem, _machInst, __opClass, _dest, INTREG_ZERO), imm(_imm)
H A Dmacromem.cc245 int64_t imm, AddrMode mode,
266 post ? 0 : imm);
334 post ? imm : 0);
349 IntRegIndex base, int64_t imm) :
358 *uop = new MicroLdFp16Uop(machInst, dest, base, imm);
360 *uop = new MicroStrQBFpXImmUop(machInst, dest, base, imm);
362 *++uop = new MicroStrQTFpXImmUop(machInst, dest, base, imm);
370 IntRegIndex base, int64_t imm) :
384 *uop = new MicroAddXiUop(machInst, base, base, imm);
396 IntRegIndex base, int64_t imm)
242 PairMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, uint32_t size, bool fp, bool load, bool noAlloc, bool signExt, bool exclusive, bool acrel, int64_t imm, AddrMode mode, IntRegIndex rn, IntRegIndex rt, IntRegIndex rt2) argument
347 BigFpMemImmOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, bool load, IntRegIndex dest, IntRegIndex base, int64_t imm) argument
368 BigFpMemPostOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, bool load, IntRegIndex dest, IntRegIndex base, int64_t imm) argument
394 BigFpMemPreOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, bool load, IntRegIndex dest, IntRegIndex base, int64_t imm) argument
420 BigFpMemRegOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, bool load, IntRegIndex dest, IntRegIndex base, IntRegIndex offset, ArmExtendType type, int64_t imm) argument
446 BigFpMemLitOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex dest, int64_t imm) argument
[all...]
H A Dvfp.hh265 vfpFpToFixed(T val, bool isSigned, uint8_t width, uint8_t imm, bool argument
301 val = val * pow(2.0, imm);
435 uint64_t val, uint8_t width, uint8_t imm);
437 int64_t val, uint8_t width, uint8_t imm);
440 uint64_t val, uint8_t width, uint8_t imm);
442 int64_t val, uint8_t width, uint8_t imm);
939 uint64_t imm; member in class:ArmISA::FpRegImmOp
944 FpOp(mnem, _machInst, __opClass), dest(_dest), imm(_imm)
958 uint64_t imm; member in class:ArmISA::FpRegRegImmOp
963 FpOp(mnem, _machInst, __opClass), dest(_dest), op1(_op1), imm(_im
1040 uint64_t imm; member in class:ArmISA::FpRegRegRegImmOp
[all...]
H A Dvfp.cc96 ccprintf(ss, ", #%d", imm);
108 ccprintf(ss, ", #%d", imm);
165 ccprintf(ss, ", #%d", imm);
666 uint64_t val, uint8_t width, uint8_t imm)
675 float scale = powf(2.0, imm);
684 int64_t val, uint8_t width, uint8_t imm)
694 float scale = powf(2.0, imm);
704 uint64_t val, uint8_t width, uint8_t imm)
714 double scale = pow(2.0, imm);
723 int64_t val, uint8_t width, uint8_t imm)
665 vfpUFixedToFpS(bool flush, bool defaultNan, uint64_t val, uint8_t width, uint8_t imm) argument
683 vfpSFixedToFpS(bool flush, bool defaultNan, int64_t val, uint8_t width, uint8_t imm) argument
703 vfpUFixedToFpD(bool flush, bool defaultNan, uint64_t val, uint8_t width, uint8_t imm) argument
722 vfpSFixedToFpD(bool flush, bool defaultNan, int64_t val, uint8_t width, uint8_t imm) argument
[all...]
H A Dmem.hh210 int32_t imm; member in class:ArmISA::MemoryImm
214 : Memory(mnem, _machInst, __opClass, _dest, _base, _add), imm(_imm)
220 int32_t pImm = imm;
H A Dstatic_inst.hh191 uint64_t imm) const;
382 Fault softwareBreakpoint32(ExecContext *xc, uint16_t imm) const;
H A Dstatic_inst.cc592 ArmShiftType type, uint64_t imm) const
614 ccprintf(os, "#%ld", imm);
630 ArmStaticInst::softwareBreakpoint32(ExecContext *xc, uint16_t imm) const
639 return std::make_shared<SoftwareBreakpoint>(machInst, imm);
/gem5/src/arch/power/insts/
H A Dinteger.hh106 int32_t imm; member in class:PowerISA::IntImmOp
112 imm(sext<16>(machInst.si)),
H A Dinteger.cc113 ss << ", " << (int32_t)imm;
/gem5/src/arch/sparc/insts/
H A Dbranch.cc69 ccprintf(response, "0x%x", imm);
H A Dpriv.cc96 ccprintf(response, "%#x, %%%s", imm, regName);
/gem5/src/cpu/pred/
H A Dtage_sc_l_64KB.cc60 imm(p->imm)
65 initGEHLTable(imnb, imm, imgehl, logImnb, wim, 0);
119 branch_pc, sh->imHist[scHistory->imliCount], imm,
186 gUpdate(pc, taken, sh->imHist[scHistory->imliCount], imm,
H A Dtage_sc_l_64KB.hh98 std::vector<int> imm; member in class:TAGE_SC_L_64KB_StatisticalCorrector
H A DBranchPredictor.py424 imm = VectorParam.Int([10, 4], "Second IMLI history GEHL lengths") variable in class:TAGE_SC_L_64KB_StatisticalCorrector
/gem5/tests/test-progs/asmtest/src/riscv/isa/macros/scalar/
H A Dtest_macros.h46 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
49 inst x30, x1, SEXT_IMM(imm); \
52 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
55 inst x1, x1, SEXT_IMM(imm); \
58 #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
62 inst x30, x1, SEXT_IMM(imm); \
70 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
75 inst x30, x1, SEXT_IMM(imm); \
81 #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
83 inst x1, x0, SEXT_IMM(imm); \
[all...]
/gem5/src/arch/arm/
H A Dtypes.hh142 Bitfield<7, 0> imm; member in namespace:ArmISA

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