17202Sgblack@eecs.umich.edu/* 212504Snikos.nikoleris@arm.com * Copyright (c) 2010, 2012-2013, 2017-2018 ARM Limited 39913Ssteve.reinhardt@amd.com * Copyright (c) 2013 Advanced Micro Devices, Inc. 47202Sgblack@eecs.umich.edu * All rights reserved 57202Sgblack@eecs.umich.edu * 67202Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 77202Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 87202Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 97202Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 107202Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 117202Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 127202Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 137202Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 147202Sgblack@eecs.umich.edu * 157202Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 167202Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 177202Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 187202Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 197202Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 207202Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 217202Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 227202Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 237202Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 247202Sgblack@eecs.umich.edu * this software without specific prior written permission. 257202Sgblack@eecs.umich.edu * 267202Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 277202Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 287202Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 297202Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 307202Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 317202Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 327202Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 337202Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 347202Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 357202Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 367202Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 377202Sgblack@eecs.umich.edu * 387202Sgblack@eecs.umich.edu * Authors: Gabe Black 397202Sgblack@eecs.umich.edu */ 407202Sgblack@eecs.umich.edu 417202Sgblack@eecs.umich.edu#include "arch/arm/insts/misc.hh" 4211793Sbrandon.potter@amd.com 439913Ssteve.reinhardt@amd.com#include "cpu/reg_class.hh" 447202Sgblack@eecs.umich.edu 457202Sgblack@eecs.umich.edustd::string 467202Sgblack@eecs.umich.eduMrsOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 477202Sgblack@eecs.umich.edu{ 487202Sgblack@eecs.umich.edu std::stringstream ss; 497202Sgblack@eecs.umich.edu printMnemonic(ss); 5012104Snathanael.premillieu@arm.com printIntReg(ss, dest); 517202Sgblack@eecs.umich.edu ss << ", "; 527202Sgblack@eecs.umich.edu bool foundPsr = false; 537202Sgblack@eecs.umich.edu for (unsigned i = 0; i < numSrcRegs(); i++) { 5412106SRekai.GonzalezAlberquilla@arm.com const RegId& reg = srcRegIdx(i); 5512106SRekai.GonzalezAlberquilla@arm.com if (!reg.isMiscReg()) { 567202Sgblack@eecs.umich.edu continue; 577202Sgblack@eecs.umich.edu } 5812106SRekai.GonzalezAlberquilla@arm.com if (reg.index() == MISCREG_CPSR) { 597202Sgblack@eecs.umich.edu ss << "cpsr"; 607202Sgblack@eecs.umich.edu foundPsr = true; 617202Sgblack@eecs.umich.edu break; 627202Sgblack@eecs.umich.edu } 6312106SRekai.GonzalezAlberquilla@arm.com if (reg.index() == MISCREG_SPSR) { 647202Sgblack@eecs.umich.edu ss << "spsr"; 657202Sgblack@eecs.umich.edu foundPsr = true; 667202Sgblack@eecs.umich.edu break; 677202Sgblack@eecs.umich.edu } 687202Sgblack@eecs.umich.edu } 697202Sgblack@eecs.umich.edu if (!foundPsr) { 707202Sgblack@eecs.umich.edu ss << "????"; 717202Sgblack@eecs.umich.edu } 727202Sgblack@eecs.umich.edu return ss.str(); 737202Sgblack@eecs.umich.edu} 747202Sgblack@eecs.umich.edu 757202Sgblack@eecs.umich.eduvoid 767202Sgblack@eecs.umich.eduMsrBase::printMsrBase(std::ostream &os) const 777202Sgblack@eecs.umich.edu{ 787202Sgblack@eecs.umich.edu printMnemonic(os); 797202Sgblack@eecs.umich.edu bool apsr = false; 807202Sgblack@eecs.umich.edu bool foundPsr = false; 817202Sgblack@eecs.umich.edu for (unsigned i = 0; i < numDestRegs(); i++) { 8212106SRekai.GonzalezAlberquilla@arm.com const RegId& reg = destRegIdx(i); 8312106SRekai.GonzalezAlberquilla@arm.com if (!reg.isMiscReg()) { 847202Sgblack@eecs.umich.edu continue; 857202Sgblack@eecs.umich.edu } 8612106SRekai.GonzalezAlberquilla@arm.com if (reg.index() == MISCREG_CPSR) { 877202Sgblack@eecs.umich.edu os << "cpsr_"; 887202Sgblack@eecs.umich.edu foundPsr = true; 897202Sgblack@eecs.umich.edu break; 907202Sgblack@eecs.umich.edu } 9112106SRekai.GonzalezAlberquilla@arm.com if (reg.index() == MISCREG_SPSR) { 927202Sgblack@eecs.umich.edu if (bits(byteMask, 1, 0)) { 937202Sgblack@eecs.umich.edu os << "spsr_"; 947202Sgblack@eecs.umich.edu } else { 957202Sgblack@eecs.umich.edu os << "apsr_"; 967202Sgblack@eecs.umich.edu apsr = true; 977202Sgblack@eecs.umich.edu } 987202Sgblack@eecs.umich.edu foundPsr = true; 997202Sgblack@eecs.umich.edu break; 1007202Sgblack@eecs.umich.edu } 1017202Sgblack@eecs.umich.edu } 1027202Sgblack@eecs.umich.edu if (!foundPsr) { 1037202Sgblack@eecs.umich.edu os << "????"; 1047202Sgblack@eecs.umich.edu return; 1057202Sgblack@eecs.umich.edu } 1067202Sgblack@eecs.umich.edu if (bits(byteMask, 3)) { 1077202Sgblack@eecs.umich.edu if (apsr) { 1087202Sgblack@eecs.umich.edu os << "nzcvq"; 1097202Sgblack@eecs.umich.edu } else { 1107202Sgblack@eecs.umich.edu os << "f"; 1117202Sgblack@eecs.umich.edu } 1127202Sgblack@eecs.umich.edu } 1137202Sgblack@eecs.umich.edu if (bits(byteMask, 2)) { 1147202Sgblack@eecs.umich.edu if (apsr) { 1157202Sgblack@eecs.umich.edu os << "g"; 1167202Sgblack@eecs.umich.edu } else { 1177202Sgblack@eecs.umich.edu os << "s"; 1187202Sgblack@eecs.umich.edu } 1197202Sgblack@eecs.umich.edu } 1207202Sgblack@eecs.umich.edu if (bits(byteMask, 1)) { 1217202Sgblack@eecs.umich.edu os << "x"; 1227202Sgblack@eecs.umich.edu } 1237202Sgblack@eecs.umich.edu if (bits(byteMask, 0)) { 1247202Sgblack@eecs.umich.edu os << "c"; 1257202Sgblack@eecs.umich.edu } 1267202Sgblack@eecs.umich.edu} 1277202Sgblack@eecs.umich.edu 1287202Sgblack@eecs.umich.edustd::string 1297202Sgblack@eecs.umich.eduMsrImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 1307202Sgblack@eecs.umich.edu{ 1317202Sgblack@eecs.umich.edu std::stringstream ss; 1327202Sgblack@eecs.umich.edu printMsrBase(ss); 1337202Sgblack@eecs.umich.edu ccprintf(ss, ", #%#x", imm); 1347202Sgblack@eecs.umich.edu return ss.str(); 1357202Sgblack@eecs.umich.edu} 1367202Sgblack@eecs.umich.edu 1377202Sgblack@eecs.umich.edustd::string 1387202Sgblack@eecs.umich.eduMsrRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 1397202Sgblack@eecs.umich.edu{ 1407202Sgblack@eecs.umich.edu std::stringstream ss; 1417202Sgblack@eecs.umich.edu printMsrBase(ss); 1427202Sgblack@eecs.umich.edu ss << ", "; 14312104Snathanael.premillieu@arm.com printIntReg(ss, op1); 1447202Sgblack@eecs.umich.edu return ss.str(); 1457202Sgblack@eecs.umich.edu} 1467208Sgblack@eecs.umich.edu 1477208Sgblack@eecs.umich.edustd::string 14810037SARM gem5 DevelopersMrrcOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 14910037SARM gem5 Developers{ 15010037SARM gem5 Developers std::stringstream ss; 15110037SARM gem5 Developers printMnemonic(ss); 15212104Snathanael.premillieu@arm.com printIntReg(ss, dest); 15310037SARM gem5 Developers ss << ", "; 15412104Snathanael.premillieu@arm.com printIntReg(ss, dest2); 15510037SARM gem5 Developers ss << ", "; 15612638Sgiacomo.travaglini@arm.com printMiscReg(ss, op1); 15710037SARM gem5 Developers return ss.str(); 15810037SARM gem5 Developers} 15910037SARM gem5 Developers 16010037SARM gem5 Developersstd::string 16110037SARM gem5 DevelopersMcrrOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 16210037SARM gem5 Developers{ 16310037SARM gem5 Developers std::stringstream ss; 16410037SARM gem5 Developers printMnemonic(ss); 16512638Sgiacomo.travaglini@arm.com printMiscReg(ss, dest); 16610037SARM gem5 Developers ss << ", "; 16712104Snathanael.premillieu@arm.com printIntReg(ss, op1); 16810037SARM gem5 Developers ss << ", "; 16912104Snathanael.premillieu@arm.com printIntReg(ss, op2); 17010037SARM gem5 Developers return ss.str(); 17110037SARM gem5 Developers} 17210037SARM gem5 Developers 17310037SARM gem5 Developersstd::string 1747306Sgblack@eecs.umich.eduImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 1757306Sgblack@eecs.umich.edu{ 1767306Sgblack@eecs.umich.edu std::stringstream ss; 1777306Sgblack@eecs.umich.edu printMnemonic(ss); 1787306Sgblack@eecs.umich.edu ccprintf(ss, "#%d", imm); 1797306Sgblack@eecs.umich.edu return ss.str(); 1807306Sgblack@eecs.umich.edu} 1817306Sgblack@eecs.umich.edu 1827306Sgblack@eecs.umich.edustd::string 1837332Sgblack@eecs.umich.eduRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 1847332Sgblack@eecs.umich.edu{ 1857332Sgblack@eecs.umich.edu std::stringstream ss; 1867332Sgblack@eecs.umich.edu printMnemonic(ss); 18712104Snathanael.premillieu@arm.com printIntReg(ss, dest); 1887332Sgblack@eecs.umich.edu ccprintf(ss, ", #%d", imm); 1897332Sgblack@eecs.umich.edu return ss.str(); 1907332Sgblack@eecs.umich.edu} 1917332Sgblack@eecs.umich.edu 1927332Sgblack@eecs.umich.edustd::string 1937261Sgblack@eecs.umich.eduRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 1947208Sgblack@eecs.umich.edu{ 1957208Sgblack@eecs.umich.edu std::stringstream ss; 1967208Sgblack@eecs.umich.edu printMnemonic(ss); 19712104Snathanael.premillieu@arm.com printIntReg(ss, dest); 1987208Sgblack@eecs.umich.edu ss << ", "; 19912104Snathanael.premillieu@arm.com printIntReg(ss, op1); 2007208Sgblack@eecs.umich.edu return ss.str(); 2017208Sgblack@eecs.umich.edu} 2027225Sgblack@eecs.umich.edu 2037225Sgblack@eecs.umich.edustd::string 2047233Sgblack@eecs.umich.eduRegRegRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 2057233Sgblack@eecs.umich.edu{ 2067233Sgblack@eecs.umich.edu std::stringstream ss; 2077233Sgblack@eecs.umich.edu printMnemonic(ss); 20812104Snathanael.premillieu@arm.com printIntReg(ss, dest); 2097233Sgblack@eecs.umich.edu ss << ", "; 21012104Snathanael.premillieu@arm.com printIntReg(ss, op1); 2117233Sgblack@eecs.umich.edu ss << ", "; 21212104Snathanael.premillieu@arm.com printIntReg(ss, op2); 2137233Sgblack@eecs.umich.edu ccprintf(ss, ", #%d", imm); 2147233Sgblack@eecs.umich.edu return ss.str(); 2157233Sgblack@eecs.umich.edu} 2167233Sgblack@eecs.umich.edu 2177233Sgblack@eecs.umich.edustd::string 2187241Sgblack@eecs.umich.eduRegRegRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 2197241Sgblack@eecs.umich.edu{ 2207241Sgblack@eecs.umich.edu std::stringstream ss; 2217241Sgblack@eecs.umich.edu printMnemonic(ss); 22212104Snathanael.premillieu@arm.com printIntReg(ss, dest); 2237241Sgblack@eecs.umich.edu ss << ", "; 22412104Snathanael.premillieu@arm.com printIntReg(ss, op1); 2257241Sgblack@eecs.umich.edu ss << ", "; 22612104Snathanael.premillieu@arm.com printIntReg(ss, op2); 2277241Sgblack@eecs.umich.edu ss << ", "; 22812104Snathanael.premillieu@arm.com printIntReg(ss, op3); 2297241Sgblack@eecs.umich.edu return ss.str(); 2307241Sgblack@eecs.umich.edu} 2317241Sgblack@eecs.umich.edu 2327241Sgblack@eecs.umich.edustd::string 2337238Sgblack@eecs.umich.eduRegRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 2347238Sgblack@eecs.umich.edu{ 2357238Sgblack@eecs.umich.edu std::stringstream ss; 2367238Sgblack@eecs.umich.edu printMnemonic(ss); 23712104Snathanael.premillieu@arm.com printIntReg(ss, dest); 2387238Sgblack@eecs.umich.edu ss << ", "; 23912104Snathanael.premillieu@arm.com printIntReg(ss, op1); 2407238Sgblack@eecs.umich.edu ss << ", "; 24112104Snathanael.premillieu@arm.com printIntReg(ss, op2); 2427238Sgblack@eecs.umich.edu return ss.str(); 2437238Sgblack@eecs.umich.edu} 2447238Sgblack@eecs.umich.edu 2457238Sgblack@eecs.umich.edustd::string 2467331Sgblack@eecs.umich.eduRegRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 2477331Sgblack@eecs.umich.edu{ 2487331Sgblack@eecs.umich.edu std::stringstream ss; 2497331Sgblack@eecs.umich.edu printMnemonic(ss); 25012104Snathanael.premillieu@arm.com printIntReg(ss, dest); 2517331Sgblack@eecs.umich.edu ss << ", "; 25212104Snathanael.premillieu@arm.com printIntReg(ss, op1); 2537331Sgblack@eecs.umich.edu ccprintf(ss, ", #%d", imm); 2547331Sgblack@eecs.umich.edu return ss.str(); 2557331Sgblack@eecs.umich.edu} 2567331Sgblack@eecs.umich.edu 2577331Sgblack@eecs.umich.edustd::string 25810418Sandreas.hansson@arm.comMiscRegRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 25910418Sandreas.hansson@arm.com{ 26010418Sandreas.hansson@arm.com std::stringstream ss; 26110418Sandreas.hansson@arm.com printMnemonic(ss); 26212281Sgiacomo.travaglini@arm.com printMiscReg(ss, dest); 26310418Sandreas.hansson@arm.com ss << ", "; 26412104Snathanael.premillieu@arm.com printIntReg(ss, op1); 26510418Sandreas.hansson@arm.com return ss.str(); 26610418Sandreas.hansson@arm.com} 26710418Sandreas.hansson@arm.com 26810418Sandreas.hansson@arm.comstd::string 26910418Sandreas.hansson@arm.comRegMiscRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 27010418Sandreas.hansson@arm.com{ 27110418Sandreas.hansson@arm.com std::stringstream ss; 27210418Sandreas.hansson@arm.com printMnemonic(ss); 27312104Snathanael.premillieu@arm.com printIntReg(ss, dest); 27410418Sandreas.hansson@arm.com ss << ", "; 27512281Sgiacomo.travaglini@arm.com printMiscReg(ss, op1); 27610418Sandreas.hansson@arm.com return ss.str(); 27710418Sandreas.hansson@arm.com} 27810418Sandreas.hansson@arm.com 27910418Sandreas.hansson@arm.comstd::string 28010037SARM gem5 DevelopersRegImmImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 28110037SARM gem5 Developers{ 28210037SARM gem5 Developers std::stringstream ss; 28310037SARM gem5 Developers printMnemonic(ss); 28412104Snathanael.premillieu@arm.com printIntReg(ss, dest); 28510037SARM gem5 Developers ccprintf(ss, ", #%d, #%d", imm1, imm2); 28610037SARM gem5 Developers return ss.str(); 28710037SARM gem5 Developers} 28810037SARM gem5 Developers 28910037SARM gem5 Developersstd::string 2907253Sgblack@eecs.umich.eduRegRegImmImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 2917253Sgblack@eecs.umich.edu{ 2927253Sgblack@eecs.umich.edu std::stringstream ss; 2937253Sgblack@eecs.umich.edu printMnemonic(ss); 29412104Snathanael.premillieu@arm.com printIntReg(ss, dest); 2957253Sgblack@eecs.umich.edu ss << ", "; 29612104Snathanael.premillieu@arm.com printIntReg(ss, op1); 2977253Sgblack@eecs.umich.edu ccprintf(ss, ", #%d, #%d", imm1, imm2); 2987253Sgblack@eecs.umich.edu return ss.str(); 2997253Sgblack@eecs.umich.edu} 3007253Sgblack@eecs.umich.edu 3017253Sgblack@eecs.umich.edustd::string 3027232Sgblack@eecs.umich.eduRegImmRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 3037225Sgblack@eecs.umich.edu{ 3047225Sgblack@eecs.umich.edu std::stringstream ss; 3057225Sgblack@eecs.umich.edu printMnemonic(ss); 30612104Snathanael.premillieu@arm.com printIntReg(ss, dest); 3077232Sgblack@eecs.umich.edu ccprintf(ss, ", #%d, ", imm); 30812104Snathanael.premillieu@arm.com printIntReg(ss, op1); 3097225Sgblack@eecs.umich.edu return ss.str(); 3107225Sgblack@eecs.umich.edu} 3117225Sgblack@eecs.umich.edu 3127225Sgblack@eecs.umich.edustd::string 3137232Sgblack@eecs.umich.eduRegImmRegShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 3147225Sgblack@eecs.umich.edu{ 3157225Sgblack@eecs.umich.edu std::stringstream ss; 3167225Sgblack@eecs.umich.edu printMnemonic(ss); 31712104Snathanael.premillieu@arm.com printIntReg(ss, dest); 3187232Sgblack@eecs.umich.edu ccprintf(ss, ", #%d, ", imm); 3197225Sgblack@eecs.umich.edu printShiftOperand(ss, op1, true, shiftAmt, INTREG_ZERO, shiftType); 32012104Snathanael.premillieu@arm.com printIntReg(ss, op1); 3217225Sgblack@eecs.umich.edu return ss.str(); 3227225Sgblack@eecs.umich.edu} 3237409Sgblack@eecs.umich.edu 3247409Sgblack@eecs.umich.edustd::string 3257409Sgblack@eecs.umich.eduUnknownOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 3267409Sgblack@eecs.umich.edu{ 32713895Sgiacomo.travaglini@arm.com return csprintf("%-10s (inst %#08x)", "unknown", encoding()); 3287409Sgblack@eecs.umich.edu} 32913574Sgiacomo.travaglini@arm.com 33013574Sgiacomo.travaglini@arm.comMcrMrcMiscInst::McrMrcMiscInst(const char *_mnemonic, ExtMachInst _machInst, 33113574Sgiacomo.travaglini@arm.com uint64_t _iss, MiscRegIndex _miscReg) 33213574Sgiacomo.travaglini@arm.com : ArmStaticInst(_mnemonic, _machInst, No_OpClass) 33313574Sgiacomo.travaglini@arm.com{ 33413574Sgiacomo.travaglini@arm.com flags[IsNonSpeculative] = true; 33513574Sgiacomo.travaglini@arm.com iss = _iss; 33613574Sgiacomo.travaglini@arm.com miscReg = _miscReg; 33713574Sgiacomo.travaglini@arm.com} 33813574Sgiacomo.travaglini@arm.com 33913574Sgiacomo.travaglini@arm.comFault 34013574Sgiacomo.travaglini@arm.comMcrMrcMiscInst::execute(ExecContext *xc, Trace::InstRecord *traceData) const 34113574Sgiacomo.travaglini@arm.com{ 34213999Sgiacomo.travaglini@arm.com bool hypTrap = mcrMrc15TrapToHyp(miscReg, xc->tcBase(), iss); 34313574Sgiacomo.travaglini@arm.com 34413574Sgiacomo.travaglini@arm.com if (hypTrap) { 34513574Sgiacomo.travaglini@arm.com return std::make_shared<HypervisorTrap>(machInst, iss, 34613574Sgiacomo.travaglini@arm.com EC_TRAPPED_CP15_MCR_MRC); 34713574Sgiacomo.travaglini@arm.com } else { 34813574Sgiacomo.travaglini@arm.com return NoFault; 34913574Sgiacomo.travaglini@arm.com } 35013574Sgiacomo.travaglini@arm.com} 35113574Sgiacomo.travaglini@arm.com 35213574Sgiacomo.travaglini@arm.comstd::string 35313574Sgiacomo.travaglini@arm.comMcrMrcMiscInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const 35413574Sgiacomo.travaglini@arm.com{ 35513574Sgiacomo.travaglini@arm.com return csprintf("%-10s (pipe flush)", mnemonic); 35613574Sgiacomo.travaglini@arm.com} 35713574Sgiacomo.travaglini@arm.com 35813574Sgiacomo.travaglini@arm.comMcrMrcImplDefined::McrMrcImplDefined(const char *_mnemonic, 35913574Sgiacomo.travaglini@arm.com ExtMachInst _machInst, uint64_t _iss, 36013574Sgiacomo.travaglini@arm.com MiscRegIndex _miscReg) 36113574Sgiacomo.travaglini@arm.com : McrMrcMiscInst(_mnemonic, _machInst, _iss, _miscReg) 36213574Sgiacomo.travaglini@arm.com{} 36313574Sgiacomo.travaglini@arm.com 36413574Sgiacomo.travaglini@arm.comFault 36513574Sgiacomo.travaglini@arm.comMcrMrcImplDefined::execute(ExecContext *xc, Trace::InstRecord *traceData) const 36613574Sgiacomo.travaglini@arm.com{ 36713999Sgiacomo.travaglini@arm.com bool hypTrap = mcrMrc15TrapToHyp(miscReg, xc->tcBase(), iss); 36813574Sgiacomo.travaglini@arm.com 36913574Sgiacomo.travaglini@arm.com if (hypTrap) { 37013574Sgiacomo.travaglini@arm.com return std::make_shared<HypervisorTrap>(machInst, iss, 37113574Sgiacomo.travaglini@arm.com EC_TRAPPED_CP15_MCR_MRC); 37213574Sgiacomo.travaglini@arm.com } else { 37313574Sgiacomo.travaglini@arm.com return std::make_shared<UndefinedInstruction>(machInst, false, 37413574Sgiacomo.travaglini@arm.com mnemonic); 37513574Sgiacomo.travaglini@arm.com } 37613574Sgiacomo.travaglini@arm.com} 37713574Sgiacomo.travaglini@arm.com 37813574Sgiacomo.travaglini@arm.comstd::string 37913574Sgiacomo.travaglini@arm.comMcrMrcImplDefined::generateDisassembly(Addr pc, 38013574Sgiacomo.travaglini@arm.com const SymbolTable *symtab) const 38113574Sgiacomo.travaglini@arm.com{ 38213574Sgiacomo.travaglini@arm.com return csprintf("%-10s (implementation defined)", mnemonic); 38313574Sgiacomo.travaglini@arm.com} 384