/gem5/configs/example/ |
H A D | ruby_random_test.py | 104 system = System(cpu = tester, mem_ranges = [AddrRange(options.mem_size)]) variable [all...] |
H A D | ruby_mem_test.py | 109 system = System(cpu = cpus, variable [all...] |
H A D | se.py | 176 system = System(cpu = [CPUClass(cpu_id=i) for i in range(np)], variable [all...] |
H A D | memtest.py | 226 system = System(physmem = SimpleMemory(), variable [all...] |
H A D | memcheck.py | 222 system = System(physmem = DDR3_1600_8x8()) variable [all...] |
H A D | garnet_synth_traffic.py | 117 system = System(cpu = cpus, mem_ranges = [AddrRange(options.mem_size)]) variable [all...] |
/gem5/configs/dram/ |
H A D | sweep.py | 96 system = System(membus = IOXBar(width = 32)) variable [all...] |
H A D | low_power_sweep.py | 92 system = System(membus = IOXBar(width = 32)) variable [all...] |
/gem5/src/dev/mips/ |
H A D | Malta.py | 55 system = Param.System(Parent.any, "system") variable in class:Malta
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H A D | malta.hh | 63 System *system; member in class:Malta
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/gem5/src/dev/virtio/ |
H A D | VirtIO.py | 54 system = Param.System(Parent.any, "system object") variable in class:VirtIODeviceBase
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/gem5/tests/gem5/memory/ |
H A D | simple-run.py | 68 system = System(cpu = cpu, physmem = MyMem(), variable [all...] |
/gem5/src/cpu/testers/memtest/ |
H A D | MemTest.py | 70 system = Param.System(Parent.any, "System this tester is part of") variable in class:MemTest
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/gem5/src/cpu/testers/directedtest/ |
H A D | RubyDirectedTester.py | 40 system = Param.System(Parent.any, "System we belong to") variable in class:DirectedGenerator
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/gem5/src/cpu/testers/rubytest/ |
H A D | RubyTester.py | 44 system = Param.System(Parent.any, "System we belong to") variable in class:RubyTester
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/gem5/src/mem/ruby/slicc_interface/ |
H A D | Controller.py | 73 system = Param.System(Parent.any, "system object parameter") variable in class:RubyController
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/gem5/src/systemc/tlm_bridge/ |
H A D | TlmBridge.py | 40 system = Param.System(Parent.any, "system") variable in class:Gem5ToTlmBridgeBase 52 system = Param.System(Parent.any, "system") variable in class:TlmToGem5BridgeBase
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/gem5/src/mem/probes/ |
H A D | mem_footprint.hh | 94 System *system; member in class:MemFootprintProbe
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/gem5/src/dev/x86/ |
H A D | Pc.py | 52 system = Param.System(Parent.any, "system") variable in class:Pc
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/gem5/src/cpu/testers/garnet_synthetic_traffic/ |
H A D | GarnetSyntheticTraffic.py | 57 system = Param.System(Parent.any, "System we belong to") variable in class:GarnetSyntheticTraffic
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/gem5/util/cxx_config/ |
H A D | main.cc | 280 System &system = config_manager->getObject<System>("system"); local
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/gem5/src/arch/alpha/ |
H A D | isa.hh | 61 System *system; member in class:AlphaISA::ISA
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/gem5/tests/gem5/cpu_tests/ |
H A D | run.py | 122 system = System() variable [all...] |
/gem5/src/cpu/testers/traffic_gen/ |
H A D | BaseTrafficGen.py | 67 system = Param.System(Parent.any, "System this generator is part of") variable in class:BaseTrafficGen
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/gem5/src/gpu-compute/ |
H A D | X86GPUTLB.py | 46 system = Param.System(Parent.any, "system object") variable in class:X86PagetableWalker
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