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38#
39# Authors: Ron Dreslinski
40#          Andreas Hansson
41
42from __future__ import print_function
43from __future__ import absolute_import
44
45import optparse
46import random
47import sys
48
49import m5
50from m5.objects import *
51
52# This example script stress tests the memory system by creating false
53# sharing in a tree topology. At the bottom of the tree is a shared
54# memory, and then at each level a number of testers are attached,
55# along with a number of caches that them selves fan out to subtrees
56# of testers and caches. Thus, it is possible to create a system with
57# arbitrarily deep cache hierarchies, sharing or no sharing of caches,
58# and testers not only at the L1s, but also at the L2s, L3s etc.
59
60parser = optparse.OptionParser()
61
62parser.add_option("-a", "--atomic", action="store_true",
63                  help="Use atomic (non-timing) mode")
64parser.add_option("-b", "--blocking", action="store_true",
65                  help="Use blocking caches")
66parser.add_option("-l", "--maxloads", metavar="N", default=0,
67                  help="Stop after N loads")
68parser.add_option("-m", "--maxtick", type="int", default=m5.MaxTick,
69                  metavar="T",
70                  help="Stop after T ticks")
71
72# The tree specification consists of two colon-separated lists of one
73# or more integers, one for the caches, and one for the testers. The
74# first integer is the number of caches/testers closest to main
75# memory. Each cache then fans out to a subtree. The last integer in
76# the list is the number of caches/testers associated with the
77# uppermost level of memory. The other integers (if any) specify the
78# number of caches/testers connected at each level of the crossbar
79# hierarchy. The tester string should have one element more than the
80# cache string as there should always be testers attached to the
81# uppermost caches.
82
83parser.add_option("-c", "--caches", type="string", default="2:2:1",
84                  help="Colon-separated cache hierarchy specification, "
85                  "see script comments for details "
86                  "[default: %default]")
87parser.add_option("--noncoherent-cache", action="store_true",
88                  help="Adds a non-coherent, last-level cache")
89parser.add_option("-t", "--testers", type="string", default="1:1:0:2",
90                  help="Colon-separated tester hierarchy specification, "
91                  "see script comments for details "
92                  "[default: %default]")
93parser.add_option("-f", "--functional", type="int", default=10,
94                  metavar="PCT",
95                  help="Target percentage of functional accesses "
96                  "[default: %default]")
97parser.add_option("-u", "--uncacheable", type="int", default=10,
98                  metavar="PCT",
99                  help="Target percentage of uncacheable accesses "
100                  "[default: %default]")
101parser.add_option("-r", "--random", action="store_true",
102                  help="Generate a random tree topology")
103parser.add_option("--progress", type="int", default=100000,
104                  metavar="NLOADS",
105                  help="Progress message interval "
106                  "[default: %default]")
107parser.add_option("--sys-clock", action="store", type="string",
108                  default='1GHz',
109                  help = """Top-level clock for blocks running at system
110                  speed""")
111
112(options, args) = parser.parse_args()
113
114if args:
115     print("Error: script doesn't take any positional arguments")
116     sys.exit(1)
117
118# Get the total number of testers
119def numtesters(cachespec, testerspec):
120     # Determine the tester multiplier for each level as the
121     # elements are per subsystem and it fans out
122     multiplier = [1]
123     for c in cachespec:
124          multiplier.append(multiplier[-1] * c)
125
126     total = 0
127     for t, m in zip(testerspec, multiplier):
128          total += t * m
129
130     return total
131
132block_size = 64
133
134# Start by parsing the command line options and do some basic sanity
135# checking
136if options.random:
137     # Generate a tree with a valid number of testers
138     while True:
139          tree_depth = random.randint(1, 4)
140          cachespec = [random.randint(1, 3) for i in range(tree_depth)]
141          testerspec = [random.randint(1, 3) for i in range(tree_depth + 1)]
142          if numtesters(cachespec, testerspec) < block_size:
143               break
144
145     print("Generated random tree -c", ':'.join(map(str, cachespec)),
146         "-t", ':'.join(map(str, testerspec)))
147else:
148     try:
149          cachespec = [int(x) for x in options.caches.split(':')]
150          testerspec = [int(x) for x in options.testers.split(':')]
151     except:
152          print("Error: Unable to parse caches or testers option")
153          sys.exit(1)
154
155     if len(cachespec) < 1:
156          print("Error: Must have at least one level of caches")
157          sys.exit(1)
158
159     if len(cachespec) != len(testerspec) - 1:
160          print("Error: Testers must have one element more than caches")
161          sys.exit(1)
162
163     if testerspec[-1] == 0:
164          print("Error: Must have testers at the uppermost level")
165          sys.exit(1)
166
167     for t in testerspec:
168          if t < 0:
169               print("Error: Cannot have a negative number of testers")
170               sys.exit(1)
171
172     for c in cachespec:
173          if c < 1:
174               print("Error: Must have 1 or more caches at each level")
175               sys.exit(1)
176
177     if numtesters(cachespec, testerspec) > block_size:
178          print("Error: Limited to %s testers because of false sharing"
179              % (block_size))
180          sys.exit(1)
181
182# Define a prototype L1 cache that we scale for all successive levels
183proto_l1 = Cache(size = '32kB', assoc = 4,
184                 tag_latency = 1, data_latency = 1, response_latency = 1,
185                 tgts_per_mshr = 8, clusivity = 'mostly_incl',
186                 writeback_clean = True)
187
188if options.blocking:
189     proto_l1.mshrs = 1
190else:
191     proto_l1.mshrs = 4
192
193cache_proto = [proto_l1]
194
195# Now add additional cache levels (if any) by scaling L1 params, the
196# first element is Ln, and the last element L1
197for scale in cachespec[:-1]:
198     # Clone previous level and update params
199     prev = cache_proto[0]
200     next = prev()
201     next.size = prev.size * scale
202     next.tag_latency = prev.tag_latency * 10
203     next.data_latency = prev.data_latency * 10
204     next.response_latency = prev.response_latency * 10
205     next.assoc = prev.assoc * scale
206     next.mshrs = prev.mshrs * scale
207
208     # Swap the inclusivity/exclusivity at each level. L2 is mostly
209     # exclusive with respect to L1, L3 mostly inclusive, L4 mostly
210     # exclusive etc.
211     next.writeback_clean = not prev.writeback_clean
212     if (prev.clusivity.value == 'mostly_incl'):
213          next.clusivity = 'mostly_excl'
214     else:
215          next.clusivity = 'mostly_incl'
216
217     cache_proto.insert(0, next)
218
219# Make a prototype for the tester to be used throughout
220proto_tester = MemTest(max_loads = options.maxloads,
221                       percent_functional = options.functional,
222                       percent_uncacheable = options.uncacheable,
223                       progress_interval = options.progress)
224
225# Set up the system along with a simple memory and reference memory
226system = System(physmem = SimpleMemory(),
227                cache_line_size = block_size)
228
229system.voltage_domain = VoltageDomain(voltage = '1V')
230
231system.clk_domain = SrcClockDomain(clock =  options.sys_clock,
232                        voltage_domain = system.voltage_domain)
233
234# For each level, track the next subsys index to use
235next_subsys_index = [0] * (len(cachespec) + 1)
236
237# Recursive function to create a sub-tree of the cache and tester
238# hierarchy
239def make_cache_level(ncaches, prototypes, level, next_cache):
240     global next_subsys_index, proto_l1, testerspec, proto_tester
241
242     index = next_subsys_index[level]
243     next_subsys_index[level] += 1
244
245     # Create a subsystem to contain the crossbar and caches, and
246     # any testers
247     subsys = SubSystem()
248     setattr(system, 'l%dsubsys%d' % (level, index), subsys)
249
250     # The levels are indexing backwards through the list
251     ntesters = testerspec[len(cachespec) - level]
252
253     # Scale the progress threshold as testers higher up in the tree
254     # (smaller level) get a smaller portion of the overall bandwidth,
255     # and also make the interval of packet injection longer for the
256     # testers closer to the memory (larger level) to prevent them
257     # hogging all the bandwidth
258     limit = (len(cachespec) - level + 1) * 100000000
259     testers = [proto_tester(interval = 10 * (level * level + 1),
260                             progress_check = limit) \
261                     for i in range(ntesters)]
262     if ntesters:
263          subsys.tester = testers
264
265     if level != 0:
266          # Create a crossbar and add it to the subsystem, note that
267          # we do this even with a single element on this level
268          xbar = L2XBar()
269          subsys.xbar = xbar
270          if next_cache:
271               xbar.master = next_cache.cpu_side
272
273          # Create and connect the caches, both the ones fanning out
274          # to create the tree, and the ones used to connect testers
275          # on this level
276          tree_caches = [prototypes[0]() for i in range(ncaches[0])]
277          tester_caches = [proto_l1() for i in range(ntesters)]
278
279          subsys.cache = tester_caches + tree_caches
280          for cache in tree_caches:
281               cache.mem_side = xbar.slave
282               make_cache_level(ncaches[1:], prototypes[1:], level - 1, cache)
283          for tester, cache in zip(testers, tester_caches):
284               tester.port = cache.cpu_side
285               cache.mem_side = xbar.slave
286     else:
287          if not next_cache:
288               print("Error: No next-level cache at top level")
289               sys.exit(1)
290
291          if ntesters > 1:
292               # Create a crossbar and add it to the subsystem
293               xbar = L2XBar()
294               subsys.xbar = xbar
295               xbar.master = next_cache.cpu_side
296               for tester in testers:
297                    tester.port = xbar.slave
298          else:
299               # Single tester
300               testers[0].port = next_cache.cpu_side
301
302# Top level call to create the cache hierarchy, bottom up
303make_cache_level(cachespec, cache_proto, len(cachespec), None)
304
305# Connect the lowest level crossbar to the last-level cache and memory
306# controller
307last_subsys = getattr(system, 'l%dsubsys0' % len(cachespec))
308last_subsys.xbar.point_of_coherency = True
309if options.noncoherent_cache:
310     system.llc = NoncoherentCache(size = '16MB', assoc = 16, tag_latency = 10,
311                                   data_latency = 10, sequential_access = True,
312                                   response_latency = 20, tgts_per_mshr = 8,
313                                   mshrs = 64)
314     last_subsys.xbar.master = system.llc.cpu_side
315     system.llc.mem_side = system.physmem.port
316else:
317     last_subsys.xbar.master = system.physmem.port
318
319root = Root(full_system = False, system = system)
320if options.atomic:
321    root.system.mem_mode = 'atomic'
322else:
323    root.system.mem_mode = 'timing'
324
325# The system port is never used in the tester so merely connect it
326# to avoid problems
327root.system.system_port = last_subsys.xbar.slave
328
329# Instantiate configuration
330m5.instantiate()
331
332# Simulate until program terminates
333exit_event = m5.simulate(options.maxtick)
334
335print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())
336