/gem5/src/cpu/minor/ |
H A D | lsq.cc | 67 request(), 74 request = std::make_shared<Request>(); 125 /* 'end' here means the address of the byte just past the request 145 return containsAddrRangeOf(request->getPaddr(), request->getSize(), 146 other_request->request->getPaddr(), other_request->request->getSize()); 164 DPRINTFS(MinorMem, (&port), "Setting state from %d to %d for request:" 269 " request: %s delayed:%d %s\n", *inst, isTranslationDelayed, 298 const auto &byteEnable = request 727 deleteRequest(LSQRequestPtr request) argument 741 insert(LSQRequestPtr request) argument 763 canForwardDataToLoad(LSQRequestPtr request, unsigned int &found_slot) argument 834 countIssuedStore(LSQRequestPtr request) argument 881 LSQRequestPtr request = *i; local 937 LSQRequestPtr request = slots[i]; local 959 tryToSendToTransfers(LSQRequestPtr request) argument 1164 tryToSend(LSQRequestPtr request) argument 1263 moveFromRequestsToTransfers(LSQRequestPtr request) argument 1289 LSQRequestPtr request = local 1482 LSQRequestPtr request = transfers.front(); local 1534 sendStoreToStoreBuffer(LSQRequestPtr request) argument 1598 LSQRequestPtr request; local 1651 LSQRequestPtr request = new FailedDataRequest(*this, inst); local 1679 makePacketForRequest(const RequestPtr &request, bool isLoad, Packet::SenderState *sender_state, PacketDataPtr data) argument 1765 threadSnoop(LSQRequestPtr request) argument [all...] |
H A D | fetch1.cc | 153 /* If line_offset != 0, a request is pushed for the remainder of the 165 FetchRequestPtr request = new FetchRequest(*this, request_id, thread.pc); local 171 request->request->setContext(cpu.threads[tid]->getTC()->contextId()); 172 request->request->setVirt(0 /* asid */, 177 DPRINTF(Fetch, "Submitting ITLB request\n"); 180 request->state = FetchRequest::InTranslation; 184 requests.push(request); 186 /* Submit the translation request 283 tryToSendToTransfers(FetchRequestPtr request) argument 322 moveFromRequestsToTransfers(FetchRequestPtr request) argument 331 tryToSend(FetchRequestPtr request) argument [all...] |
H A D | fetch1.hh | 85 * A request can be submitted by pushing it onto the requests queue after 95 * Responses from the memory system alter the request object (state 110 /** Progress of this request through address translation and 123 /** Identity of the line that this request will generate */ 128 * system, its request needs to have its packet updated as this may 132 /** The underlying request that this fetch represents */ 133 RequestPtr request; member in class:Minor::Fetch1::FetchRequest 164 * the request on to the ports' handleTLBResponse member 176 request(), 180 request [all...] |
H A D | lsq.hh | 128 /** Instruction which made this request */ 141 * request needs to have its packet updated as this 145 /** The underlying request of this LSQRequest */ 146 RequestPtr request; member in class:Minor::LSQ::LSQRequest 153 * request did not perform a memory transfer */ 208 /** Was no memory access attempted for this request? */ 211 /** Set this request as having been skipped before a memory 221 /** Does this request's address range fully cover the range 225 /** Start the address translation process for this request. This 226 * will issue a translation request t [all...] |
/gem5/src/cpu/kvm/ |
H A D | device.hh | 114 int ioctl(int request, long p1) const; 115 int ioctl(int request, void *p1) const { argument 116 return ioctl(request, (long)p1); 118 int ioctl(int request) const { 119 return ioctl(request, 0L);
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H A D | vm.hh | 223 * @param request KVM request 224 * @param p1 Optional request parameter 229 int ioctl(int request, long p1) const; 230 int ioctl(int request, void *p1) const { argument 231 return ioctl(request, (long)p1); 233 int ioctl(int request) const { 234 return ioctl(request, 0L); 505 * @param request KVM VM request 512 ioctl(int request, void *p1) const argument [all...] |
H A D | perfevent.hh | 349 * @param request PerfEvent request 350 * @param p1 Optional request parameter 355 int ioctl(int request, long p1); 356 int ioctl(int request, void *p1) { return ioctl(request, (long)p1); } argument 357 int ioctl(int request) { return ioctl(request, 0L); } argument
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H A D | device.cc | 119 KvmDevice::ioctl(int request, long p1) const argument 123 return ::ioctl(fd, request, p1);
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H A D | base.hh | 211 /** Timing MMIO request in flight or stalled. 214 * request is either stalled (and will be retried with recvReqRetry()) 215 * or it is in flight. After the timing request is complete, the CPU 442 * @return Number of ticks spent servicing the exit request 447 * The guest performed a legacy IO request (out/inp on x86) 449 * @return Number of ticks spent servicing the IO request 526 * Inject a memory mapped IO request into gem5 559 * @param request KVM vCPU request 560 * @param p1 Optional request paramete 566 ioctl(int request, void *p1) const argument [all...] |
H A D | perfevent.cc | 225 PerfKvmCounter::ioctl(int request, long p1) argument 228 return ::ioctl(fd, request, p1);
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H A D | vm.cc | 274 Kvm::ioctl(int request, long p1) const argument 278 return ::ioctl(kvmFD, request, p1); 577 KvmVM::ioctl(int request, long p1) const argument 581 return ::ioctl(vmFD, request, p1);
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/gem5/src/mem/ruby/system/ |
H A D | Sequencer.cc | 93 SequencerRequest* request = read->second; local 94 if (current_time - request->issue_time < m_deadlock_threshold) 98 "version: %d request.paddr: 0x%x m_readRequestTable: %d " 100 request->pkt->getAddr(), m_readRequestTable.size(), 101 current_time * clockPeriod(), request->issue_time * clockPeriod(), 102 (current_time * clockPeriod()) - (request->issue_time * clockPeriod())); 108 SequencerRequest* request = write->second; local 109 if (current_time - request->issue_time < m_deadlock_threshold) 113 "version: %d request.paddr: 0x%x m_writeRequestTable: %d " 115 request 265 handleLlsc(Addr address, SequencerRequest* request) argument 368 SequencerRequest* request = i->second; local 423 SequencerRequest* request = i->second; local [all...] |
H A D | GPUCoalescer.cc | 120 issueEvent([this]{ completeIssue(); }, "Issue coalesced request", 166 GPUCoalescerRequest* request = read->second; local 167 if (current_time - request->issue_time < m_deadlock_threshold) 171 "version: %d request.paddr: 0x%x m_readRequestTable: %d " 173 request->pkt->getAddr(), m_readRequestTable.size(), 174 current_time * clockPeriod(), request->issue_time * clockPeriod(), 175 (current_time - request->issue_time)*clockPeriod()); 181 GPUCoalescerRequest* request = write->second; local 182 if (current_time - request->issue_time < m_deadlock_threshold) 186 "version: %d request 412 handleLlsc(Addr address, GPUCoalescerRequest* request) argument 498 GPUCoalescerRequest* request = i->second; local 580 GPUCoalescerRequest* request = i->second; local 1175 GPUCoalescerRequest* request = i->second; local [all...] |
H A D | GPUCoalescer.hh | 43 #include "mem/request.hh" 184 void removeRequest(GPUCoalescerRequest* request); 234 void hitCallback(GPUCoalescerRequest* request, 242 void recordMissLatency(GPUCoalescerRequest* request, 256 bool handleLlsc(Addr address, GPUCoalescerRequest* request); 269 // We need to track both the primary and secondary request types. 270 // The secondary request type comprises a subset of RubyRequestTypes that 271 // are understood by the L1 Controller. A primary request type can be any 280 // Global outstanding request count, across all request table [all...] |
H A D | Sequencer.hh | 154 void hitCallback(SequencerRequest* request, DataBlock& data, 169 bool handleLlsc(Addr address, SequencerRequest* request); 192 // Global outstanding request count, across all request tables
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/gem5/src/dev/arm/ |
H A D | smmu_v3_transl.cc | 111 request = req; 129 beginTransaction(request); 131 smmu.runProcessTiming(this, request.pkt); 139 // But we need to wait for request data esp. in atomic mode. 145 const Addr next4k = (request.addr + 0x1000ULL) & ~0xfffULL; 147 if ((request.addr + request.size) > next4k) 149 request.addr, request.size); 152 unsigned numSlaveBeats = request [all...] |
H A D | smmu_v3_transl.hh | 97 SMMUTranslRequest request; member in class:SMMUTranslationProcess
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/gem5/ext/pybind11/tests/ |
H A D | test_numpy_vectorize.cpp | 86 std::array<py::buffer_info, 3> buffers {{ arg1.request(), arg2.request(), arg3.request() }};
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H A D | test_numpy_dtypes.cpp | 158 auto req = arr.request(); 168 const auto req = arr.request(); 196 auto req = arr.request(); 299 auto req = arr.request(); 310 auto req = arr.request(); 380 auto req = arr.request(); 462 m.def("buffer_to_dtype", [](py::buffer& buf) { return py::dtype(buf.request()); });
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/gem5/src/cpu/o3/ |
H A D | lsq.hh | 82 LSQSenderState(LSQRequest* request, bool isLoad_) argument 83 : _request(request), mainPkt(nullptr), pendingPacket(nullptr), 105 /** Has the request been deleted? 116 LSQRequest* request() { return _request; } function in class:LSQ::LSQSenderState 262 /** True if this is an atomic request */ 350 /** Install the request in the LQ/SQ. */ 380 * Notify the sender state that the request it points to is not valid 381 * anymore. Understand if the request is orphan (self-managed) and if 385 * but there is any in-flight translation request to the TLB or access 386 * request t 413 auto request = std::make_shared<Request>(_inst->getASID(), local 475 RequestPtr request(int idx = 0) { return _requests.at(idx); } function 478 request(int idx = 0) const function [all...] |
H A D | lsq_unit.hh | 100 /** The request. */ 142 LSQRequest* request() { return req; } function in class:LSQUnit::LSQEntry 165 /** Does this request write all zeros and thus doesn't 405 : LSQSenderState(idx_->request(), true), idx(idx_) { } 409 //virtual LSQRequest* request() { return idx->request(); } 414 // idx->request()->senderState(nullptr); 424 : LSQSenderState(idx_->request(), false), idx(idx_) { } 427 //virtual LSQRequest* request() { return idx->request(); } [all...] |
H A D | lsq_unit_impl.hh | 61 #include "mem/request.hh" 98 LSQRequest* req = senderState->request(); 101 /* Check that the request is still alive before any further action. */ 131 writeback(inst, state->request()->mainPacket()); 395 LSQRequest *req = iter->request(); 408 req = iter->request(); 710 storeWBIt->request()->sendPacketToCache(); 711 if (storeWBIt->request()->isSent()){ 757 LSQRequest* req = storeWBIt->request(); 786 req->request() [all...] |
/gem5/ext/sst/ |
H A D | ExtMaster.hh | 56 #include <mem/request.hh>
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H A D | ExtSlave.hh | 52 #include <mem/request.hh>
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/gem5/src/arch/x86/ |
H A D | pagetable_walker.cc | 65 #include "mem/request.hh" 74 // outstanding requests, see if this request can be coalesced with 127 // need to check if there is a waiting request to be serviced 208 // delete the current request if there are no inflight packets. 217 // check the next translation request, if it exists 523 RequestPtr request = std::make_shared<Request>( local 525 read = new Packet(request, MemCmd::ReadReq); 592 RequestPtr request = std::make_shared<Request>( local 595 read = new Packet(request, MemCmd::ReadReq);
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