/gem5/src/arch/alpha/ |
H A D | osfpal.cc | 34 PAL::name(int index) argument 234 if (index > NumCodes || index < 0) 237 return strings[index];
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/gem5/src/cpu/ |
H A D | intr_control.hh | 49 void clear(int cpu_id, int int_num, int index); 50 void post(int cpu_id, int int_num, int index); 53 clear(int int_num, int index = 0) 55 clear(0, int_num, index); 59 post(int int_num, int index = 0) 61 post(0, int_num, index);
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H A D | timebuf.hh | 49 std::vector<char *> index; member in class:TimeBuffer 64 int index; member in class:TimeBuffer::wire 69 index = idx; 73 : buffer(buf), index(i) 81 : buffer(i.buffer), index(i.index) 87 set(i.index); 99 set(index + offset); 105 set(index - offset); 111 set(index [all...] |
H A D | intr_control.cc | 50 IntrControl::post(int cpu_id, int int_num, int index) argument 52 DPRINTF(IntrControl, "post %d:%d (cpu %d)\n", int_num, index, cpu_id); 55 cpu->postInterrupt(tcvec[cpu_id]->threadId(), int_num, index); 59 IntrControl::clear(int cpu_id, int int_num, int index) argument 61 DPRINTF(IntrControl, "clear %d:%d (cpu %d)\n", int_num, index, cpu_id); 64 cpu->clearInterrupt(tcvec[cpu_id]->threadId(), int_num, index);
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H A D | intr_control_noisa.cc | 41 IntrControl::post(int cpu_id, int int_num, int index) argument 46 IntrControl::clear(int cpu_id, int int_num, int index) argument
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/gem5/src/arch/x86/regs/ |
H A D | float.hh | 119 FLOATREG_MMX(int index) argument 121 return (FloatRegIndex)(FLOATREG_MMX_BASE + index); 125 FLOATREG_FPR(int index) argument 127 return (FloatRegIndex)(FLOATREG_FPR_BASE + index); 131 FLOATREG_XMM_LOW(int index) argument 133 return (FloatRegIndex)(FLOATREG_XMM_BASE + 2 * index); 137 FLOATREG_XMM_HIGH(int index) argument 139 return (FloatRegIndex)(FLOATREG_XMM_BASE + 2 * index + 1); 143 FLOATREG_MICROFP(int index) argument 145 return (FloatRegIndex)(FLOATREG_MICROFP_BASE + index); 149 FLOATREG_STACK(int index, int top) argument [all...] |
H A D | apic.hh | 75 APIC_IN_SERVICE(int index) argument 77 return (ApicRegIndex)(APIC_IN_SERVICE_BASE + index); 81 APIC_TRIGGER_MODE(int index) argument 83 return (ApicRegIndex)(APIC_TRIGGER_MODE_BASE + index); 87 APIC_INTERRUPT_REQUEST(int index) argument 89 return (ApicRegIndex)(APIC_INTERRUPT_REQUEST_BASE + index);
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H A D | misc.hh | 404 isValidMiscReg(int index) argument 406 return (index >= MISCREG_CR0 && index < NUM_MISCREGS && 407 index != MISCREG_CR1 && 408 !(index > MISCREG_CR4 && index < MISCREG_CR8) && 409 !(index > MISCREG_CR8 && index <= MISCREG_CR15)); 413 MISCREG_CR(int index) argument 415 assert(index > 420 MISCREG_DR(int index) argument 427 MISCREG_MTRR_PHYS_BASE(int index) argument 435 MISCREG_MTRR_PHYS_MASK(int index) argument 443 MISCREG_MC_CTL(int index) argument 451 MISCREG_MC_STATUS(int index) argument 459 MISCREG_MC_ADDR(int index) argument 467 MISCREG_MC_MISC(int index) argument 475 MISCREG_PERF_EVT_SEL(int index) argument 483 MISCREG_PERF_EVT_CTR(int index) argument 491 MISCREG_IORR_BASE(int index) argument 499 MISCREG_IORR_MASK(int index) argument 507 MISCREG_SEG_SEL(int index) argument 514 MISCREG_SEG_BASE(int index) argument 521 MISCREG_SEG_EFF_BASE(int index) argument 528 MISCREG_SEG_LIMIT(int index) argument 535 MISCREG_SEG_ATTR(int index) argument [all...] |
H A D | int.hh | 152 // This needs to be large enough to miss all the other bits of an index. 156 INTREG_MICRO(int index) argument 158 return (IntRegIndex)(NUM_INTREGS + index); 162 INTREG_IMPLICIT(int index) argument 164 return (IntRegIndex)(NUM_INTREGS + NumMicroIntRegs + index); 168 INTREG_FOLDED(int index, int foldBit) argument 170 if ((index & 0x1C) == 4 && foldBit) 171 index = (index - 4) | foldBit; 172 return (IntRegIndex)index; [all...] |
/gem5/src/mem/ruby/structures/ |
H A D | PseudoLRUPolicy.cc | 76 PseudoLRUPolicy::touch(int64_t set, int64_t index, Tick time) 78 assert(index >= 0 && index < m_assoc); 84 node_val = (index >> i)&1; 91 m_last_ref_ptr[set][index] = time; 97 int64_t index = 0; 103 index += node_val ? 0 : (m_effective_assoc >> (i + 1)); 106 assert(index >= 0 && index < m_effective_assoc); 108 /* return either the found index o [all...] |
H A D | LRUPolicy.cc | 51 LRUPolicy::touch(int64_t set, int64_t index, Tick time) argument 53 assert(index >= 0 && index < m_assoc); 56 m_last_ref_ptr[set][index] = time;
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/gem5/src/cpu/minor/ |
H A D | scoreboard.cc | 62 scoreboard_index = reg.index(); 67 reg.index(); 72 TheISA::NumFloatRegs + reg.index(); 82 TheISA::NumFloatRegs + TheISA::NumVecRegs + reg.index(); 86 scoreboard_index = TheISA::NumIntRegs + reg.index(); 125 Index index; local 127 if (findIndex(reg, index)) { 129 numUnpredictableResults[index]++; 133 numResults[index]++; 134 returnCycle[index] 168 unsigned short int index; local 196 Index index; local 254 unsigned short int index; local [all...] |
/gem5/ext/ply/doc/ |
H A D | makedoc.py | 73 index = "<!-- INDEX -->\n<div class=\"sectiontoc\">\n" # index contains the index for adding at the top of the file. Also printed to stdout. 106 index += "</ul>\n" 108 index += "</ul>\n" 110 index += "</ul>\n" 112 index += "<ul>\n" 114 index += """<li><a href="#%s">%s</a>\n""" % (headingname,prevheadingtext) 129 index += "</ul>\n" 131 index [all...] |
/gem5/src/cpu/o3/ |
H A D | regfile.hh | 190 "%#x\n", phys_reg->index(), intRegFile[phys_reg->index()]); 191 return intRegFile[phys_reg->index()]; 199 RegVal floatRegBits = floatRegFile[phys_reg->index()]; 202 "has data %#x\n", phys_reg->index(), floatRegBits); 214 "data %s\n", int(phys_reg->index()), 215 vectorRegFile[phys_reg->index()].print()); 217 return vectorRegFile[phys_reg->index()]; 252 int(phys_reg->index()), phys_reg->elemIndex(), val); 254 vectorRegFile[phys_reg->index()] [all...] |
/gem5/src/mem/cache/replacement_policies/ |
H A D | tree_plru_rp.cc | 34 * tree indexing functions, which map an index to the tree 2D-array. 46 * Get the index of the parent of the given indexed subtree. 49 * @return The index of the parent tree. 52 parentIndex(const uint64_t index) argument 54 return std::floor((index-1)/2); 58 * Get index of the subtree on the left of the given indexed tree. 60 * @param index The index of the queried tree. 61 * @return The index of the subtree to the left of the queried tree. 64 leftSubtreeIndex(const uint64_t index) argument 76 rightSubtreeIndex(const uint64_t index) argument 89 isRightSubtree(const uint64_t index) argument 94 TreePLRUReplData( const uint64_t index, std::shared_ptr<PLRUTree> tree) argument [all...] |
/gem5/ext/drampower/src/ |
H A D | Parametrisable.cc | 52 unsigned int index) 59 index == count)) { 73 bool Parametrisable::removeParameter(const string& id, unsigned int index) argument 79 if ((p->getId() == id) && (index == count++)) { 90 * then the index is used to determine which instance is returned, in 94 unsigned int index) const 100 if ((p->getId() == id) && (index == count++)) { 105 cerr << "Could not find parameter '" << id << "' (" << index << ")" << endl; 121 bool Parametrisable::hasParameter(const string& id, unsigned int index) const 127 if ((p->getId() == id) && (index 51 setParameter(const Parameter& parameter, unsigned int index) argument [all...] |
H A D | Parametrisable.h | 69 * Set a parameter with a given index (default 0). This could for 73 unsigned int index = 0); 76 * Get a parameter of a given name and of a certain index. Calling 81 unsigned int index = 0) const; 84 * Remove a parameter with a specific name and index. If a parameter 88 unsigned int index = 0); 99 unsigned int index = 0) const;
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/gem5/src/mem/ruby/system/ |
H A D | WeightedLRUPolicy.cc | 69 WeightedLRUPolicy::touch(int64_t set, int64_t index, Tick time) argument 71 assert(index >= 0 && index < m_assoc); 74 m_last_ref_ptr[set][index] = time; 78 WeightedLRUPolicy::touch(int64_t set, int64_t index, Tick time, int occupancy) argument 80 assert(index >= 0 && index < m_assoc); 83 m_last_ref_ptr[set][index] = time; 84 m_last_occ_ptr[set][index] = occupancy;
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/gem5/src/arch/power/insts/ |
H A D | static_inst.cc | 42 ccprintf(os, "r%d", reg.index()); 44 ccprintf(os, "f%d", reg.index()); 46 switch (reg.index()) {
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/gem5/util/systemc/systemc_within_gem5/systemc_simple_object/ |
H A D | feeder.cc | 36 strings(params->strings), index(0), event(this) 57 if (index >= strings.size()) 60 buf.write(strings[index++].c_str());
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/gem5/ext/systemc/src/sysc/datatypes/fx/ |
H A D | scfx_mant.cpp | 68 int index = scfx_find_msb( size ); local 70 if( ~ (1 << index) & size ) index ++; 73 if ( index != 0 && ( sizeof(word_list) != sizeof(word) ) ) 75 index -= 1; 77 return index;
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/gem5/src/systemc/dt/fx/ |
H A D | scfx_mant.cc | 67 unsigned index = scfx_find_msb(size); local 69 if (~(UINT64_ONE << index) & size) 70 index++; 73 if (index != 0 && (sizeof(word_list) != sizeof(word))) { 74 index -= 1; 76 return index;
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/gem5/src/arch/x86/insts/ |
H A D | microldstop.hh | 59 const RegIndex index; member in class:X86ISA::MemOp 78 scale(_scale), index(_index.index()), base(_base.index()), 79 disp(_disp), segment(_segment.index()), 81 memFlags(_memFlags | _segment.index()) 83 assert(_segment.index() < NUM_SEGMENTREGS); 113 data(_data.index()) 146 dataLow(_dataLow.index()), 147 dataHi(_dataHi.index()) [all...] |
/gem5/src/sim/ |
H A D | syscall_emul.cc | 103 int index = 0; local 105 int status = p->getSyscallArg(tc, index); 245 int index = 0; local 247 Addr new_brk = p->getSyscallArg(tc, index); 293 int index = 0; local 295 uint64_t tidPtr = process->getSyscallArg(tc, index); 304 int index = 0; local 306 int tgt_fd = p->getSyscallArg(tc, index); 314 int index = 0; local 316 int tgt_fd = p->getSyscallArg(tc, index); 334 int index = 0; local 377 int index = 0; local 394 int index = 0; local 429 readlinkFunc(SyscallDesc *desc, int num, ThreadContext *tc, int index) argument 495 unlinkHelper(SyscallDesc *desc, int num, ThreadContext *tc, int index) argument 516 int index = 0; local 537 int index = 0; local 555 int index = 0; local 573 int index = 0; local 600 int index = 0; local 616 int index = 0; local 633 int index = 0; local 658 int index = 0; local 693 int index = 0; local 713 int index = 0; local 741 int index = 0; local 763 int index = 0; local 795 int index = 0; local 839 int index = 0; local 876 int index = 0; local 995 int index = 0; local 1068 int index = 0; local 1127 int index = 0; local 1150 accessFunc(SyscallDesc *desc, int callnum, ThreadContext *tc, int index) argument 1176 int index = 0; local 1193 int index = 0; local 1221 int index = 0; local 1237 int index = 0; local 1310 int index = 0; local 1328 int index = 0; local 1352 int index = 0; local 1370 int index = 0; local 1394 int index = 0; local 1459 int index = 0; local 1496 int index = 0; local 1637 int index = 0; local 1715 int index = 0; local 1750 int index = 0; local 1790 int index = 0; local 1820 int index = 0; local [all...] |
/gem5/src/arch/x86/ |
H A D | emulenv.cc | 54 index = machInst.sib.index | (machInst.rex.x << 3); 60 //In -this- special case, we don't use an index. 61 if (index == INTREG_RSP) 62 index = NUM_INTREGS; 73 index = (rm % 2) ? INTREG_RDI : INTREG_RSI;
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