15647SN/A/* 25647SN/A * Copyright (c) 2008 The Regents of The University of Michigan 35647SN/A * All rights reserved. 45647SN/A * 55647SN/A * Redistribution and use in source and binary forms, with or without 65647SN/A * modification, are permitted provided that the following conditions are 75647SN/A * met: redistributions of source code must retain the above copyright 85647SN/A * notice, this list of conditions and the following disclaimer; 95647SN/A * redistributions in binary form must reproduce the above copyright 105647SN/A * notice, this list of conditions and the following disclaimer in the 115647SN/A * documentation and/or other materials provided with the distribution; 125647SN/A * neither the name of the copyright holders nor the names of its 135647SN/A * contributors may be used to endorse or promote products derived from 145647SN/A * this software without specific prior written permission. 155647SN/A * 165647SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 175647SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 185647SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 195647SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 205647SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 215647SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 225647SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 235647SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 245647SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 255647SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 265647SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 275647SN/A * 285647SN/A * Authors: Gabe Black 295647SN/A */ 305647SN/A 315647SN/A#ifndef __ARCH_X86_APICREGS_HH__ 325647SN/A#define __ARCH_X86_APICREGS_HH__ 335647SN/A 346046SN/A#include "base/bitunion.hh" 356046SN/A 365647SN/Anamespace X86ISA 375647SN/A{ 385647SN/A enum ApicRegIndex 395647SN/A { 405647SN/A APIC_ID, 415647SN/A APIC_VERSION, 425647SN/A APIC_TASK_PRIORITY, 435647SN/A APIC_ARBITRATION_PRIORITY, 445647SN/A APIC_PROCESSOR_PRIORITY, 455647SN/A APIC_EOI, 465647SN/A APIC_LOGICAL_DESTINATION, 475647SN/A APIC_DESTINATION_FORMAT, 485647SN/A APIC_SPURIOUS_INTERRUPT_VECTOR, 495647SN/A 505647SN/A APIC_IN_SERVICE_BASE, 515647SN/A 525647SN/A APIC_TRIGGER_MODE_BASE = APIC_IN_SERVICE_BASE + 16, 535647SN/A 545647SN/A APIC_INTERRUPT_REQUEST_BASE = APIC_TRIGGER_MODE_BASE + 16, 555647SN/A 565647SN/A APIC_ERROR_STATUS = APIC_INTERRUPT_REQUEST_BASE + 16, 575647SN/A APIC_INTERRUPT_COMMAND_LOW, 585647SN/A APIC_INTERRUPT_COMMAND_HIGH, 595647SN/A APIC_LVT_TIMER, 605647SN/A APIC_LVT_THERMAL_SENSOR, 615647SN/A APIC_LVT_PERFORMANCE_MONITORING_COUNTERS, 625647SN/A APIC_LVT_LINT0, 635647SN/A APIC_LVT_LINT1, 645647SN/A APIC_LVT_ERROR, 655647SN/A APIC_INITIAL_COUNT, 665647SN/A APIC_CURRENT_COUNT, 675647SN/A APIC_DIVIDE_CONFIGURATION, 685647SN/A 695647SN/A APIC_INTERNAL_STATE, 705647SN/A 715647SN/A NUM_APIC_REGS 725647SN/A }; 735647SN/A 745647SN/A static inline ApicRegIndex 755647SN/A APIC_IN_SERVICE(int index) 765647SN/A { 775647SN/A return (ApicRegIndex)(APIC_IN_SERVICE_BASE + index); 785647SN/A } 795647SN/A 805647SN/A static inline ApicRegIndex 815647SN/A APIC_TRIGGER_MODE(int index) 825647SN/A { 835647SN/A return (ApicRegIndex)(APIC_TRIGGER_MODE_BASE + index); 845647SN/A } 855647SN/A 865647SN/A static inline ApicRegIndex 875647SN/A APIC_INTERRUPT_REQUEST(int index) 885647SN/A { 895647SN/A return (ApicRegIndex)(APIC_INTERRUPT_REQUEST_BASE + index); 905647SN/A } 916046SN/A 926046SN/A BitUnion32(InterruptCommandRegLow) 936046SN/A Bitfield<7, 0> vector; 946046SN/A Bitfield<10, 8> deliveryMode; 956046SN/A Bitfield<11> destMode; 966046SN/A Bitfield<12> deliveryStatus; 976046SN/A Bitfield<14> level; 986046SN/A Bitfield<15> trigger; 996046SN/A Bitfield<19, 18> destShorthand; 1006046SN/A EndBitUnion(InterruptCommandRegLow) 1016046SN/A 1026046SN/A BitUnion32(InterruptCommandRegHigh) 1036046SN/A Bitfield<31, 24> destination; 1046046SN/A EndBitUnion(InterruptCommandRegHigh) 1055647SN/A} 1065647SN/A 1075647SN/A#endif 108