14679Sgblack@eecs.umich.edu/* 24679Sgblack@eecs.umich.edu * Copyright (c) 2007 The Hewlett-Packard Development Company 311329Salexandru.dutu@amd.com * Copyright (c) 2015 Advanced Micro Devices, Inc. 44679Sgblack@eecs.umich.edu * All rights reserved. 54679Sgblack@eecs.umich.edu * 67087Snate@binkert.org * The license below extends only to copyright in the software and shall 77087Snate@binkert.org * not be construed as granting a license to any other intellectual 87087Snate@binkert.org * property including but not limited to intellectual property relating 97087Snate@binkert.org * to a hardware implementation of the functionality of the software 107087Snate@binkert.org * licensed hereunder. You may use the software subject to the license 117087Snate@binkert.org * terms below provided that you ensure that this notice is replicated 127087Snate@binkert.org * unmodified and in its entirety in all distributions of the software, 137087Snate@binkert.org * modified or unmodified, in source code or in binary form. 144679Sgblack@eecs.umich.edu * 157087Snate@binkert.org * Redistribution and use in source and binary forms, with or without 167087Snate@binkert.org * modification, are permitted provided that the following conditions are 177087Snate@binkert.org * met: redistributions of source code must retain the above copyright 187087Snate@binkert.org * notice, this list of conditions and the following disclaimer; 197087Snate@binkert.org * redistributions in binary form must reproduce the above copyright 207087Snate@binkert.org * notice, this list of conditions and the following disclaimer in the 217087Snate@binkert.org * documentation and/or other materials provided with the distribution; 227087Snate@binkert.org * neither the name of the copyright holders nor the names of its 234679Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 247087Snate@binkert.org * this software without specific prior written permission. 254679Sgblack@eecs.umich.edu * 264679Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 274679Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 284679Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 294679Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 304679Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 314679Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 324679Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 334679Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 344679Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 354679Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 364679Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 374679Sgblack@eecs.umich.edu * 384679Sgblack@eecs.umich.edu * Authors: Gabe Black 394679Sgblack@eecs.umich.edu */ 404679Sgblack@eecs.umich.edu 414679Sgblack@eecs.umich.edu#ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__ 424679Sgblack@eecs.umich.edu#define __ARCH_X86_INSTS_MICROLDSTOP_HH__ 434679Sgblack@eecs.umich.edu 444679Sgblack@eecs.umich.edu#include "arch/x86/insts/microop.hh" 4510467Sandreas.hansson@arm.com#include "arch/x86/ldstflags.hh" 465727Sgblack@eecs.umich.edu#include "mem/packet.hh" 475912Sgblack@eecs.umich.edu#include "mem/request.hh" 487678Sgblack@eecs.umich.edu#include "sim/faults.hh" 494679Sgblack@eecs.umich.edu 504679Sgblack@eecs.umich.edunamespace X86ISA 514679Sgblack@eecs.umich.edu{ 524679Sgblack@eecs.umich.edu /** 5311329Salexandru.dutu@amd.com * Base class for memory ops 544679Sgblack@eecs.umich.edu */ 5511329Salexandru.dutu@amd.com class MemOp : public X86MicroopBase 564679Sgblack@eecs.umich.edu { 574679Sgblack@eecs.umich.edu protected: 584679Sgblack@eecs.umich.edu const uint8_t scale; 594679Sgblack@eecs.umich.edu const RegIndex index; 604679Sgblack@eecs.umich.edu const RegIndex base; 614679Sgblack@eecs.umich.edu const uint64_t disp; 624679Sgblack@eecs.umich.edu const uint8_t segment; 634679Sgblack@eecs.umich.edu const uint8_t dataSize; 644679Sgblack@eecs.umich.edu const uint8_t addressSize; 655912Sgblack@eecs.umich.edu const Request::FlagsType memFlags; 664804Sgblack@eecs.umich.edu RegIndex foldOBit, foldABit; 674679Sgblack@eecs.umich.edu 684679Sgblack@eecs.umich.edu //Constructor 6911329Salexandru.dutu@amd.com MemOp(ExtMachInst _machInst, 7011329Salexandru.dutu@amd.com const char * mnem, const char * _instMnem, 7111329Salexandru.dutu@amd.com uint64_t setFlags, 7211329Salexandru.dutu@amd.com uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 7311329Salexandru.dutu@amd.com uint64_t _disp, InstRegIndex _segment, 7411329Salexandru.dutu@amd.com uint8_t _dataSize, uint8_t _addressSize, 7511329Salexandru.dutu@amd.com Request::FlagsType _memFlags, 7611329Salexandru.dutu@amd.com OpClass __opClass) : 7711329Salexandru.dutu@amd.com X86MicroopBase(_machInst, mnem, _instMnem, setFlags, __opClass), 7812106SRekai.GonzalezAlberquilla@arm.com scale(_scale), index(_index.index()), base(_base.index()), 7912106SRekai.GonzalezAlberquilla@arm.com disp(_disp), segment(_segment.index()), 8011329Salexandru.dutu@amd.com dataSize(_dataSize), addressSize(_addressSize), 8112106SRekai.GonzalezAlberquilla@arm.com memFlags(_memFlags | _segment.index()) 8211329Salexandru.dutu@amd.com { 8312106SRekai.GonzalezAlberquilla@arm.com assert(_segment.index() < NUM_SEGMENTREGS); 8411329Salexandru.dutu@amd.com foldOBit = 8511329Salexandru.dutu@amd.com (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0; 8611329Salexandru.dutu@amd.com foldABit = 8711329Salexandru.dutu@amd.com (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0; 8811329Salexandru.dutu@amd.com } 8911329Salexandru.dutu@amd.com }; 9011329Salexandru.dutu@amd.com 9111329Salexandru.dutu@amd.com /** 9211329Salexandru.dutu@amd.com * Base class for load and store ops using one register 9311329Salexandru.dutu@amd.com */ 9411329Salexandru.dutu@amd.com class LdStOp : public MemOp 9511329Salexandru.dutu@amd.com { 9611329Salexandru.dutu@amd.com protected: 9711329Salexandru.dutu@amd.com const RegIndex data; 9811329Salexandru.dutu@amd.com 9911329Salexandru.dutu@amd.com //Constructor 1004679Sgblack@eecs.umich.edu LdStOp(ExtMachInst _machInst, 1014679Sgblack@eecs.umich.edu const char * mnem, const char * _instMnem, 1027620Sgblack@eecs.umich.edu uint64_t setFlags, 1036345Sgblack@eecs.umich.edu uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 1046345Sgblack@eecs.umich.edu uint64_t _disp, InstRegIndex _segment, 1056345Sgblack@eecs.umich.edu InstRegIndex _data, 1064679Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 1075912Sgblack@eecs.umich.edu Request::FlagsType _memFlags, 1084679Sgblack@eecs.umich.edu OpClass __opClass) : 10911329Salexandru.dutu@amd.com MemOp(_machInst, mnem, _instMnem, setFlags, 11011329Salexandru.dutu@amd.com _scale, _index, _base, _disp, _segment, 11111329Salexandru.dutu@amd.com _dataSize, _addressSize, _memFlags, 11211329Salexandru.dutu@amd.com __opClass), 11312106SRekai.GonzalezAlberquilla@arm.com data(_data.index()) 1144804Sgblack@eecs.umich.edu { 11511329Salexandru.dutu@amd.com } 11611329Salexandru.dutu@amd.com 11711329Salexandru.dutu@amd.com std::string generateDisassembly(Addr pc, 11811329Salexandru.dutu@amd.com const SymbolTable *symtab) const; 11911329Salexandru.dutu@amd.com }; 12011329Salexandru.dutu@amd.com 12111329Salexandru.dutu@amd.com /** 12211329Salexandru.dutu@amd.com * Base class for load and store ops using two registers, we will 12311329Salexandru.dutu@amd.com * call them split ops for this reason. These are mainly used to 12411329Salexandru.dutu@amd.com * implement cmpxchg8b and cmpxchg16b. 12511329Salexandru.dutu@amd.com */ 12611329Salexandru.dutu@amd.com class LdStSplitOp : public MemOp 12711329Salexandru.dutu@amd.com { 12811329Salexandru.dutu@amd.com protected: 12911329Salexandru.dutu@amd.com const RegIndex dataLow; 13011329Salexandru.dutu@amd.com const RegIndex dataHi; 13111329Salexandru.dutu@amd.com 13211329Salexandru.dutu@amd.com //Constructor 13311329Salexandru.dutu@amd.com LdStSplitOp(ExtMachInst _machInst, 13411329Salexandru.dutu@amd.com const char * mnem, const char * _instMnem, 13511329Salexandru.dutu@amd.com uint64_t setFlags, 13611329Salexandru.dutu@amd.com uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 13711329Salexandru.dutu@amd.com uint64_t _disp, InstRegIndex _segment, 13811329Salexandru.dutu@amd.com InstRegIndex _dataLow, InstRegIndex _dataHi, 13911329Salexandru.dutu@amd.com uint8_t _dataSize, uint8_t _addressSize, 14011329Salexandru.dutu@amd.com Request::FlagsType _memFlags, 14111329Salexandru.dutu@amd.com OpClass __opClass) : 14211329Salexandru.dutu@amd.com MemOp(_machInst, mnem, _instMnem, setFlags, 14311329Salexandru.dutu@amd.com _scale, _index, _base, _disp, _segment, 14411329Salexandru.dutu@amd.com _dataSize, _addressSize, _memFlags, 14511329Salexandru.dutu@amd.com __opClass), 14612106SRekai.GonzalezAlberquilla@arm.com dataLow(_dataLow.index()), 14712106SRekai.GonzalezAlberquilla@arm.com dataHi(_dataHi.index()) 14811329Salexandru.dutu@amd.com { 1494804Sgblack@eecs.umich.edu } 1504679Sgblack@eecs.umich.edu 1514679Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, 1524679Sgblack@eecs.umich.edu const SymbolTable *symtab) const; 1534679Sgblack@eecs.umich.edu }; 1544679Sgblack@eecs.umich.edu} 1554679Sgblack@eecs.umich.edu 1564679Sgblack@eecs.umich.edu#endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__ 157