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/gem5/util/statetrace/
H A DSConscript8113:5c7c804e0645 Thu Mar 03 01:53:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Statetrace: Accomodate cross compiling statetrace with scons.
/gem5/util/statetrace/base/
H A Dtracechild.hh8113:5c7c804e0645 Thu Mar 03 01:53:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Statetrace: Accomodate cross compiling statetrace with scons.
H A Dregstate.hh8113:5c7c804e0645 Thu Mar 03 01:53:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Statetrace: Accomodate cross compiling statetrace with scons.
H A Darch_check.h8113:5c7c804e0645 Thu Mar 03 01:53:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Statetrace: Accomodate cross compiling statetrace with scons.
H A Dstatetrace.cc8113:5c7c804e0645 Thu Mar 03 01:53:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Statetrace: Accomodate cross compiling statetrace with scons.
H A Dtracechild.cc8113:5c7c804e0645 Thu Mar 03 01:53:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Statetrace: Accomodate cross compiling statetrace with scons.
/gem5/tests/quick/se/70.tgen/
H A Dtgen-dram-ctrl.cfg10218:5a45f124a2f7 Fri May 09 18:58:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> tests: Reflect name change in DRAM tests

This patch reflects the recent name change in the DRAM TrafficGen
tests and also tidies up the test directory.
/gem5/util/cpt_upgraders/
H A Darm-sysreg-mapping-ns.py11768:5b80960dcf08 Mon Dec 19 12:03:00 EST 2016 Curtis Dunham <Curtis.Dunham@arm.com> arm: update AArch{64,32} register mappings

Change-Id: Idaaaeb3f7b1a0bdbf18d8e2d46686c78bb411317
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/ext/fputils/
H A Dconfigure.ac10480:5d4ebc92d32e Thu Oct 16 05:49:00 EDT 2014 Andreas Sandberg <Andreas.Sandberg@ARM.com> ext: Update fputils to rev 6a47fd8358

This patch updates fputils to the latest revision (6a47fd8358) from
the upstream repository (github.com/andysan/fputils). Most notably,
this includes changes that export a limited set of 64-bit float
manipulation and avoids a warning about unused 64-bit floats in clang.
H A Dfp64.c10480:5d4ebc92d32e Thu Oct 16 05:49:00 EDT 2014 Andreas Sandberg <Andreas.Sandberg@ARM.com> ext: Update fputils to rev 6a47fd8358

This patch updates fputils to the latest revision (6a47fd8358) from
the upstream repository (github.com/andysan/fputils). Most notably,
this includes changes that export a limited set of 64-bit float
manipulation and avoids a warning about unused 64-bit floats in clang.
/gem5/ext/fputils/include/fputils/
H A Dfp64.h10480:5d4ebc92d32e Thu Oct 16 05:49:00 EDT 2014 Andreas Sandberg <Andreas.Sandberg@ARM.com> ext: Update fputils to rev 6a47fd8358

This patch updates fputils to the latest revision (6a47fd8358) from
the upstream repository (github.com/andysan/fputils). Most notably,
this includes changes that export a limited set of 64-bit float
manipulation and avoids a warning about unused 64-bit floats in clang.
/gem5/util/statetrace/arch/amd64/
H A Dtracechild.hh8113:5c7c804e0645 Thu Mar 03 01:53:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Statetrace: Accomodate cross compiling statetrace with scons.
/gem5/util/statetrace/arch/sparc/
H A Dtracechild.hh8113:5c7c804e0645 Thu Mar 03 01:53:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Statetrace: Accomodate cross compiling statetrace with scons.
/gem5/src/systemc/tests/systemc/kernel/dynamic_processes/test04/
H A Dexpected_returncode13249:5e60ab2199b9 Sat Sep 22 09:35:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Check the process type when using sc_join.

Method processes aren't allowed in an sc_join.

Change-Id: I5c8421a396dbe261645a074df514f69fc652c9c8
Reviewed-on: https://gem5-review.googlesource.com/c/12968
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
/gem5/src/arch/arm/isa/
H A Dmain.isa7119:5ad962dec52f Wed Jun 02 01:58:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> ARM: Define the load instructions from outside the decoder.
7117:5d18ca349ca1 Wed Jun 02 01:58:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> ARM: Create a "decoder" directory for the files implementing the decoder.
/gem5/src/arch/mips/linux/
H A Dsystem.hh10280:5b67e1bdf6ad Wed Aug 13 06:57:00 EDT 2014 Andreas Sandberg <Andreas.Sandberg@ARM.com> mips: Remove unused private members to fix compile-time warning

Certain versions of clang complain about unused private members if
they are not used. This changeset removes such members from the
MIPS-specific classes to silence the warning.
5268:5bfc53fe60e7 Fri Nov 16 21:32:00 EST 2007 Korey Sewell <ksewell@umich.edu> go back and fix up MIPS copyright headers
/gem5/src/systemc/core/
H A Dsc_main_python.cc13411:bd873635bba6 Fri Nov 09 04:18:00 EST 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> systemc: Push python headers on top of sources

Some build failures has been seen after USE_SYSTEMC being True by
default and that has been caused by double definition of _XOPEN_SOURCE
and _POSIX_C_SOURCE in some python versions (like 2.7.5, 2.7.13) and
/usr/include/features.h (used by gcc)

Python definition should preceed features.h one, since the latter will
manually #undef them before #define them.

Change-Id: I774711aaf8145df9ad7677a393a60cf3662d6816
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/14095
Maintainer: Gabe Black <gabeblack@google.com>
13404:5da37c38d749 Wed Nov 07 03:15:00 EST 2018 Gabe Black <gabeblack@google.com> systemc: Separate and conditionalize exposing sc_main to python.

Change-Id: Ib39dd79c607b277ba94f90dee41c09c1b3b66481
Reviewed-on: https://gem5-review.googlesource.com/c/13978
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
/gem5/src/arch/alpha/
H A Dregredir.hh6329:5d8b91875859 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> Registers: Add a registers.hh file as an ISA switched header.
This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.
/gem5/util/statetrace/arch/arm/
H A Dtracechild.hh8113:5c7c804e0645 Thu Mar 03 01:53:00 EST 2011 Gabe Black <gblack@eecs.umich.edu> Statetrace: Accomodate cross compiling statetrace with scons.
/gem5/tests/quick/se/00.hello.mp/
H A Dtest.py11851:824055fe6b30 Wed Nov 09 15:27:00 EST 2016 Brandon Potter <brandon.potter@amd.com> syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead

The EIOProcess class was removed recently and it was the only other class
which derived from Process. Since every Process invocation is also a
LiveProcess invocation, it makes sense to simplify the organization by
combining the fields from LiveProcess into Process.
/gem5/tests/quick/se/40.m5threads-test-atomic/
H A Dtest.py11851:824055fe6b30 Wed Nov 09 15:27:00 EST 2016 Brandon Potter <brandon.potter@amd.com> syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead

The EIOProcess class was removed recently and it was the only other class
which derived from Process. Since every Process invocation is also a
LiveProcess invocation, it makes sense to simplify the organization by
combining the fields from LiveProcess into Process.
/gem5/util/streamline/
H A Datomic_stat_config.ini10016:dffa80408656 Fri Jan 24 16:29:00 EST 2014 Dam Sunwoo <dam.sunwoo@arm.com> util: updated Streamline flow to support ARM DS-5 v5.17 protocol

The previous flow supported ARM DS-5 v5.13 protocol.
10016:dffa80408656 Fri Jan 24 16:29:00 EST 2014 Dam Sunwoo <dam.sunwoo@arm.com> util: updated Streamline flow to support ARM DS-5 v5.17 protocol

The previous flow supported ARM DS-5 v5.13 protocol.
9935:cc9dc514036e Thu Oct 17 11:20:00 EDT 2013 Dam Sunwoo <dam.sunwoo@arm.com> util: Streamline .apc project convertsion script

This Python script generates an ARM DS-5 Streamline .apc project based
on gem5 run. To successfully convert, the gem5 runs needs to be run
with the context-switch-based stats dump option enabled (The guest
kernel also needs to be patched to allow gem5 interrogate its task
information.) See help for more information.
H A Do3_stat_config.ini10016:dffa80408656 Fri Jan 24 16:29:00 EST 2014 Dam Sunwoo <dam.sunwoo@arm.com> util: updated Streamline flow to support ARM DS-5 v5.17 protocol

The previous flow supported ARM DS-5 v5.13 protocol.
10016:dffa80408656 Fri Jan 24 16:29:00 EST 2014 Dam Sunwoo <dam.sunwoo@arm.com> util: updated Streamline flow to support ARM DS-5 v5.17 protocol

The previous flow supported ARM DS-5 v5.13 protocol.
9935:cc9dc514036e Thu Oct 17 11:20:00 EDT 2013 Dam Sunwoo <dam.sunwoo@arm.com> util: Streamline .apc project convertsion script

This Python script generates an ARM DS-5 Streamline .apc project based
on gem5 run. To successfully convert, the gem5 runs needs to be run
with the context-switch-based stats dump option enabled (The guest
kernel also needs to be patched to allow gem5 interrogate its task
information.) See help for more information.
/gem5/src/dev/arm/
H A Da9scu.hh9235:5aa4896ed55a Wed Sep 19 06:15:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> AddrRange: Transition from Range<T> to AddrRange

This patch takes the final plunge and transitions from the templated
Range class to the more specific AddrRange. In doing so it changes the
obvious Range<Addr> to AddrRange, and also bumps the range_map to be
AddrRangeMap.

In addition to the obvious changes, including the removal of redundant
includes, this patch also does some house keeping in preparing for the
introduction of address interleaving support in the ranges. The Range
class is also stripped of all the functionality that is never used.
/gem5/system/arm/simple_bootloader/
H A DMakefile8280:5dddde1126c2 Wed May 04 21:38:00 EDT 2011 Prakash Ramrakhyani <Prakash.Ramrakhyani@arm.com> ARM: Boot loader changes that make it more flexible about load and I/O addrs

Completed in 53 milliseconds

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