13115SN/A/* 24125SN/A * Copyright (c) 2006-2007 The Regents of The University of Michigan 33115SN/A * All rights reserved. 43115SN/A * 53115SN/A * Redistribution and use in source and binary forms, with or without 63115SN/A * modification, are permitted provided that the following conditions are 73115SN/A * met: redistributions of source code must retain the above copyright 83115SN/A * notice, this list of conditions and the following disclaimer; 93115SN/A * redistributions in binary form must reproduce the above copyright 103115SN/A * notice, this list of conditions and the following disclaimer in the 113115SN/A * documentation and/or other materials provided with the distribution; 123115SN/A * neither the name of the copyright holders nor the names of its 133115SN/A * contributors may be used to endorse or promote products derived from 143115SN/A * this software without specific prior written permission. 153115SN/A * 163115SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 173115SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 183115SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 193115SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 203115SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 213115SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 223115SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 233115SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 243115SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 253115SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 263115SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 273115SN/A * 283115SN/A * Authors: Gabe Black 293115SN/A */ 303115SN/A 313115SN/A#ifndef TRACECHILD_SPARC_HH 323115SN/A#define TRACECHILD_SPARC_HH 333115SN/A 343115SN/A#include <asm-sparc64/reg.h> 358229Snate@binkert.org#include <sys/ptrace.h> 368229Snate@binkert.org#include <sys/types.h> 378229Snate@binkert.org#include <stdint.h> 388229Snate@binkert.org 396216SN/A#include <cassert> 403115SN/A#include <ostream> 413115SN/A#include <string> 423115SN/A 438113Sgblack@eecs.umich.edu#include "base/tracechild.hh" 443115SN/A 453115SN/Astruct regs; 463115SN/A 473115SN/Aclass SparcTraceChild : public TraceChild 483115SN/A{ 498108SN/A public: 508108SN/A enum RegNum 518108SN/A { 528108SN/A //Global registers 538108SN/A G0, G1, G2, G3, G4, G5, G6, G7, 548108SN/A //Output registers 558108SN/A O0, O1, O2, O3, O4, O5, O6, O7, 568108SN/A //Local registers 578108SN/A L0, L1, L2, L3, L4, L5, L6, L7, 588108SN/A //Input registers 598108SN/A I0, I1, I2, I3, I4, I5, I6, I7, 608108SN/A //Floating point 618108SN/A F0, F2, F4, F6, F8, F10, F12, F14, 628108SN/A F16, F18, F20, F22, F24, F26, F28, F30, 638108SN/A F32, F34, F36, F38, F40, F42, F44, F46, 648108SN/A F48, F50, F52, F54, F56, F58, F60, F62, 658108SN/A //Miscelaneous 668108SN/A FSR, FPRS, PC, NPC, Y, CWP, PSTATE, ASI, CCR, 678108SN/A numregs 688108SN/A }; 698108SN/A private: 708108SN/A regs theregs; 718108SN/A regs oldregs; 728108SN/A fpu thefpregs; 738108SN/A fpu oldfpregs; 748108SN/A uint64_t locals[8]; 758108SN/A uint64_t oldLocals[8]; 768108SN/A uint64_t inputs[8]; 778108SN/A uint64_t oldInputs[8]; 788108SN/A bool regDiffSinceUpdate[numregs]; 793115SN/A 808108SN/A //This calculates where the pc might go after the current instruction. 818108SN/A //while this equals npc for most instructions, it doesn't for all of 828108SN/A //them. The return value is the number of actual potential targets. 838108SN/A int getTargets(uint32_t inst, uint64_t pc, uint64_t npc, 848108SN/A uint64_t &target1, uint64_t &target2); 854125SN/A 868108SN/A protected: 878108SN/A bool update(int pid); 883115SN/A 898108SN/A public: 908108SN/A SparcTraceChild(); 913115SN/A 928108SN/A bool sendState(int socket); 934245SN/A 948108SN/A int64_t getRegVal(int num); 953115SN/A 968108SN/A int64_t getOldRegVal(int num); 973115SN/A 988108SN/A bool step(); 993115SN/A 1008108SN/A uint64_t 1018108SN/A getPC() 1028108SN/A { 1038108SN/A return getRegVal(PC); 1048108SN/A } 1053115SN/A 1068108SN/A uint64_t 1078108SN/A getSP() 1088108SN/A { 1098108SN/A return getRegVal(O6); 1108108SN/A } 1113115SN/A 1128108SN/A std::ostream & outputStartState(std::ostream & os); 1133115SN/A}; 1143115SN/A 1153115SN/A#endif 116