14780SN/A/* 24780SN/A * Copyright (c) 2007 The Regents of The University of Michigan 34780SN/A * All rights reserved. 44780SN/A * 54780SN/A * Redistribution and use in source and binary forms, with or without 64780SN/A * modification, are permitted provided that the following conditions are 74780SN/A * met: redistributions of source code must retain the above copyright 84780SN/A * notice, this list of conditions and the following disclaimer; 94780SN/A * redistributions in binary form must reproduce the above copyright 104780SN/A * notice, this list of conditions and the following disclaimer in the 114780SN/A * documentation and/or other materials provided with the distribution; 124780SN/A * neither the name of the copyright holders nor the names of its 134780SN/A * contributors may be used to endorse or promote products derived from 144780SN/A * this software without specific prior written permission. 154780SN/A * 164780SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 174780SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 184780SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 194780SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 204780SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 214780SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 224780SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 234780SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 244780SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 254780SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 264780SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 274780SN/A * 284780SN/A * Authors: Gabe Black 294780SN/A */ 304780SN/A 314780SN/A#ifndef REGSTATE_AMD64_HH 324780SN/A#define REGSTATE_AMD64_HH 334780SN/A 348229Snate@binkert.org#include <sys/ptrace.h> 358229Snate@binkert.org#include <sys/types.h> 364780SN/A#include <sys/user.h> 378229Snate@binkert.org 386216SN/A#include <cassert> 394780SN/A#include <string> 404780SN/A 418113Sgblack@eecs.umich.edu#include "base/tracechild.hh" 424780SN/A 434780SN/Aclass AMD64TraceChild : public TraceChild 444780SN/A{ 454780SN/A public: 464780SN/A enum RegNum 474780SN/A { 484780SN/A //GPRs 494780SN/A RAX, RCX, RDX, RBX, 504780SN/A //Base pointer and stack pointer 514780SN/A RSP, RBP, 524780SN/A //Index registers 534780SN/A RSI, RDI, 544780SN/A //New 64 bit mode registers 554780SN/A R8, R9, R10, R11, R12, R13, R14, R15, 564780SN/A //Segmentation registers 574780SN/A CS, DS, ES, FS, GS, SS, FS_BASE, GS_BASE, 584780SN/A //PC 594780SN/A RIP, 604780SN/A //Flags 614780SN/A EFLAGS, 625049SN/A //MMX 635049SN/A MMX0_0, MMX0_1, 645049SN/A MMX1_0, MMX1_1, 655049SN/A MMX2_0, MMX2_1, 665049SN/A MMX3_0, MMX3_1, 675049SN/A MMX4_0, MMX4_1, 685049SN/A MMX5_0, MMX5_1, 695049SN/A MMX6_0, MMX6_1, 705049SN/A MMX7_0, MMX7_1, 715049SN/A //XMM 725049SN/A XMM0_0, XMM0_1, XMM0_2, XMM0_3, 735049SN/A XMM1_0, XMM1_1, XMM1_2, XMM1_3, 745049SN/A XMM2_0, XMM2_1, XMM2_2, XMM2_3, 755049SN/A XMM3_0, XMM3_1, XMM3_2, XMM3_3, 765049SN/A XMM4_0, XMM4_1, XMM4_2, XMM4_3, 775049SN/A XMM5_0, XMM5_1, XMM5_2, XMM5_3, 785049SN/A XMM6_0, XMM6_1, XMM6_2, XMM6_3, 795049SN/A XMM7_0, XMM7_1, XMM7_2, XMM7_3, 805049SN/A XMM8_0, XMM8_1, XMM8_2, XMM8_3, 815049SN/A XMM9_0, XMM9_1, XMM9_2, XMM9_3, 825049SN/A XMM10_0, XMM10_1, XMM10_2, XMM10_3, 835049SN/A XMM11_0, XMM11_1, XMM11_2, XMM11_3, 845049SN/A XMM12_0, XMM12_1, XMM12_2, XMM12_3, 855049SN/A XMM13_0, XMM13_1, XMM13_2, XMM13_3, 865049SN/A XMM14_0, XMM14_1, XMM14_2, XMM14_3, 875049SN/A XMM15_0, XMM15_1, XMM15_2, XMM15_3, 884780SN/A numregs 894780SN/A }; 904780SN/A private: 915049SN/A int64_t getRegs(user_regs_struct & myregs, 925049SN/A user_fpregs_struct &myfpregs,int num); 934780SN/A user_regs_struct regs; 944780SN/A user_regs_struct oldregs; 955049SN/A user_fpregs_struct fpregs; 965049SN/A user_fpregs_struct oldfpregs; 974780SN/A bool regDiffSinceUpdate[numregs]; 984780SN/A 994795SN/A uint64_t findSyscall(); 1004795SN/A 1014780SN/A protected: 1024780SN/A bool update(int pid); 1034780SN/A 1044780SN/A public: 1054780SN/A 1064780SN/A AMD64TraceChild(); 1074780SN/A 1084780SN/A bool sendState(int socket); 1094780SN/A 1104780SN/A int64_t getRegVal(int num); 1114780SN/A int64_t getOldRegVal(int num); 1124780SN/A uint64_t getPC() {return getRegVal(RIP);} 1134780SN/A uint64_t getSP() {return getRegVal(RSP);} 1144780SN/A std::ostream & outputStartState(std::ostream & output); 1154780SN/A 1164795SN/A bool step(); 1174780SN/A}; 1184780SN/A 1194780SN/A#endif 120