16407SN/A/* 27414SN/A * Copyright (c) 2010 ARM Limited 37414SN/A * All rights reserved 47414SN/A * 57414SN/A * The license below extends only to copyright in the software and shall 67414SN/A * not be construed as granting a license to any other intellectual 77414SN/A * property including but not limited to intellectual property relating 87414SN/A * to a hardware implementation of the functionality of the software 97414SN/A * licensed hereunder. You may use the software subject to the license 107414SN/A * terms below provided that you ensure that this notice is replicated 117414SN/A * unmodified and in its entirety in all distributions of the software, 127414SN/A * modified or unmodified, in source code or in binary form. 137414SN/A * 146407SN/A * Copyright (c) 2009 The Regents of The University of Michigan 156407SN/A * All rights reserved. 166407SN/A * 176407SN/A * Redistribution and use in source and binary forms, with or without 186407SN/A * modification, are permitted provided that the following conditions are 196407SN/A * met: redistributions of source code must retain the above copyright 206407SN/A * notice, this list of conditions and the following disclaimer; 216407SN/A * redistributions in binary form must reproduce the above copyright 226407SN/A * notice, this list of conditions and the following disclaimer in the 236407SN/A * documentation and/or other materials provided with the distribution; 246407SN/A * neither the name of the copyright holders nor the names of its 256407SN/A * contributors may be used to endorse or promote products derived from 266407SN/A * this software without specific prior written permission. 276407SN/A * 286407SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 296407SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 306407SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 316407SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 326407SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 336407SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 346407SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 356407SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 366407SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 376407SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 386407SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 396407SN/A * 406407SN/A * Authors: Ali Saidi 416407SN/A * Gabe Black 426407SN/A */ 436407SN/A 446407SN/A#ifndef TRACECHILD_ARM_HH 456407SN/A#define TRACECHILD_ARM_HH 466407SN/A 478229Snate@binkert.org#include <sys/ptrace.h> 488229Snate@binkert.org#include <sys/user.h> 498229Snate@binkert.org 506407SN/A#include <cassert> 516407SN/A#include <string> 528229Snate@binkert.org 538113Sgblack@eecs.umich.edu#include "base/tracechild.hh" 546407SN/A 556407SN/Aclass ARMTraceChild : public TraceChild 566407SN/A{ 576407SN/A public: 586407SN/A enum RegNum 596407SN/A { 606407SN/A // r0 - r3 argument, temp, caller save 616407SN/A // r4 - r10 callee save 626407SN/A // r11 - FP 636407SN/A // r12 - temp 646407SN/A // r13 - stack 656407SN/A // r14 - link 666407SN/A // r15 - pc 676407SN/A R0, R1, R2, R3, R4, R5, R6, R7, 686407SN/A R8, R9, R10, FP, R12, SP, LR, PC, 696407SN/A CPSR, 708271SAli.Saidi@ARM.com F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14, F15, 718271SAli.Saidi@ARM.com F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, 728271SAli.Saidi@ARM.com F30, F31, FPSCR, 736407SN/A numregs 746407SN/A }; 758271SAli.Saidi@ARM.com 768271SAli.Saidi@ARM.com struct vfp_regs { 778271SAli.Saidi@ARM.com uint64_t fpregs[32]; 788271SAli.Saidi@ARM.com uint32_t fpscr; 798271SAli.Saidi@ARM.com }; 808271SAli.Saidi@ARM.com 816407SN/A private: 826407SN/A uint32_t getRegs(user_regs& myregs, int num); 838271SAli.Saidi@ARM.com uint64_t getFpRegs(vfp_regs &myfpregs, int num); 848271SAli.Saidi@ARM.com 856407SN/A user_regs regs; 866407SN/A user_regs oldregs; 878271SAli.Saidi@ARM.com 888271SAli.Saidi@ARM.com vfp_regs fpregs; 898271SAli.Saidi@ARM.com vfp_regs oldfpregs; 908271SAli.Saidi@ARM.com 916407SN/A bool regDiffSinceUpdate[numregs]; 927414SN/A bool foundMvn; 937414SN/A 946407SN/A protected: 956407SN/A bool update(int pid); 967414SN/A 976407SN/A public: 986407SN/A ARMTraceChild(); 996407SN/A bool sendState(int socket); 1006407SN/A 1016407SN/A int64_t getRegVal(int num); 1026407SN/A int64_t getOldRegVal(int num); 1037414SN/A 1046407SN/A bool step(); 1056407SN/A 1068108SN/A uint64_t 1078108SN/A getPC() 1086407SN/A { 1098108SN/A return getRegVal(PC); 1106407SN/A } 1116407SN/A 1128108SN/A uint64_t 1138108SN/A getSP() 1146407SN/A { 1158108SN/A return getRegVal(SP); 1166407SN/A } 1176407SN/A 1186407SN/A std::ostream & outputStartState(std::ostream & os); 1196407SN/A 1206407SN/A}; 1216407SN/A 1226407SN/A#endif 1236407SN/A 124