Searched refs:tick (Results 1 - 25 of 67) sorted by relevance

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/gem5/src/sim/
H A Dclocked_object.hh69 // the tick value of the next clock edge (>= curTick()) at the
71 mutable Tick tick; member in class:Clocked
74 // 'tick'
78 * Align cycle and tick to the next clock edge if not already done. When
79 * complete, tick must be at least curTick().
84 // both tick and cycle are up-to-date and we are done, note
85 // that the >= is important as it captures cases where tick
87 if (tick >= curTick())
90 // optimise for the common case and see if the tick should be
92 tick
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/gem5/src/cpu/testers/traffic_gen/
H A Dtrace_gen.cc66 panic("Trace was recorded with a different tick frequency %d\n",
86 element.tick = pkt_msg.tick();
99 DPRINTF(TrafficGen, "No next tick as trace is finished\n");
108 DPRINTF(TrafficGen, "Next packet tick is %d\n", tickOffset +
109 nextElement.tick);
115 return std::max(tickOffset + nextElement.tick, curTick());
149 currElement.tick,
157 DPRINTF(TrafficGen, "nextElement: %c addr %d size %d tick %d (%d)\n",
161 nextElement.tick
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H A Dtrace_gen.hh83 Tick tick; member in struct:TraceGen::TraceElement
178 * Returns the tick when the next request should be generated. If
/gem5/util/
H A Ddecode_inst_trace.py115 optional_fields = ('tick', 'type', 'inst_flags', 'addr', 'size', 'mem_flags')
117 # If we have a tick use it, otherwise count instructions
118 if inst.HasField('tick'):
119 tick = inst.tick
121 tick = num_insts
132 ascii_out.write('%-20d: (%03d/%03d) %#010x @ %#016x ' % (tick, node_id, cpu_id,
H A Dencode_packet_trace.py47 # addr, size, tick. For example:
50 # This trace reads 64 bytes from decimal address 128 at tick 4000,
51 # then writes 64 bytes to address 232123 at tick 500000.
107 # Assume the default tick rate
114 cmd, addr, size, tick = line.split(',')
116 packet.tick = long(tick)
H A Ddecode_packet_trace.py100 packet.flags, packet.tick))
103 packet.tick))
H A Dcheckpoint_aggregator.py85 tick = config.getint(sec, "curTick")
86 if tick > max_curtick:
87 max_curtick = tick
H A Do3-pipeview.py60 'tick_start':0, # The first tick to be printed
61 'tick_stop':0, # The last tick to be printed
83 # Skip lines up to the starting tick
118 ' ' + 'tick'.center(15) +
173 # earlier then specified by start_sn/tick and finishes later then what
174 # is defined in stop_sn/tick.
182 continue; # earlier then the starting tick number
184 continue; # later then the ending tick number
257 tick = inst[stages[stage_idx]['name']]
258 if tick !
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/gem5/src/systemc/core/
H A Dscheduler.hh242 Tick tick = delayed(delay); local
243 if (tick < getCurTick())
244 tick = getCurTick();
248 event->schedule(deltas, tick);
255 TimeSlot *&ts = timeSlots[tick];
258 schedule(ts, tick);
260 event->schedule(ts->events, tick);
394 schedule(::Event *event, Tick tick) argument
397 eq->schedule(event, tick);
399 eventsToSchedule[event] = tick;
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/gem5/src/mem/
H A Ddramsim2_wrapper.hh160 void tick();
H A Dpacket_queue.hh71 Tick tick; ///< The tick when the packet is ready to transmit member in class:PacketQueue::DeferredPacket
74 : tick(t), pkt(p)
116 { return !transmitList.empty() && transmitList.front().tick <= curTick(); }
172 { return transmitList.empty() ? MaxTick : transmitList.front().tick; }
H A Dsimple_mem.hh78 const Tick tick; member in class:SimpleMemory::DeferredPacket
81 DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
H A Dbridge.hh87 const Tick tick; member in class:Bridge::DeferredPacket
90 DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
183 * @param when tick when response packet should be sent
287 * @param when tick when response packet should be sent
H A Dserial_link.hh83 const Tick tick; member in class:SerialLink::DeferredPacket
86 DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
175 * @param when tick when response packet should be sent
280 * @param when tick when response packet should be sent
H A Dsimple_mem.cc145 // calculate an appropriate tick to release to not exceed
176 while (i != packetQueue.begin() && when_to_send < i->tick &&
185 schedule(dequeueEvent, packetQueue.back().tick);
221 std::max(packetQueue.front().tick, curTick()), true);
H A Ddramsim2.hh156 void tick();
/gem5/util/streamline/
H A Dm5stats2streamline.py175 def __init__(self, uid, pid, tgid, task_name, is_process, tick):
187 self.tick = tick # time this task first appeared
190 def __init__(self, tick, task):
191 self.tick = tick
593 process_re = re.compile("tick=(\d+)\s+(\d+)\s+cpu_id=(\d+)\s+" +
601 tick = int(match.group(1))
603 start_tick = tick
625 process = Task(uid, pid, tgid, "idle", True, tick)
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/gem5/src/mem/cache/prefetch/
H A Dqueued.hh63 Tick tick; member in struct:QueuedPrefetcher::DeferredPacket
82 int32_t prio) : owner(o), pfInfo(pfi), tick(t), pkt(nullptr),
192 return pfq.empty() ? MaxTick : pfq.front().tick;
H A Dsbooe.cc57 SBOOEPrefetcher::Sandbox::insert(Addr addr, Tick tick) argument
61 entries[index].expectedArrivalTick = tick;
H A Dsbooe.hh61 * Holds the current demand addresses and tick. This is later used to
119 * @param tick Tick in which the access is expected to be filled
121 void insert(Addr line, Tick tick);
/gem5/src/mem/ruby/system/
H A DRubySystem.hh97 void enqueueRubyEvent(Tick tick) argument
101 schedule(e, tick);
/gem5/configs/dram/
H A Dlat_mem_rd.py187 # assume the default tick rate (1 ps)
197 tick = 0
206 packet.tick = long(tick)
209 tick = tick + itt
/gem5/src/dev/net/
H A Detherlink.cc220 paramOut(cp, csprintf("%s.txQueue[%i].tick", base, idx), pe.first);
248 Tick tick; local
251 paramIn(cp, csprintf("%s.txQueue[%i].tick", base, idx), tick);
255 fatal_if(!txQueue.empty() && txQueue.back().first > tick,
257 txQueue.emplace_back(std::make_pair(tick, delayed_packet));
/gem5/src/cpu/testers/memtest/
H A Dmemtest.hh86 void tick();
/gem5/src/cpu/testers/garnet_synthetic_traffic/
H A DGarnetSyntheticTraffic.hh65 void tick();

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