12391SN/A/* 29823Sandreas.hansson@arm.com * Copyright (c) 2012-2013 ARM Limited 38931Sandreas.hansson@arm.com * All rights reserved 48931Sandreas.hansson@arm.com * 58931Sandreas.hansson@arm.com * The license below extends only to copyright in the software and shall 68931Sandreas.hansson@arm.com * not be construed as granting a license to any other intellectual 78931Sandreas.hansson@arm.com * property including but not limited to intellectual property relating 88931Sandreas.hansson@arm.com * to a hardware implementation of the functionality of the software 98931Sandreas.hansson@arm.com * licensed hereunder. You may use the software subject to the license 108931Sandreas.hansson@arm.com * terms below provided that you ensure that this notice is replicated 118931Sandreas.hansson@arm.com * unmodified and in its entirety in all distributions of the software, 128931Sandreas.hansson@arm.com * modified or unmodified, in source code or in binary form. 138931Sandreas.hansson@arm.com * 142391SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan 152391SN/A * All rights reserved. 162391SN/A * 172391SN/A * Redistribution and use in source and binary forms, with or without 182391SN/A * modification, are permitted provided that the following conditions are 192391SN/A * met: redistributions of source code must retain the above copyright 202391SN/A * notice, this list of conditions and the following disclaimer; 212391SN/A * redistributions in binary form must reproduce the above copyright 222391SN/A * notice, this list of conditions and the following disclaimer in the 232391SN/A * documentation and/or other materials provided with the distribution; 242391SN/A * neither the name of the copyright holders nor the names of its 252391SN/A * contributors may be used to endorse or promote products derived from 262391SN/A * this software without specific prior written permission. 272391SN/A * 282391SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292391SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302391SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312391SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322391SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332391SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342391SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352391SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362391SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372391SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382391SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392665SN/A * 402665SN/A * Authors: Ron Dreslinski 418931Sandreas.hansson@arm.com * Andreas Hansson 422391SN/A */ 432391SN/A 448931Sandreas.hansson@arm.com/** 458931Sandreas.hansson@arm.com * @file 468931Sandreas.hansson@arm.com * SimpleMemory declaration 472391SN/A */ 482391SN/A 4912492Sodanrc@yahoo.com.br#ifndef __MEM_SIMPLE_MEMORY_HH__ 5012492Sodanrc@yahoo.com.br#define __MEM_SIMPLE_MEMORY_HH__ 512391SN/A 5211193Sandreas.hansson@arm.com#include <list> 539823Sandreas.hansson@arm.com 548931Sandreas.hansson@arm.com#include "mem/abstract_mem.hh" 559823Sandreas.hansson@arm.com#include "mem/port.hh" 568931Sandreas.hansson@arm.com#include "params/SimpleMemory.hh" 574762SN/A 588931Sandreas.hansson@arm.com/** 599120Sandreas.hansson@arm.com * The simple memory is a basic single-ported memory controller with 609823Sandreas.hansson@arm.com * a configurable throughput and latency. 619823Sandreas.hansson@arm.com * 629264Sdjordje.kovacevic@arm.com * @sa \ref gem5MemorySystem "gem5 Memory System" 638931Sandreas.hansson@arm.com */ 648931Sandreas.hansson@arm.comclass SimpleMemory : public AbstractMemory 658931Sandreas.hansson@arm.com{ 662462SN/A 678931Sandreas.hansson@arm.com private: 686107SN/A 699823Sandreas.hansson@arm.com /** 709823Sandreas.hansson@arm.com * A deferred packet stores a packet along with its scheduled 719823Sandreas.hansson@arm.com * transmission time 729823Sandreas.hansson@arm.com */ 739823Sandreas.hansson@arm.com class DeferredPacket 749823Sandreas.hansson@arm.com { 759823Sandreas.hansson@arm.com 769823Sandreas.hansson@arm.com public: 779823Sandreas.hansson@arm.com 789823Sandreas.hansson@arm.com const Tick tick; 799823Sandreas.hansson@arm.com const PacketPtr pkt; 809823Sandreas.hansson@arm.com 819823Sandreas.hansson@arm.com DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt) 829823Sandreas.hansson@arm.com { } 839823Sandreas.hansson@arm.com }; 849823Sandreas.hansson@arm.com 859823Sandreas.hansson@arm.com class MemoryPort : public SlavePort 862413SN/A { 879228Sandreas.hansson@arm.com private: 888931Sandreas.hansson@arm.com SimpleMemory& memory; 892413SN/A 902413SN/A public: 918931Sandreas.hansson@arm.com MemoryPort(const std::string& _name, SimpleMemory& _memory); 922413SN/A 932413SN/A protected: 9413854Sgabeblack@google.com Tick recvAtomic(PacketPtr pkt) override; 9513854Sgabeblack@google.com Tick recvAtomicBackdoor( 9613854Sgabeblack@google.com PacketPtr pkt, MemBackdoorPtr &_backdoor) override; 9713854Sgabeblack@google.com void recvFunctional(PacketPtr pkt) override; 9813854Sgabeblack@google.com bool recvTimingReq(PacketPtr pkt) override; 9913854Sgabeblack@google.com void recvRespRetry() override; 10013855SAndrea.Mondelli@ucf.edu AddrRangeList getAddrRanges() const override; 1012413SN/A }; 1022413SN/A 1039120Sandreas.hansson@arm.com MemoryPort port; 1042416SN/A 1059823Sandreas.hansson@arm.com /** 1069823Sandreas.hansson@arm.com * Latency from that a request is accepted until the response is 1079823Sandreas.hansson@arm.com * ready to be sent. 1089823Sandreas.hansson@arm.com */ 1099823Sandreas.hansson@arm.com const Tick latency; 1108719SN/A 1119823Sandreas.hansson@arm.com /** 1129823Sandreas.hansson@arm.com * Fudge factor added to the latency. 1139823Sandreas.hansson@arm.com */ 1149823Sandreas.hansson@arm.com const Tick latency_var; 1159823Sandreas.hansson@arm.com 1169823Sandreas.hansson@arm.com /** 1179823Sandreas.hansson@arm.com * Internal (unbounded) storage to mimic the delay caused by the 1189823Sandreas.hansson@arm.com * actual memory access. Note that this is where the packet spends 1199823Sandreas.hansson@arm.com * the memory latency. 1209823Sandreas.hansson@arm.com */ 12111193Sandreas.hansson@arm.com std::list<DeferredPacket> packetQueue; 1229823Sandreas.hansson@arm.com 1239823Sandreas.hansson@arm.com /** 1249823Sandreas.hansson@arm.com * Bandwidth in ticks per byte. The regulation affects the 1259823Sandreas.hansson@arm.com * acceptance rate of requests and the queueing takes place after 1269823Sandreas.hansson@arm.com * the regulation. 1279823Sandreas.hansson@arm.com */ 1289228Sandreas.hansson@arm.com const double bandwidth; 1299228Sandreas.hansson@arm.com 1309228Sandreas.hansson@arm.com /** 1319228Sandreas.hansson@arm.com * Track the state of the memory as either idle or busy, no need 1329228Sandreas.hansson@arm.com * for an enum with only two states. 1339228Sandreas.hansson@arm.com */ 1349228Sandreas.hansson@arm.com bool isBusy; 1359228Sandreas.hansson@arm.com 1369228Sandreas.hansson@arm.com /** 1379228Sandreas.hansson@arm.com * Remember if we have to retry an outstanding request that 1389228Sandreas.hansson@arm.com * arrived while we were busy. 1399228Sandreas.hansson@arm.com */ 1409228Sandreas.hansson@arm.com bool retryReq; 1419228Sandreas.hansson@arm.com 1429228Sandreas.hansson@arm.com /** 1439823Sandreas.hansson@arm.com * Remember if we failed to send a response and are awaiting a 1449823Sandreas.hansson@arm.com * retry. This is only used as a check. 1459823Sandreas.hansson@arm.com */ 1469823Sandreas.hansson@arm.com bool retryResp; 1479823Sandreas.hansson@arm.com 1489823Sandreas.hansson@arm.com /** 1499228Sandreas.hansson@arm.com * Release the memory after being busy and send a retry if a 1509228Sandreas.hansson@arm.com * request was rejected in the meanwhile. 1519228Sandreas.hansson@arm.com */ 1529228Sandreas.hansson@arm.com void release(); 1539228Sandreas.hansson@arm.com 15412084Sspwilson2@wisc.edu EventFunctionWrapper releaseEvent; 1559228Sandreas.hansson@arm.com 1569823Sandreas.hansson@arm.com /** 1579823Sandreas.hansson@arm.com * Dequeue a packet from our internal packet queue and move it to 1589823Sandreas.hansson@arm.com * the port where it will be sent as soon as possible. 1599823Sandreas.hansson@arm.com */ 1609823Sandreas.hansson@arm.com void dequeue(); 1619823Sandreas.hansson@arm.com 16212084Sspwilson2@wisc.edu EventFunctionWrapper dequeueEvent; 1639823Sandreas.hansson@arm.com 1649823Sandreas.hansson@arm.com /** 1659823Sandreas.hansson@arm.com * Detemine the latency. 1669823Sandreas.hansson@arm.com * 1679823Sandreas.hansson@arm.com * @return the latency seen by the current packet 1689823Sandreas.hansson@arm.com */ 1699823Sandreas.hansson@arm.com Tick getLatency() const; 1709823Sandreas.hansson@arm.com 17111190Sandreas.hansson@arm.com /** 17211190Sandreas.hansson@arm.com * Upstream caches need this packet until true is returned, so 17311190Sandreas.hansson@arm.com * hold it for deletion until a subsequent call 1749349SAli.Saidi@ARM.com */ 17511190Sandreas.hansson@arm.com std::unique_ptr<Packet> pendingDelete; 1769349SAli.Saidi@ARM.com 1772391SN/A public: 1782391SN/A 1799228Sandreas.hansson@arm.com SimpleMemory(const SimpleMemoryParams *p); 1808931Sandreas.hansson@arm.com 18111168Sandreas.hansson@arm.com DrainState drain() override; 1828931Sandreas.hansson@arm.com 18313784Sgabeblack@google.com Port &getPort(const std::string &if_name, 18413784Sgabeblack@google.com PortID idx=InvalidPortID) override; 18511169Sandreas.hansson@arm.com void init() override; 1862391SN/A 1878931Sandreas.hansson@arm.com protected: 1889823Sandreas.hansson@arm.com Tick recvAtomic(PacketPtr pkt); 18913854Sgabeblack@google.com Tick recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &_backdoor); 1909823Sandreas.hansson@arm.com void recvFunctional(PacketPtr pkt); 1919228Sandreas.hansson@arm.com bool recvTimingReq(PacketPtr pkt); 19210713Sandreas.hansson@arm.com void recvRespRetry(); 1932391SN/A}; 1942391SN/A 19512492Sodanrc@yahoo.com.br#endif //__MEM_SIMPLE_MEMORY_HH__ 196