| /gem5/src/cpu/o3/probe/ |
| H A D | simple_trace.cc | 48 dynInst->instAddr(),
49 dynInst->staticInst->disassemble(dynInst->instAddr()));
55 dynInst->instAddr(),
56 dynInst->staticInst->disassemble(dynInst->instAddr()));
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| /gem5/src/cpu/ |
| H A D | inteltrace.cc | 52 outs << "0x" << hex << pc.instAddr() << ":\t";
|
| H A D | base_dyn_inst_impl.hh | 188 cprintf("T%d : %#08d `", threadNumber, pc.instAddr());
189 std::cout << staticInst->disassemble(pc.instAddr());
198 s << "T" << threadNumber << " : 0x" << pc.instAddr() << " "
199 << staticInst->disassemble(pc.instAddr());
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| H A D | pc_event.cc | 93 Addr pc = tc->instAddr();
101 if (pc != tc->instAddr())
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| /gem5/src/arch/riscv/ |
| H A D | decoder.cc | 103 nextPC.npc(nextPC.instAddr() + sizeof(MachInst) / 2);
105 nextPC.npc(nextPC.instAddr() + sizeof(MachInst));
108 return decode(emi, nextPC.instAddr());
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| /gem5/src/cpu/pred/ |
| H A D | bpred_unit.cc | 195 uncondBranch(tid, pc.instAddr(), bp_history);
198 pred_taken = lookup(tid, pc.instAddr(), bp_history);
214 PredictorHistory predict_record(seqNum, pc.instAddr(), pred_taken,
256 if (BTB.valid(pc.instAddr(), tid)) {
259 target = BTB.lookup(pc.instAddr(), tid);
272 btbUpdate(tid, pc.instAddr(), bp_history);
287 if (iPred->lookup(pc.instAddr(), target, tid)) {
311 iPred->recordIndirect(pc.instAddr(), target.instAddr(), seqNum,
321 predict_record.target = target.instAddr();
[all...] |
| /gem5/src/arch/alpha/ |
| H A D | decoder.hh | 111 return decode(ext_inst, nextPC.instAddr());
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| /gem5/src/arch/power/ |
| H A D | decoder.hh | 118 return decode(emi, nextPC.instAddr());
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| /gem5/src/arch/mips/ |
| H A D | decoder.hh | 111 return decode(emi, nextPC.instAddr());
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| /gem5/src/arch/arm/ |
| H A D | decoder.cc | 158 offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
167 pc.instAddr() & alignment ? DecoderFault::UNALIGNED : DecoderFault::OK);
194 return decode(this_emi, pc.instAddr());
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| /gem5/src/arch/sparc/ |
| H A D | decoder.hh | 125 return decode(emi, nextPC.instAddr());
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| /gem5/src/cpu/simple/ |
| H A D | base.cc | 144 Addr oldpc, pc = threadInfo[curThread]->thread->instAddr();
148 pc = threadInfo[curThread]->thread->instAddr();
474 Addr instAddr = thread->instAddr(); local
475 Addr fetchPC = (instAddr & PCMask) + t_info.fetchOffset;
478 DPRINTF(Fetch, "Fetch: Inst PC:%08p, Fetch PC:%08p\n", instAddr, fetchPC);
481 instMasterId(), instAddr);
522 Addr fetchPC = (pcState.instAddr() & PCMask) + t_info.fetchOffset;
588 Addr instAddr = pc.instAddr(); local
[all...] |
| /gem5/src/cpu/o3/ |
| H A D | mem_dep_unit_impl.hh | 203 producing_store = depPred.checkInst(inst->instAddr());
259 depPred.insertStore(inst->instAddr(), inst->seqNum, inst->threadNumber);
295 depPred.insertStore(inst->instAddr(), inst->seqNum, inst->threadNumber);
544 " load: %#x, store: %#x\n", violating_load->instAddr(),
545 store_inst->instAddr());
547 depPred.violation(store_inst->instAddr(), violating_load->instAddr());
555 inst->instAddr(), inst->seqNum);
557 depPred.issued(inst->instAddr(), inst->seqNum, inst->isStore());
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| H A D | fetch_impl.hh | 580 tid, inst->seqNum, inst->pcState().instAddr(), nextPC);
584 tid, inst->seqNum, inst->pcState().instAddr());
589 tid, inst->seqNum, inst->pcState().instAddr(), nextPC);
769 if (squashInst && squashInst->pcState().instAddr() == newPC.instAddr())
1121 "[sn:%lli].\n", tid, thisPC.instAddr(),
1126 disassemble(thisPC.instAddr()));
1184 Addr fetchAddr = (thisPC.instAddr() + pcOffset) & BaseCPU::PCMask;
1208 fetchCacheLine(fetchAddr, tid, thisPC.instAddr());
1217 } else if ((checkInterrupt(thisPC.instAddr())
[all...] |
| H A D | dyn_inst_impl.hh | 80 this->instAddr(),
83 this->staticInst->disassemble(this->instAddr()));
|
| /gem5/src/cpu/minor/ |
| H A D | dyn_inst.cc | 121 << std::hex << inst.pc.instAddr() << std::dec << " (";
187 id, pc.instAddr(), fault->name());
230 id, pc.instAddr(),
|
| H A D | pipe_data.cc | 146 << ";0x" << std::hex << target.instAddr() << std::dec
156 << std::hex << branch.target.instAddr() << std::dec
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| H A D | execute.cc | 258 inst->pc.instAddr(), inst->predictedTarget.instAddr(), *inst);
268 inst->pc.instAddr(), inst->predictedTarget.instAddr(), *inst);
275 inst->pc.instAddr(), inst->predictedTarget.instAddr(),
276 target.instAddr(), *inst);
283 inst->pc.instAddr(), target.instAddr(), *inst);
843 oldPC = thread->instAddr();
[all...] |
| /gem5/src/cpu/simple/probes/ |
| H A D | simpoint.cc | 87 currentBBV.first = thread->pcState().instAddr();
94 currentBBV.second = thread->pcState().instAddr();
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| /gem5/src/gpu-compute/ |
| H A D | kernel_cfg.cc | 68 int first_block_addr = block->firstInstruction->instAddr();
115 if (leaders.find(instruction->instAddr()) != leaders.end()) {
238 last_instruction->ipdInstNum(ipd_first_inst->instAddr());
273 int inst_addr = inst->instAddr();
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| /gem5/src/mem/cache/prefetch/ |
| H A D | stride.hh | 91 Addr instAddr; member in struct:StridePrefetcher::StrideEntry
|
| H A D | stride.cc | 71 instAddr = 0;
212 entry->instAddr = pc;
256 if ((entry.instAddr == pc) && (entry.isSecure == is_secure)) {
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| /gem5/src/arch/arm/tracers/ |
| H A D | tarmac_base.cc | 68 addr(pc.instAddr()) ,
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| /gem5/src/cpu/checker/ |
| H A D | cpu_impl.hh | 239 Addr fetch_PC = thread->instAddr();
254 thread->instAddr());
307 Addr fetchPC = (pcState.instAddr() & PCMask) + fetchOffset;
414 oldpc = thread->instAddr();
417 } while (oldpc != thread->instAddr());
461 if (inst->instAddr() != thread->instAddr()) {
578 "registers from main CPU", curTick(), unverifiedInst->instAddr());
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| /gem5/src/arch/arm/insts/ |
| H A D | pseudo.cc | 62 const Addr pc(pc_state.instAddr());
|